disassemble.c

国产CPU－龙芯（loongson)BIOS源代码

	break;
    case RS_SIMM:
	rs (); comma (); simm (dest);
	if (rflag )
	{
	    sprintf (tmp, " rs=0x%x", rsvalue);
	    strcat (dest, tmp);
	}
	break;
    case RT_RD:
	rt (); comma (); rd();
	break;
    case RT_RD_TO:
	rt (); comma (); rd();
	if (rflag )
	    mkcomment( dest, "# rt=0x%x", rtvalue);
	break;
    case RD:
	rd ();
	break;
    case RD_RS:
	rd (); comma (); rs ();
	if (rflag )
	    mkcomment( dest, "# rs=0x%x", rsvalue);
	break;
    case RT_C0:
	rt (); comma (); c0 ();
	break;
    case RT_C0_TO:
	rt (); comma (); c0 ();
	if (rflag )
	    mkcomment( dest, "# rt=0x%x", rtvalue);
	break;
    case RT_C1:
	rt (); comma (); c1 ();
	break;
    case RT_C1_TO:
	rt (); comma (); c1 ();
	if (rflag )
	    mkcomment( dest, "# rt=0x%x", rtvalue);
	break;
    case RT_C2:
	rt (); comma (); c2 ();
	break;
    case RT_CN:
	rt (); comma (); cn ();
	break;
    case RT_CN_TO:
	rt (); comma (); cn ();
	if (rflag )
	    mkcomment( dest, "# rt=0x%x", rtvalue);
	break;
    case RT_CC1:
	rt (); comma (); cc1 ();
	break;
    case RT_CC1_TO:
	rt (); comma (); cc1 ();
	if (rflag )
	    mkcomment( dest, "# rt=0x%x", rtvalue);
	break;
    case RT_CC2:
	rt (); comma (); cc2 ();
	break;
    case RD_RT_RS:
	rd (); comma (); rt (); comma (); rs();
	if (rflag )
	{
	    mkcomment( dest, "# rt=0x%x", rtvalue);
	    sprintf (tmp, " rs=0x%x", rsvalue);
	    strcat (dest, tmp);
	}
	break;
    case JR:
    case RS:
	rs ();
	if (rflag )
	    mkcomment( dest, "# rs=0x%x", rsvalue);
	break;
    case RD_RS_RT:
	rd (); comma ();
    case RS_RT:
	rs (); comma (); rt ();
	if (rflag )
	{
	    mkcomment( dest, "# rs=0x%x ", rsvalue);
	    sprintf (tmp, " rt=0x%x", rtvalue);
	    strcat (dest, tmp);
	}
	break;
    case RD_RT:
	rd (); comma (); rt ();
	if (rflag )
	    mkcomment( dest, "# rt=0x%x", rtvalue);
	break;
    case RD_RT_SFT:
	rd (); comma (); rt (); comma ();
	sprintf (tmp, "0x%x", SHAMT_ (inst));
	strcat (dest, tmp);
	mkcomment (dest, "# %d", SHAMT_ (inst));
	if (rflag )
	{
	    sprintf (tmp, " rt=0x%x", rtvalue);
	    strcat (dest, tmp);
	}
	break;
    case RS_RT_OFF:
    case RS_OFF:
	rs (); comma ();
	do_rs = 1;
	if (pt->type == RS_RT_OFF)
	{
	    rt (); comma ();
	    if (rflag )
		do_rt = 1;
	}
    case CP_OFF:
    case OFF:
	v = IMM_ (inst);
	if (v & (1L << 15))
	    v |= 0xffff0000L;
	v1 = (long)addr + 4 + (v << 2);
	if (!adr2symoff (tmp, v1, 0))
	    sprintf (tmp, "%x", v1);
	strcat (dest, tmp);
	mkcomment (dest, "# 0x%08x", v1);
	if (rflag && do_rs )
	{
	    sprintf (tmp, " rs=0x%x", rsvalue);
	    strcat (dest, tmp);
	    do_rs = 0;
	}
	if (rflag && do_rt )
	{
	    sprintf (tmp, " rt=0x%x", rtvalue);
	    strcat (dest, tmp);
	    do_rt = 0;
	}
	break;
    case BPCODE:
	sprintf (tmp, "%d", (inst >> 16) & 0x3ff);
	strcat (dest, tmp);
	break;
    case COFUN:
	sprintf (tmp, "0x%x", inst & 0x01ffffffL);
	strcat (dest, tmp);
	break;
    case NONE:
	break;
    case TARGET:
	v = (inst & 0x03ffffff) << 2;
	v |= ((int)addr & 0xf0000000);
	if (!adr2symoff (tmp, v, 0))
	    sprintf (tmp, "%x", v);
	strcat (dest, tmp);
	mkcomment (dest, "# 0x%08x", v);
	break;
    case JALR:
	if (RD_ (inst) != 31L)
	    rd (); comma ();
	rs ();
	if (rflag )
	    mkcomment( dest, "# rs=0x%x", rsvalue);
	break;
    case LDSTC0:
	v = IMM_ (inst);
	if (v & (1L << 15))
	    v |= 0xffff0000L;
	c0ft (); comma ();
	sprintf (tmp, "%d", v);
	strcat (dest, tmp);
	strcat (dest, "(");
	rs ();
	strcat (dest, ")");
	mkcomment (dest, "# 0x%x", v);
	if (rflag )
	{
	    /* If wanting register contents, then add this too */
	    sprintf (tmp, " addr=0x%x", (int)(v + rsvalue));
	    strcat (dest, tmp);
	}
	break;
    case LDSTC1:
    case STOREC1:
	v = IMM_ (inst);
	if (v & (1L << 15))
	    v |= 0xffff0000L;
	c1ft (); comma ();
	sprintf (tmp, "%d", v);
	strcat (dest, tmp);
	strcat (dest, "(");
	rs ();
	strcat (dest, ")");
	mkcomment (dest, "# 0x%x", v);
	if (rflag )
	{
	    /* If wanting register contents, then add this too */
	    sprintf (tmp, " addr=0x%x", (int)(v + rsvalue));
	    strcat (dest, tmp);
#ifdef FLOATINGPT
	    if (pt->type == STOREC1 )
	    {
	      if (fpdis) {
		if (dpdenorm( (struct IEEEdp *)d_ft ))
		    sprintf (tmp, " ft=0.0 (dp denorm)");
		else if (dpnan ((struct IEEEdp *)d_ft))
		    sprintf (tmp, " ft=Nan");
		else
		    sprintf (tmp, " ft=%e", *d_ft);
	      }
	      else
		sprintf (tmp, " rt=0x%llx", Fpr[(int)RT_(inst)]);
	      strcat (dest, tmp);
	    }
#endif /* FLOATINGPT */
	}
	break;
    case LDSTCN:
    case STORECN:
	v = IMM_ (inst);
	if (v & (1L << 15))
	    v |= 0xffff0000L;
	cnft (); comma ();
	sprintf (tmp, "%d", v);
	strcat (dest, tmp);
	strcat (dest, "(");
	rs ();
	strcat (dest, ")");
	mkcomment (dest, "# 0x%x", v);
	if (rflag )
	{
	    /* If wanting register contents, then add this too */
	    sprintf (tmp, " addr=0x%x", (int)(v + rsvalue));
	    strcat (dest, tmp);
	}
	break;
    case LOAD_STORE:
    case STORE:
	rt (); comma ();
    load_store:
	v = IMM_ (inst);
	if (v & (1L << 15))
	    v |= 0xffff0000L;
	sprintf (tmp, "%d", v);
	strcat (dest, tmp);
	strcat (dest, "(");
	rs ();
	strcat (dest, ")");
	if (rflag )
	{
	    /* If wanting register contents, then add this too */
	    mkcomment( dest, "# addr=0x%x", (int)(v + rsvalue));
	    if (pt->type == STORE )
	    {
		sprintf (tmp, " rt=0x%x", (int)rtvalue);
		strcat (dest, tmp);
	    }
	}
	else
	mkcomment (dest, "# 0x%x", v);
	break;
    case CACHE_OP:
	sprintf (tmp, "%d,", RT_(inst));
	strcat (dest, tmp);
	goto load_store;
    case WORD:
	sprintf (tmp, "%08x", inst);
	strcat (dest, tmp);
	strcat (dest, "      # ");
	w = (long)addr;
	for (i = 0; i < 4; i++) {
	    v = load_byte ((u_int8_t *)w);
	    w++;
	    if (isprint (v))
		strccat (dest, v);
	    else
		strccat (dest, '.');
	}
	break;
    }
    return (addr + 4L);
}

/*************************************************************
 *  simm(dest)
 *      signed immediate value
 */
void
simm (dest)
     char           *dest;
{
    char            tmp[20];
    long            v;

    v = IMM_ (inst);
    sprintf (tmp, "0x%x", v);
    strcat (dest, tmp);
    if (v & (1L << 15))
	v |= 0xffff0000L;
    mkcomment (dest, "# %d", v);
}

/*************************************************************
 *  imm(dest)
 *      unsigned immediate value
 */
void
imm (dest)
     char           *dest;
{
    char            tmp[20];
    long            v;

    v = IMM_ (inst);
    sprintf (tmp, "0x%x", v);
    strcat (dest, tmp);
    mkcomment (dest, "# %d", v);
}

/*************************************************************
 *  mkcomment(p,fmt,v)
 *      generate an appropriate comment
 */
void
mkcomment (p, fmt, v)
     char           *p, *fmt;
     long            v;
{
    char            tmp[20];
    int             n;

    for (n = 50 - strlen (p); n > 0; n--)
	strcat (p, " ");
    sprintf (tmp, fmt, v);
    strcat (p, tmp);
}

/*************************************************************
 *  dispchist(args,siz)
 *      display the pc history (trace buffer)
 */
int
dispchist (args, siz)
     int             args, siz;
{
    int  i, l;
    void *adr;

    l = siz;
    for (i = 0;; i++) {
	adr = (void *)getpchist(i);
	if (adr == 0)
	    break;
	md_disasm (prnbuf, adr);
	if (more (prnbuf, &l, (args > 1) ? 0 : siz))
	    break;
    }
    return(0);
}


/*----------------------------------------------------------------*/

int
md_stacktrace(ac, av)
	int ac;
	char **av;
{
extern int optind;
	int vflag = 0;
	int c, siz, cnt;
	void *addr;

	optind = 0;
	while((c = getopt (ac, av, "v")) != EOF) {
		switch(c) {
		case 'v':
			vflag++;
			break;

		default:
			return(-1);
		}
	}
	cnt = siz = moresz;
	if(optind < ac) {
		if(!get_rsa(&cnt, av[optind++])) {
			return(-1);
		}
		siz = 0;
	}
	if(optind != ac) {
		return(-1);
	}

	ioctl (STDIN, CBREAK, NULL);

	addr = (void *)(int)cpuinfotab[whatcpu]->sp;

	while(addr != NULL) {
		void *nextframe = (void *)load_word(addr);
		void *pc = (void *)load_word((void *)(int)addr + 4);
		char *p = prnbuf;
		int framesize = (int)nextframe - (int)addr;

		if(nextframe == 0) {
			framesize = 0;
		}

		if(!adr2symoff (p, (u_int32_t)pc, 24)) {
			sprintf(p, "              0x%08x", pc);
		}
		p += strlen(p);
		/* XXX Wind up saved arg regs and print ? */
		/* XXX Useful? Well most code is optimized... */

		if(vflag) {
			p += sprintf(p, " frame=0x%08x size=%-5d",
						nextframe, framesize);
		}
		if(more(prnbuf, &cnt, siz)) {
			break;
		}
		if(addr == nextframe) {
			more("end of stack or selfpointing!", &cnt, siz);
			break;
		}
		addr = nextframe;
	}
	return(0);
}

void *
md_dumpframe (void *pframe)
{
        int nextframe;
        int lr;
        int *access;

        access = (int *)(pframe);
        nextframe = load_word(access);

        access = (int *)(nextframe+4);
        lr = load_word(access);

        printf("lr %x fp %x nfp %x\n", lr, pframe, nextframe);

        return((void *)nextframe);
}
/*
 *      Frame tracing.
 */
void
md_do_stacktrace(addr, have_addr, count, modif)
	void *addr;
	int have_addr;
	int count;
	char *modif;
{
	void *xadr;

	__asm__ volatile(" move %0, $29\n" : "=r"(xadr));

	if (have_addr == -1) {	/* Stacktrace ourself */
		addr = xadr;
	}
        else if(have_addr == 0) {
                addr = (void *)(int)cpuinfotab[whatcpu]->sp;
        }
#ifdef DUMP_FRAME
        while (addr != 0) {
                addr = md_dumpframe(addr);
        }
#endif
} 

/*
 *  Command table registration
 *  ==========================
 */
extern const Optdesc md_r_opts[];

static const Cmd MDebugCmd[] =
{
	{"Debugger"},
	{"r",           "[reg* [val|field val]]",
			md_r_opts,
			"display/set register",
			md_registers, 1, 4, CMD_REPEAT},
	{"l",           "[-bct][adr [cnt]]",
			l_opts,
			"list (disassemble) memory",
			md_disassemble, 1, 5, CMD_REPEAT},
	{"bt",          "[-v] [cnt]",
			0,
			"stack backtrace",
			md_stacktrace, 1, 3, CMD_REPEAT},
	{0, 0}
};

static void init_cmd __P((void)) __attribute__ ((constructor));

static void
init_cmd()
{
        cmdlist_expand(MDebugCmd, 1);
}