ethernet.c.unknown-exec

国产CPU－龙芯（loongson)BIOS源代码

#include <stdio.h>
#include <ethernet.h>
#define MAX_SIZE 2000
#define TX_BD_NUM 1

u8 send_data[] = 
{
   0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,
   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x18,0x19,
   0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29,
   0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37,0x38,0x39,
   0x40,0x41,0x42,0x43,0x44,0x45,0x46,0x47,0x48,0x49,
   0x50,0x51,0x52,0x53,0x54,0x55,0x56,0x57,0x58,0x59,
   0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67,0x68,0x69,
   0x70,0x71,0x72,0x73,0x74,0x75,0x76,0x77,0x78,0x79,
   0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,
   0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,
   0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,
   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x18,0x19,
   0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29,
   0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37,0x38,0x39,
   0x40,0x41,0x42,0x43,0x44,0x45,0x46,0x47,0x48,0x49,
   0x50,0x51,0x52,0x53,0x54,0x55,0x56,0x57,0x58,0x59,
   0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67,0x68,0x69,
   0x70,0x71,0x72,0x73,0x74,0x75,0x76,0x77,0x78,0x79,
   0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,
   0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,
};

u8 send_frame[MAX_SIZE];
u8 rev_frame[MAX_SIZE];

void eth_test()
{
    MAC_data_frame e_frame;
    
    eth_init();

    while (1)
    {
	/*
	set_frame(&e_frame, 0x100);
	loop_back_test(&e_frame);
	*/

	set_frame(&e_frame, 0x0008);
	send_one_normal_frame(&e_frame);
	wait_for_tx_init();

	/*
	set_frame(&e_frame, 0x1000);
	send_one_huge_frame(&e_frame);
	wait_for_tx_init();

	set_frame(&e_frame, 0x10);
	send_one_small_frame(&e_frame);
	wait_for_tx_init();
	*/

	wait_for_rx_init();
	read_rx_normal_frame(&e_frame);
    }
}

static void eth_init()
{
    u32 status = 0;
    /* Double full duplex */
    ETH_SET32(REG_MAC_MODER, 0x0000A400);
    /* Enable interrupt, unnessisary */
    ETH_SET32(REG_MAC_INT_MASK, 0x0000007F);
    /* For full duplex */
    ETH_SET32(REG_MAC_IPGT, 0x00000015);
    /* Allow to transfer control frame & receive frame and able to save to ram */
    ETH_SET32(REG_MAC_CTRLMODER, 0x00000007);
    /* setup MAC address */
    ETH_SET32(REG_MAC_ADDR0, 0x03040506);
    ETH_SET32(REG_MAC_ADDR1, 0x0000AA02);
    ETH_SET32(REG_MAC_TX_BD_NUM, TX_BD_NUM);
    
    status = ETH_GET32(REG_MAC_MODER);
    status |= 0x3;
    ETH_SET32(REG_MAC_MODER, status);

    status = ETH_GET32(REG_MAC_MODER);
    serial_puts("eth_int:REG_MAC_MODER:");
    serial_put32(status);

    /* Set data received address */
    ETH_SET32(DIS_TXBD_BUF + (TX_BD_NUM<<3) + 4, PHY(rev_frame));
    status = ETH_GET32(DIS_TXBD_BUF + (TX_BD_NUM<<3) + 4);
    serial_put32(status);

    status = (1518 << 16);
    status |= BIT_MAC_RX_BD_EMPTY|BIT_MAC_RX_BD_IRQ|BIT_MAC_RX_BD_WRAP;
    ETH_SET32(DIS_TXBD_BUF + (TX_BD_NUM<<3), status);
    serial_puts("RX ready\n");

    /* Set TXBD frame buffer address */
    ETH_SET32(DIS_TXBD_BUF + 4, PHY(send_frame));
    status = ETH_GET32(DIS_TXBD_BUF + 4);
    serial_puts("TXBD Point:");
    serial_put32(status);
}

static void set_frame(MAC_data_frame *frame, u32 length)
{
    DEST_ADDR(frame, 0x386393, 0x610400);
    SRC_ADDR(frame, 0x060504, 0x0302AA);
    LENGTH(frame, length);
}

static void loop_back_test(MAC_data_frame *frame)
{
    MAC_data_frame rev_frame;
    u32 i = 0;
    u32 status = 0;

    status = ETH_GET32(REG_MAC_MODER);
    status |= BIT_MAC_MODER_LOOPBCK;
    ETH_SET32(REG_MAC_MODER, status);
    wait_for_rx_init();
    send_one_normal_frame(frame);
    wait_for_tx_init();
    read_rx_normal_frame(&rev_frame);
    i = compare_data(frame, &rev_frame);
    if (i == -1)
	serial_puts("Loop test error\n");
    status &= ~BIT_MAC_MODER_LOOPBCK;
    ETH_SET32(REG_MAC_MODER, status);
}


static void send_one_normal_frame(MAC_data_frame *frame)
{
    send_one_frame(frame, send_frame);
}

static void send_one_frame(MAC_data_frame *frame, u8 *send_buf)
{
    u8 *psend = NULL;
    u32 status = 0;
    u32 i = 0;
    u32 len = 0x60;


    psend = send_buf;
    for (i=0;i<6;i++)
	psend[i] = frame->des_addr[i];
    for (i=0;i<6;i++)
	psend[6+i] = frame->src_addr[i];
    *(u16 *)(psend + 12) = frame->length;
    for (i=0;i<len-14;i++)
	psend[14+i] = send_data[i];
    
    /* Turn on transfer */
    status |= BIT_MAC_TX_BD_IRQ|BIT_MAC_TX_BD_WRAP|BIT_MAC_TX_BD_PAD|BIT_MAC_TX_BD_CRC|BIT_MAC_TX_BD_READY;
    status &= 0x0000ffff;
    status |= (MAC_HEADER_LEN + len) << 16;
    ETH_SET32(DIS_TXBD_BUF, status);
}

static void wait_for_tx_init()
{
    u32 status = 0;
    
    u32 time_out = 0x10000;
    /*
    do {
	status = ETH_GET32(DIS_TXBD_BUF);
    } while ((status & BIT_MAC_TX_BD_READY) && time_out--);
    */
    while(ETH_GET32(DIS_TXBD_BUF) & BIT_MAC_TX_BD_READY);
    if (time_out)
    {
	serial_puts("Data has send out\n");
	status = ETH_GET32(DIS_TXBD_BUF);
	serial_puts("wait_for_tx_init:TXDB:");
	serial_put32(status);
	status = ETH_GET32(REG_MAC_INT_SOURCE);
	serial_puts("wait_for_tx_init:INT Source:");
	serial_put32(status);
	ETH_SET32(DIS_TXBD_BUF, 0);
    }
    else
    {
	serial_puts("Time Out\n");
    }
}

static int compare_data(MAC_data_frame *s_frame, MAC_data_frame *r_frame)
{
    int i = 0;
    for (i=0;i<6;i++)
    {
	if (s_frame->des_addr[i] != r_frame->des_addr[i])
	    return -1;
	if (s_frame->src_addr[i] != r_frame->src_addr[i])
	    return -1;
    }
    if (s_frame->length != r_frame->length)
	return -1;
    for (i=0;i<s_frame->length;i++)
	if (send_frame[14+i] != rev_frame[14+i])
	    return -1;
    return 0;
}

static void send_one_huge_frame(MAC_data_frame *frame)
{
    send_one_frame(frame, send_frame);
}

static void send_one_small_frame(MAC_data_frame *frame)
{
    send_one_frame(frame, send_frame);
}

static void wait_for_rx_init()
{
    /* Ready to receive datas */
    while (ETH_GET32(DIS_TXBD_BUF + (TX_BD_NUM<<3)) & BIT_MAC_RX_BD_EMPTY);
}

static void read_rx_normal_frame(MAC_data_frame *frame)
{
    u32 status = 0;
    u32 irq_reg = 0;
    u32 frame_len = 0;

    /* Data arrived. Read out RXBD register and interrupt source register */
    status = ETH_GET32(DIS_TXBD_BUF + (TX_BD_NUM<<3));
    serial_puts("read_rx_normal_frame:RXDB:");
    serial_put32(status);

    irq_reg = ETH_GET32(REG_MAC_INT_SOURCE);
    ETH_SET32(REG_MAC_INT_SOURCE, irq_reg);
    serial_puts("read_rx_normal_frame:INT Source:");
    serial_put32(irq_reg);

    
    dump_data(rev_frame, frame_len);

    frame_len = (status >> 16) & 0xffff;
    serial_puts("Acturaly data size:");
    serial_put32(frame_len);

    status = (1518 << 16);
    status |= BIT_MAC_RX_BD_EMPTY|BIT_MAC_RX_BD_IRQ|BIT_MAC_RX_BD_WRAP;
    ETH_SET32(DIS_TXBD_BUF + (TX_BD_NUM<<3), status);
    serial_puts("RX ready\n");
}