📄 mixframea.lst
字号:
AX51 MACRO ASSEMBLER MIXFRAMEA 06/13/06 10:15:31 PAGE 1
MACRO ASSEMBLER AX51 V2.14
OBJECT MODULE PLACED IN MixFrameA.OBJ
ASSEMBLER INVOKED BY: e:\Keil\C51\BIN\AX51.EXE MixFrameA.asm SET(SMALL) DEBUG EP
LOC OBJ LINE SOURCE
1 ;*****************************************
2 ; ASM file MixFrameA.ASM for C&ASM mix programing
3 ;==========================
4 ; subroutines that may accessed from Frame.C and startup.a51 models
5 ;--------------------------
6 public DataInit,Timer0Int,UartInt
7
8 ;==========================
9 ; Variables that may accessed from spnlc.c and startup.a51 models
10 ;--------------------------
11 public AsmArg
12
13 ;==========================
14 ; external C functions that may accessed from this model
15 ;--------------------------
16 extrn code (?C_STARTUP)
17
18 ;==========================
19 ; external subroutines that may accessed from this model
20 ;--------------------------
21 extrn data (CArg)
22
23 ;-----------------------------------------
24 ;$include (C8051F000.inc)
+1 25 ;-----------------------------------------------------------------------------
+1 26 ; Copyright (C) 2000 CYGNAL INTEGRATED PRODUCTS, INC.
+1 27 ; All rights reserved.
+1 28 ;
+1 29 ;
+1 30 ; FILE NAME : C8051F000.INC
+1 31 ; TARGET MCU : C8051F0xx (C8051 System Controller)
+1 32 ; DESCRIPTION : Register/bit definitions for the C8051F000 product family.
+1 33 ;
+1 34 ; REVISION 1.8
+1 35 ;
+1 36 ;-----------------------------------------------------------------------------
+1 37 ;REGISTER DEFINITIONS
+1 38 ;
0080 +1 39 P0 DATA 080H ; PORT 0
0081 +1 40 SP DATA 081H ; STACK POINTER
0082 +1 41 DPL DATA 082H ; DATA POINTER - LOW BYTE
0083 +1 42 DPH DATA 083H ; DATA POINTER - HIGH BYTE
0087 +1 43 PCON DATA 087H ; POWER CONTROL
0088 +1 44 TCON DATA 088H ; TIMER CONTROL
0089 +1 45 TMOD DATA 089H ; TIMER MODE
008A +1 46 TL0 DATA 08AH ; TIMER 0 - LOW BYTE
008B +1 47 TL1 DATA 08BH ; TIMER 1 - LOW BYTE
008C +1 48 TH0 DATA 08CH ; TIMER 0 - HIGH BYTE
008D +1 49 TH1 DATA 08DH ; TIMER 1 - HIGH BYTE
008E +1 50 CKCON DATA 08EH ; CLOCK CONTROL
008F +1 51 PSCTL DATA 08FH ; PROGRAM STORE R/W CONTROL
0090 +1 52 P1 DATA 090H ; PORT 1
0091 +1 53 TMR3CN DATA 091H ; TIMER 3 CONTROL
0092 +1 54 TMR3RLL DATA 092H ; TIMER 3 RELOAD REGISTER - LOW BYTE
0093 +1 55 TMR3RLH DATA 093H ; TIMER 3 RELOAD REGISTER - HIGH BYTE
0094 +1 56 TMR3L DATA 094H ; TIMER 3 - LOW BYTE
0095 +1 57 TMR3H DATA 095H ; TIMER 3 - HIGH BYTE
0097 +1 58 DSRFLG DATA 097H ; DSR FLAG REGISTER
AX51 MACRO ASSEMBLER MIXFRAMEA 06/13/06 10:15:31 PAGE 2
0098 +1 59 SCON DATA 098H ; SERIAL PORT CONTROL
0099 +1 60 SBUF DATA 099H ; SERIAL PORT BUFFER
009A +1 61 SPI0CFG DATA 09AH ; SERIAL PERIPHERAL INTERFACE 0 CONFIGURATION
009B +1 62 SPI0DAT DATA 09BH ; SERIAL PERIPHERAL INTERFACE 0 DATA
009D +1 63 SPI0CKR DATA 09DH ; SERIAL PERIPHERAL INTERFACE 0 CLOCK RATE CONTROL
009E +1 64 CPT0CN DATA 09EH ; COMPARATOR 0 CONTROL
009F +1 65 CPT1CN DATA 09FH ; COMPARATOR 1 CONTROL
00A0 +1 66 P2 DATA 0A0H ; PORT 2
00A4 +1 67 PRT0CF DATA 0A4H ; PORT 0 CONFIGURATION
00A5 +1 68 PRT1CF DATA 0A5H ; PORT 1 CONFIGURATION
00A6 +1 69 PRT2CF DATA 0A6H ; PORT 2 CONFIGURATION
00A7 +1 70 PRT3CF DATA 0A7H ; PORT 3 CONFIGURATION
00A8 +1 71 IE DATA 0A8H ; INTERRUPT ENABLE
00AD +1 72 PRT1IF DATA 0ADH ; PORT 1 EXTERNAL INTERRUPT FLAGS
00AF +1 73 EMI0CN DATA 0AFH ; EXTERNAL MEMORY INTERFACE CONTROL
00B0 +1 74 P3 DATA 0B0H ; PORT 3
00B1 +1 75 OSCXCN DATA 0B1H ; EXTERNAL OSCILLATOR CONTROL
00B2 +1 76 OSCICN DATA 0B2H ; INTERNAL OSCILLATOR CONTROL
00B3 +1 77 DSRL DATA 0B3H ; DSR PORT - LOW BYTE
00B4 +1 78 DSRH DATA 0B4H ; DSR PORT - HIGH BYTE
00B6 +1 79 FLSCL DATA 0B6H ; FLASH MEMORY TIMING PRESCALER
00B7 +1 80 FLACL DATA 0B7H ; FLASH ACESS LIMIT
00B8 +1 81 IP DATA 0B8H ; INTERRUPT PRIORITY
00BA +1 82 AMX0CF DATA 0BAH ; ADC 0 MUX CONFIGURATION
00BB +1 83 AMX0SL DATA 0BBH ; ADC 0 MUX CHANNEL SELECTION
00BC +1 84 ADC0CF DATA 0BCH ; ADC 0 CONFIGURATION
00BE +1 85 ADC0L DATA 0BEH ; ADC 0 DATA - LOW BYTE
00BF +1 86 ADC0H DATA 0BFH ; ADC 0 DATA - HIGH BYTE
00C0 +1 87 SMB0CN DATA 0C0H ; SMBUS 0 CONTROL
00C1 +1 88 SMB0STA DATA 0C1H ; SMBUS 0 STATUS
00C2 +1 89 SMB0DAT DATA 0C2H ; SMBUS 0 DATA
00C3 +1 90 SMB0ADR DATA 0C3H ; SMBUS 0 SLAVE ADDRESS
00C4 +1 91 ADC0GTL DATA 0C4H ; ADC 0 GREATER-THAN REGISTER - LOW BYTE
00C5 +1 92 ADC0GTH DATA 0C5H ; ADC 0 GREATER-THAN REGISTER - HIGH BYTE
00C6 +1 93 ADC0LTL DATA 0C6H ; ADC 0 LESS-THAN REGISTER - LOW BYTE
00C7 +1 94 ADC0LTH DATA 0C7H ; ADC 0 LESS-THAN REGISTER - HIGH BYTE
00C8 +1 95 T2CON DATA 0C8H ; TIMER 2 CONTROL
00CA +1 96 RCAP2L DATA 0CAH ; TIMER 2 CAPTURE REGISTER - LOW BYTE
00CB +1 97 RCAP2H DATA 0CBH ; TIMER 2 CAPTURE REGISTER - HIGH BYTE
00CC +1 98 TL2 DATA 0CCH ; TIMER 2 - LOW BYTE
00CD +1 99 TH2 DATA 0CDH ; TIMER 2 - HIGH BYTE
00CE +1 100 DSROP DATA 0CEH ; DSR OPERAND
00CF +1 101 SMB0CR DATA 0CFH ; SMBUS 0 CLOCK RATE
00D0 +1 102 PSW DATA 0D0H ; PROGRAM STATUS WORD
00D1 +1 103 REF0CN DATA 0D1H ; VOLTAGE REFERENCE 0 CONTROL
00D2 +1 104 DAC0L DATA 0D2H ; DAC 0 REGISTER - LOW BYTE
00D3 +1 105 DAC0H DATA 0D3H ; DAC 0 REGISTER - HIGH BYTE
00D4 +1 106 DAC0CN DATA 0D4H ; DAC 0 CONTROL
00D5 +1 107 DAC1L DATA 0D5H ; DAC 1 REGISTER - LOW BYTE
00D6 +1 108 DAC1H DATA 0D6H ; DAC 1 REGISTER - HIGH BYTE
00D7 +1 109 DAC1CN DATA 0D7H ; DAC 1 CONTROL
00D8 +1 110 PCA0CN DATA 0D8H ; PCA 0 COUNTER CONTROL
00D9 +1 111 PCA0MD DATA 0D9H ; PCA 0 COUNTER MODE
00DA +1 112 PCA0CPM0 DATA 0DAH ; CONTROL REGISTER FOR PCA 0 MODULE 0
00DB +1 113 PCA0CPM1 DATA 0DBH ; CONTROL REGISTER FOR PCA 0 MODULE 1
00DC +1 114 PCA0CPM2 DATA 0DCH ; CONTROL REGISTER FOR PCA 0 MODULE 2
00DD +1 115 PCA0CPM3 DATA 0DDH ; CONTROL REGISTER FOR PCA 0 MODULE 3
00DE +1 116 PCA0CPM4 DATA 0DEH ; CONTROL REGISTER FOR PCA 0 MODULE 4
00E0 +1 117 ACC DATA 0E0H ; ACCUMULATOR
00E1 +1 118 XBR0 DATA 0E1H ; DIGITAL CROSSBAR CONFIGURATION REGISTER 0
00E2 +1 119 XBR1 DATA 0E2H ; DIGITAL CROSSBAR CONFIGURATION REGISTER 1
00E3 +1 120 XBR2 DATA 0E3H ; DIGITAL CROSSBAR CONFIGURATION REGISTER 2
00E6 +1 121 EIE1 DATA 0E6H ; EXTERNAL INTERRUPT ENABLE 1
00E7 +1 122 EIE2 DATA 0E7H ; EXTERNAL INTERRUPT ENABLE 2
00E8 +1 123 ADC0CN DATA 0E8H ; ADC 0 CONTROL
00E9 +1 124 PCA0L DATA 0E9H ; PCA 0 TIMER - LOW BYTE
AX51 MACRO ASSEMBLER MIXFRAMEA 06/13/06 10:15:31 PAGE 3
00EA +1 125 PCA0CPL0 DATA 0EAH ; CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 0 - LOW BYTE
00EB +1 126 PCA0CPL1 DATA 0EBH ; CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 1 - LOW BYTE
00EC +1 127 PCA0CPL2 DATA 0ECH ; CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 2 - LOW BYTE
00ED +1 128 PCA0CPL3 DATA 0EDH ; CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 3 - LOW BYTE
00EE +1 129 PCA0CPL4 DATA 0EEH ; CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 4 - LOW BYTE
00EF +1 130 RSTSRC DATA 0EFH ; RESET SOURCE
00F0 +1 131 B DATA 0F0H ; B REGISTER
00F6 +1 132 EIP1 DATA 0F6H ; EXTERNAL INTERRUPT PRIORITY REGISTER 1
00F7 +1 133 EIP2 DATA 0F7H ; EXTERNAL INTERRUPT PRIORITY REGISTER 2
00F8 +1 134 SPI0CN DATA 0F8H ; SERIAL PERIPHERAL INTERFACE 0 CONTROL
00F9 +1 135 PCA0H DATA 0F9H ; PCA 0 TIMER - HIGH BYTE
00FA +1 136 PCA0CPH0 DATA 0FAH ; CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 0 - HIGH BYTE
00FB +1 137 PCA0CPH1 DATA 0FBH ; CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 1 - HIGH BYTE
00FC +1 138 PCA0CPH2 DATA 0FCH ; CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 2 - HIGH BYTE
00FD +1 139 PCA0CPH3 DATA 0FDH ; CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 3 - HIGH BYTE
00FE +1 140 PCA0CPH4 DATA 0FEH ; CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 4 - HIGH BYTE
00FF +1 141 WDTCN DATA 0FFH ; WATCHDOG TIMER CONTROL
+1 142 ;
+1 143 ;------------------------------------------------------------------------------
+1 144 ;BIT DEFINITIONS
+1 145 ;
+1 146 ; TCON 88H
0088.0 +1 147 IT0 BIT TCON.0 ; EXT. INTERRUPT 0 TYPE
0088.1 +1 148 IE0 BIT TCON.1 ; EXT. INTERRUPT 0 EDGE FLAG
0088.2 +1 149 IT1 BIT TCON.2 ; EXT. INTERRUPT 1 TYPE
0088.3 +1 150 IE1 BIT TCON.3 ; EXT. INTERRUPT 1 EDGE FLAG
0088.4 +1 151 TR0 BIT TCON.4 ; TIMER 0 ON/OFF CONTROL
0088.5 +1 152 TF0 BIT TCON.5 ; TIMER 0 OVERFLOW FLAG
0088.6 +1 153 TR1 BIT TCON.6 ; TIMER 1 ON/OFF CONTROL
0088.7 +1 154 TF1 BIT TCON.7 ; TIMER 1 OVERFLOW FLAG
+1 155 ;
+1 156 ; SCON 98H
0098.0 +1 157 RI BIT SCON.0 ; RECEIVE INTERRUPT FLAG
0098.1 +1 158 TI BIT SCON.1 ; TRANSMIT INTERRUPT FLAG
0098.2 +1 159 RB8 BIT SCON.2 ; RECEIVE BIT 8
0098.3 +1 160 TB8 BIT SCON.3 ; TRANSMIT BIT 8
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -