startup.a51

单片机快速入门原程序

;*****************************************
;	StartUp initialization file STARTUP.A51 for C&ASM mix programing
;-----------------------------------------
$NOMOD51
$include (C8051F000.inc)
;------------------------------------------------------------------------------
NAME    ?C_STARTUP

?C_C51STARTUP   SEGMENT   CODE

?STACK	SEGMENT   IDATA

	RSEG    ?STACK
	DS      1

	EXTRN CODE (?C_START)
	PUBLIC  ?C_STARTUP

;==========================
CSEG    AT      0
?C_STARTUP:
	LJMP    STARTUP1

;-------------------------
	org	0bh
EXTRN CODE (Timer0Int)
	LJMP	Timer0Int	;Vector of TIMER0

;------------------------
	org 	23h
EXTRN CODE (UartInt)
	LJMP    UartInt		;Vector of UART
;=========================
	RSEG    ?C_C51STARTUP
;-------------------------
STARTUP1:
;=========================
;	V8051F007 hardware init
;-------------------------
;	Reset Source select
;- - - - - - - - - - - - -
	clr	ea		;
	mov	RSTSRC, #000h	; Reset Source Register

;-----------------------------
;	Watch Dog Setup(write #FF will lock the WDT in enable state)
;- - - - - - - - - - - - - - -
$if ProgProtect=1
	mov	WDTCN, #0ffh            ;lock the WDT in enable state
$else
	mov	WDTCN, #0deh            ; disable watchdog timer
	mov	WDTCN, #0adh		;(write successive DE then AD will disable WDT)
$endif
;-----------------------------
;	OSC setup
;- - - - - - - - - - - - - - -
$if ExtOsc=1
	mov   	OSCXCN, #67h	; enable external crystal oscillator with Fosc>6.74Mhz

	clr	A		; wait at least 1ms at internal OSC=2Mhz
	djnz	acc, $		; wait ~512us  (256*4T=256*(4/2Mhz)=512us)
	djnz	acc, $		; wait ~512us

osc_wait:                                ; poll for XTLVLD-->1
	mov	a, OSCXCN
	jnb	acc.7, osc_wait

	orl	OSCICN, #08h	; select external oscillator as system clock source

;	orl	OSCXCN, #80h	; enable missing clock detector
$else
	mov   	OSCXCN, #0	; disable external OSC and Ground the XTAL1 internally(see an002.pdf)
$endif

;-----------------------------
;	CrossBar setup
;- - - - - - - - - - - - - - -
$if UartEnable=0
	mov	XBR0, #00h	; Disable UART's TX RX to P0.0 and P0.1
$else
	mov	XBR0, #04h	; Enable UART's TX RX to P0.0 and P0.1 for no-FingerLedMode
$endif

	mov	XBR1, #00h	; XBAR1: Initial Reset Value
	mov	XBR2, #0C0h	; Enable CrossBarCoder and enable Weak-PullUp function

	mov	PRT0CF, #0FFh	; Output configuration for P0(all bit are Push-Pull)
	mov	PRT1CF, #0FFh  
	mov	PRT2CF, #0FFh  
	mov	PRT3CF, #0FFh  

$if FingerLedMode=1 or FingerOLedMode=1
	clr	PowerOnCtrl	;set the Power On
$if FingerOLedMode=1	;for NewVersionSerialMode
	clr	OledPowerOnCtrl	;turn off the HighPower of Oled VCC
$endif
$endif

;-----------------------------
;	Comparator setup
;- - - - - - - - - - - - - - -
	mov	CPT0CN, #000h	  ; Disable Comparator0

;-----------------------------
;	Reference Control Register Configuration
;- - - - - - - - - - - - - - -
	mov	REF0CN, #003h	; InternalSensorOff,EnableInternalBiase,EnableInternalRef

;-----------------------------
;	SPI Configuration
;- - - - - - - - - - - - - - -
	mov	SPI0CN, #000h	; Disable SPI
	mov	SPI0CFG, #000h	; SPI Configuration Register
	mov	SPI0CKR, #000h	; SPI Clock Rate Register

;-----------------------------
;	DAC Configuration
;- - - - - - - - - - - - - - -
$if LowPwrAdDaMode=1
	mov	DAC0CN, #0	; DAC0 Control Register(Disable ADC0 and Right justified)
$else
	mov	DAC0CN, #080h	; DAC0 Control Register(Enable ADC0 and Right justified)
$endif
	mov	DAC0L, #00h	; DAC0 Low Byte Register
	mov	DAC0H, #00h	; DAC0 High Byte Register

$if LowPwrAdDaMode=1
	mov	DAC1CN, #0	; DAC0 Control Register(Disable ADC0 and Right justified)
$else
	mov	DAC1CN, #080h	; DAC0 Control Register(Enable ADC0 and Right justified)
$endif
	mov	DAC1L, #00h	; DAC1 Low Byte Register
	mov	DAC1H, #00h	; DAC1 High Byte Register

;-----------------------------
; SMBus Configuration
;- - - - - - - - - - - - - - -
	mov	SMB0CN, #000h	; SMBus Control Register(Disable SMBus)
	mov	SMB0ADR, #000h	; SMBus Address Register
	mov	SMB0CR, #000h	; SMBus Clock Rate Register

;-----------------------------
;	PCA Configuration(Disable all PCA's)
;- - - - - - - - - - - - - - -
	mov	PCA0MD, #000h   ; PCA Mode Register
	mov	PCA0CN, #000h   ; PCA Control Register
	mov	PCA0L, #000h    ; PCA Counter/Timer Low Byte
	mov	PCA0H, #000h    ; PCA Counter/Timer High Byte 

	;Module 0
	mov	PCA0CPM0, #000h	; PCA Capture/Compare Register 0
	mov	PCA0CPL0, #000h	; PCA Counter/Timer Low Byte
	mov	PCA0CPH0, #000h	; PCA Counter/Timer High Byte

	;Module 1
	mov	PCA0CPM1, #000h	; PCA Capture/Compare Register 1
	mov	PCA0CPL1, #000h	; PCA Counter/Timer Low Byte
	mov	PCA0CPH1, #000h	; PCA Counter/Timer High Byte

	;Module 2
	mov	PCA0CPM2, #000h	; PCA Capture/Compare Register 2
	mov	PCA0CPL2, #000h	; PCA Counter/Timer Low Byte
	mov	PCA0CPH2, #000h	; PCA Counter/Timer High Byte

	;Module 3
	mov	PCA0CPM3, #000h	; PCA Capture/Compare Register 3
	mov	PCA0CPL3, #000h	; PCA Counter/Timer Low Byte
	mov	PCA0CPH3, #000h	; PCA Counter/Timer High Byte

	;Module 4
	mov	PCA0CPM4, #000h	; PCA Capture/Compare Register 4
	mov	PCA0CPL4, #000h	; PCA Counter/Timer Low Byte
	mov	PCA0CPH4, #000h	; PCA Counter/Timer High Byte

;-----------------------------
; ADC Configuration
;- - - - - - - - - - - - - - -
	mov	AMX0CF, #0	; AMUX Configuration Register(all input is single ended)
	mov	AMX0SL, #0	; AMUX Channel Select Register(linear address)
$if ExtOsc=0
	mov	ADC0CF, #20h	; ADC Configuraion Register(SAR=SYSCLK/2,Gain=1),1.7M/2=0.85M
$else

$if FingerLedMode=1 or FingerOLedMode=1
	mov	ADC0CF, #040h	; ADC Configuraion Register(SAR=SYSCLK/4,Gain=1),3.6864/4=0.9216M
$else
	mov	ADC0CF, #060h	; ADC Configuraion Register(SAR=SYSCLK/8,Gain=1),11.0592/8=1.3824M
$endif

$endif

$if LowPwrAdDaMode=1
	mov	ADC0CN, #040h	; ADC Control Register(Disable ADC0,ADCTM=1,TarckingMode=00)
$else
	mov	ADC0CN, #080h	; ADC Control Register(Enable ADC0,always tracking)
$endif	

	mov	ADC0LTH, #000h	; ADC Less-Than High Byte Register
	mov	ADC0LTL, #000h	; ADC Less-Than Low Byte Register
	mov	ADC0GTH, #0FFh	; ADC Greater-Than High Byte Register
	mov	ADC0GTL, #0FFh	; ADC Greater-Than Low Byte Register

;----------------------------------------
	MOV	R0,#0	;old is #7Fh for 128B,new for 256B
	CLR	A
L57C3:	MOV	@R0,A
	DJNZ	R0,L57C3	;Clear 0-FF(256B) of IRAM 
	MOV	EMI0CN,#00H	;Select high address of RAM 
	MOV	R0,#0
	MOV	R7,#0
	CLR	A
L57CE:	MOVX	@R0,A
	INC	R0
	DJNZ	R7,L57CE	;Clear 0000-00FF(256B) of XRAM
;------------------------	
	MOV     SP,#?STACK-1
;------------------------
	LJMP    ?C_START	;to main()
;------------------------
	END