📄 spntestg.lst
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00A9 +1 148 ET0 BIT IE.1 ; TIMER 0 INTERRUPT ENABLE
00AA +1 149 EX1 BIT IE.2 ; EXTERNAL INTERRUPT 1 ENABLE
00AB +1 150 ET1 BIT IE.3 ; TIMER 1 INTERRUPT ENABLE
00AC +1 151 ES BIT IE.4 ; SERIAL PORT INTERRUPT ENABLE
00AD +1 152 ET2 BIT IE.5 ; TIMER 2 INTERRUPT ENABLE
00AF +1 153 EA BIT IE.7 ; GLOBAL INTERRUPT ENABLE
+1 154 ;
+1 155 ; IP B8H
00B8 +1 156 PX0 BIT IP.0 ; EXTERNAL INTERRUPT 0 PRIORITY
00B9 +1 157 PT0 BIT IP.1 ; TIMER 0 PRIORITY
00BA +1 158 PX1 BIT IP.2 ; EXTERNAL INTERRUPT 1 PRIORITY
00BB +1 159 PT1 BIT IP.3 ; TIMER 1 PRIORITY
00BC +1 160 PS BIT IP.4 ; SERIAL PORT PRIORITY
00BD +1 161 PT2 BIT IP.5 ; TIMER 2 PRIORITY
+1 162 ;
+1 163 ; SMB0CN C0H
00C0 +1 164 SMBTOE BIT SMB0CN.0 ; SMBUS 0 TIMEOUT ENABLE
00C1 +1 165 SMBFTE BIT SMB0CN.1 ; SMBUS 0 FREE TIMER ENABLE
00C2 +1 166 AA BIT SMB0CN.2 ; SMBUS 0 ASSERT/ACKNOWLEDGE FLAG
00C3 +1 167 SI BIT SMB0CN.3 ; SMBUS 0 INTERRUPT PENDING FLAG
00C4 +1 168 STO BIT SMB0CN.4 ; SMBUS 0 STOP FLAG
00C5 +1 169 STA BIT SMB0CN.5 ; SMBUS 0 START FLAG
00C6 +1 170 ENSMB BIT SMB0CN.6 ; SMBUS 0 ENABLE
+1 171 ;
+1 172 ; T2CON C8H
00C8 +1 173 CPRL2 BIT T2CON.0 ; CAPTURE OR RELOAD SELECT
00C9 +1 174 CT2 BIT T2CON.1 ; TIMER OR COUNTER SELECT
00CA +1 175 TR2 BIT T2CON.2 ; TIMER 2 ON/OFF CONTROL
00CB +1 176 EXEN2 BIT T2CON.3 ; TIMER 2 EXTERNAL ENABLE FLAG
00CC +1 177 TCLK BIT T2CON.4 ; TRANSMIT CLOCK FLAG
00CD +1 178 RCLK BIT T2CON.5 ; RECEIVE CLOCK FLAG
00CE +1 179 EXF2 BIT T2CON.6 ; EXTERNAL FLAG
00CF +1 180 TF2 BIT T2CON.7 ; TIMER 2 OVERFLOW FLAG
+1 181 ;
+1 182 ; PSW D0H
00D0 +1 183 P BIT PSW.0 ; ACCUMULATOR PARITY FLAG
00D1 +1 184 F1 BIT PSW.1 ; USER FLAG 1
00D2 +1 185 OV BIT PSW.2 ; OVERFLOW FLAG
00D3 +1 186 RS0 BIT PSW.3 ; REGISTER BANK SELECT 0
00D4 +1 187 RS1 BIT PSW.4 ; REGISTER BANK SELECT 1
00D5 +1 188 F0 BIT PSW.5 ; USER FLAG 0
00D6 +1 189 AC BIT PSW.6 ; AUXILIARY CARRY FLAG
00D7 +1 190 CY BIT PSW.7 ; CARRY FLAG
A51 MACRO ASSEMBLER SPNTESTG 06/12/2005 13:40:16 PAGE 4
+1 191 ;
+1 192 ; PCA0CN D8H
00D8 +1 193 CCF0 BIT PCA0CN.0 ; PCA 0 MODULE 0 INTERRUPT FLAG
00D9 +1 194 CCF1 BIT PCA0CN.1 ; PCA 0 MODULE 1 INTERRUPT FLAG
00DA +1 195 CCF2 BIT PCA0CN.2 ; PCA 0 MODULE 2 INTERRUPT FLAG
00DB +1 196 CCF3 BIT PCA0CN.3 ; PCA 0 MODULE 3 INTERRUPT FLAG
00DC +1 197 CCF4 BIT PCA0CN.4 ; PCA 0 MODULE 4 INTERRUPT FLAG
00DE +1 198 CR BIT PCA0CN.6 ; PCA 0 COUNTER RUN CONTROL BIT
00DF +1 199 CF BIT PCA0CN.7 ; PCA 0 COUNTER OVERFLOW FLAG
+1 200 ;
+1 201 ; ADC0CN E8H
00E8 +1 202 ADLJST BIT ADC0CN.0 ; ADC 0 RIGHT JUSTIFY DATA BIT
00E9 +1 203 ADWINT BIT ADC0CN.1 ; ADC 0 WINDOW COMPARE INTERRUPT FLAG
00EA +1 204 ADSTM0 BIT ADC0CN.2 ; ADC 0 START OF CONVERSION MODE BIT 0
00EB +1 205 ADSTM1 BIT ADC0CN.3 ; ADC 0 START OF CONVERSION MODE BIT 1
00EC +1 206 ADBUSY BIT ADC0CN.4 ; ADC 0 BUSY FLAG
00ED +1 207 ADCINT BIT ADC0CN.5 ; ADC 0 CONVERISION COMPLETE INTERRUPT FLAG
00EE +1 208 ADCTM BIT ADC0CN.6 ; ADC 0 TRACK MODE
00EF +1 209 ADCEN BIT ADC0CN.7 ; ADC 0 ENABLE
+1 210 ;
+1 211 ; SPI0CN F8H
00F8 +1 212 SPIEN BIT SPI0CN.0 ; SPI 0 SPI ENABLE
00F9 +1 213 MSTEN BIT SPI0CN.1 ; SPI 0 MASTER ENABLE
00FA +1 214 SLVSEL BIT SPI0CN.2 ; SPI 0 SLAVE SELECT
00FB +1 215 TXBSY BIT SPI0CN.3 ; SPI 0 TX BUSY FLAG
00FC +1 216 RXOVRN BIT SPI0CN.4 ; SPI 0 RX OVERRUN FLAG
00FD +1 217 MODF BIT SPI0CN.5 ; SPI 0 MODE FAULT FLAG
00FE +1 218 WCOL BIT SPI0CN.6 ; SPI 0 WRITE COLLISION FLAG
00FF +1 219 SPIF BIT SPI0CN.7 ; SPI 0 INTERRUPT FLAG
220
221
222 ;=================================
223 ; Pseudo constant definition
224 ;---------------------------------
225 $set (ExtOsc=1) ;1__for use external 11.0592Mhz OSC,0__for use internal 2Mhz OSC(1.
709Mhz)
226 $set (HighBaudrate=1) ;1___high,0___low
227 ;---------------------------------
228 $set (ProgProtect=0)
229 ;---------------------------------
230
231
232 ;=================================
233 ; Parameter Constant definition
234 ;---------------------------------
235 $if ExtOsc=1
D800 236 OSC_FREQ equ 55296 ;OSC frequncy in 200Hz for 11.0592Mhz
237 $else
OSC_FREQ equ 8545 ;OSC frequncy in 200Hz for 1.709Mhz(Note:the maximum consta
nt is 65536)
$endif
240
DC00 241 TIMER0_CNT equ (65536-(OSC_FREQ/6)) ;OSC_FREQ/12/[10000h-X]=100Hz,Cnt=10000h-(O
SC*200/1200)=10000h-(OSC/6)
242
243 ;---------------------------------
244
245 $if HighBaudrate=1
0240 246 BAUD_RATE equ 576 ;BaudRate in 100b/s
247 $else
BAUD_RATE equ 96 ;BaudRate in 100b/s
$endif
0070 250 STACK_TOP equ 70h
251 ; BaudRate=(2**SMOD/32)*OSC/(12*(256-TCN1),SMOD=1,TCN1=256-(OSC/16/12/BaudRate)
252 ; OSC_FREQ=OSC/200,BAUD_RATE=BaudRate/100
253 ; TCNT1=256-(200*OSC_FREQ/16/12/(100*BAUD_RATE))=256-(OSC_FREQ/(6*16*BAUD_RATE))
A51 MACRO ASSEMBLER SPNTESTG 06/12/2005 13:40:16 PAGE 5
254 ; for accuracy, TCNT1=256-((OSC_FREQ/(6*16*BAUD_RATE))+1/2)=(256-((OSC_FREQ+3*16*BAUD_RATE)
/(6*16*BAUD_RATE)))
0100 255 BAUD_FACTOR equ (256-((OSC_FREQ+3*16*BAUD_RATE)/(6*16*BAUD_RATE)))
256 ;注意:对于11.0592Mhz的晶振而言,最大的BAUD_RATE=576
257
258
259 $gen
260
261 ;---------------------------------
262 ;Delay factors for some delay[!!! These constants must be recalculated for every different
OSC_FREQ]
263 ;DDF__delay factor of 4T loop,F=Td/(1000000*4/OSC)=Td*(OSC/200)/4/5000=Td*(OSC_FREQ/4)/5000
264 ;DF___delay factor of 7T loop,F=Td*(OSC_FREQ/7)/5000
265 ;DFL__delay factor of 15T loop,F=Td*(OSC_FREQ/15)/5000
266 ;TDF__delay factor of 12T timer counter,F=Td*(OSC_FREQ/12)/5000
267 ;For the maximum value of middle result must not exceed 65535,the expression must be adjust
ed as following:
0053 268 DDF30US equ ((3*(OSC_FREQ/4)+250)/500) ;30*(OSC_FREQ/4)/5000+0.5,13__1.709
M,83__11.0592M
269 ;(Ued in Delay30us,a new delay function)
0020 270 DF20US equ ((OSC_FREQ+7*125)/(7*250)) ;20*(OSC_FREQ/7)/5000+0.5,5__1.709M
,32__11.0592M
271
272 ;=================================
273 ; Constant definition for New SpO2Board
274 ;---------------------------------
0084 275 RedLedSw equ P0.4 ;RedLedSwitch Bit(RedLedSw=1 and IredLedSw=0 for RedLed)
0085 276 IredLedSw equ P0.5 ;IredLedSwitch Bit(RedLedSw=0 and IredLedSw=1 for IredLed)
277
278 ;---------
279 ; Constant definition for ADC channel
0000 280 PHONO_CH equ 0
0001 281 DAC0_CH equ 1
0002 282 LEDDRV_CH equ 2
0003 283 SENDET_CH equ 3
284
285 ;---------
286 ; constant for data convertion
0010 287 LEDDRV_ENRATIO equ 16 ;LedDrive current data enlarge ratio
288 ;-----------
289
290 ;=================================
291 ; Bit argument area
292 ;---------------------------------
---- 293 bseg at 20h
0020 294 Erro: dbit 1 ;校验出错位
0021 295 SendRdy: dbit 1 ;有发送示菸⌨️ 快捷键说明
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