📄 xsmsldcs.h
字号:
/******************************************************************************
**
** COPYRIGHT (C) 2000, 2001 Intel Corporation.
**
** This software as well as the software described in it is furnished under
** license and may only be used or copied in accordance with the terms of the
** license. The information in this file is furnished for informational use
** only, is subject to change without notice, and should not be construed as
** a commitment by Intel Corporation. Intel Corporation assumes no
** responsibility or liability for any errors or inaccuracies that may appear
** in this document or any software that may be provided in association with
** this document.
** Except as permitted by such license, no part of this document may be
** reproduced, stored in a retrieval system, or transmitted in any form or by
** any means without the express written consent of Intel Corporation.
**
** FILENAME: XsMslDcs.h
**
** PURPOSE: <Module description here>
**
** LAST MODIFIED: $Modtime: 7/17/03 1:01p $
******************************************************************************/
#ifndef _XsMslDcs_h_
#define _XsMslDcs_h_
#include "XsMslApi.h"
#include "XsDmaApi.h"
/*
*******************************************************************************
* MSL Buffer Linked List
*******************************************************************************
*/
typedef struct XsMslLLElemS* XsMslLLElemTPT;
typedef struct XsMslLLElemS
{
// Buffer to Transmit
PCHAR buffer;
// Length of Buffer to Transmit
UINT32 length;
// for interrupt mode, current position in transmit/receive
UINT32 position;
// next in Linked List
XsMslLLElemTPT next;
// Notes
// If length = 0, then this element is not ready for use (when buffer is currently
// being filled, position != 0).
// When the buffer has finished reading, position = length.
// When the buffer is initially ready for use, position = 0, length = # of bytes.
} XsMslLLElemT;
/*
*******************************************************************************
* MSL Baseband Device Context Structure.
*******************************************************************************
*/
typedef struct XsMslContextS
{
// Error handling
// Used for error logging
UINT32 loggedError;
// Used for error logging
UINT32 isrError;
// Device register base
PVOID RegsP;
// MSL Baseband Interface APIs
XsMslHWSetupT XsMslHWSetupFnP; // HW initialization
XsMslHWShutdownT XsMslHWShutdownFnP; // HW shutdown
XsMslTransmitPacketT XsMslTransmitPacketFnP; // Transmit packet
XsMslReceivePacketT XsMslReceivePacketFnP; // Receive packet
XsMslChannelStatusT XsMslChannelStatusFnP; // Channel status
XsMslPacketAvailT XsMslPacketAvailFnP; // Received Data Ready?
XsMslChangeConfigurationT XsMslChangeConfigurationFnP; // Change the channel configuration
XsMslEnableTxServiceT XsMslEnableTxServiceFnP; // Enable Transmit Service
XsMslEnableRxServiceT XsMslEnableRxServiceFnP; // Enable Receive Service
XsMslDisableTxServiceT XsMslDisableTxServiceFnP; // Disable Transmit Service
XsMslDisableRxServiceT XsMslDisableRxServiceFnP; // Disable Receive Service
// Configuration parameters.
MslCfgT *mslCfgP; // Pointer to the configuration
// Size of the transmit and receive buffers.
UINT32 tx_length; // Length of the allocated transmit buffer.
UINT32 rx_length; // Length of the allocated receive buffer.
// MSL Baseband HW Config Parameters
UINT32 tx_wait; // wait clock cycles before retransmission [0-1023]
UINT32 clock_count; // idle count before stop clock [0-15]
UINT32 freq_divider; // Clock is 48 Mhz / clock divider [0-255]
UINT32 txinterfacewidth; // 1,2, or 4 bits
UINT32 rxinterfacewidth; // 1,2, or 4 bits
// UINT32 start_thresh; // Emptiness of FIFO for data to be sent
// UINT32 stop_thresh; // Fullness of FIFO for transmission to stop
// MSL Baseband configuration parameters
UINT32 tx_blocksize[XSMSL_CHANNEL_NUM]; // transmit block size
UINT32 tx_fifoservice[XSMSL_CHANNEL_NUM]; // type of service
UINT32 tx_flowcontrol[XSMSL_CHANNEL_NUM]; // DFC or MFC
// amount of data I can load the fifo
UINT32 tx_loadfifo_amt[XSMSL_CHANNEL_NUM];
UINT32 tx_threshold[XSMSL_CHANNEL_NUM]; // Tx threshold
UINT32 rx_flowcontrol[XSMSL_CHANNEL_NUM]; // DFC or MFC
UINT32 rx_fifoservice[XSMSL_CHANNEL_NUM]; // type of service
UINT32 rx_threshold[XSMSL_CHANNEL_NUM]; // Tx threshold
UINT32 tx_wait_count[XSMSL_CHANNEL_NUM]; // Number of tx wait seen
UINT32 rx_wait_count[XSMSL_CHANNEL_NUM]; // Number of rx wait seen
UINT32 tx_not_empty_count[XSMSL_CHANNEL_NUM]; // Number of tx not empty
UINT32 rx_empty_count[XSMSL_CHANNEL_NUM]; // Number of rx empty
UINT32 tx_full_count[XSMSL_CHANNEL_NUM]; // Number of tx full seen
UINT32 rx_full_count[XSMSL_CHANNEL_NUM]; // Number of rx full seen
// BUFFER Variables for MSL transmit/receive
// pointer to start of linked list buffer
XsMslLLElemTPT tx_llfirst[XSMSL_CHANNEL_NUM];
// pointer to end of linked list buffer
XsMslLLElemTPT tx_lllast[XSMSL_CHANNEL_NUM];
// pointer to start of linked list buffer
XsMslLLElemTPT rx_llfirst[XSMSL_CHANNEL_NUM];
// pointer to end of linked list buffer
XsMslLLElemTPT rx_lllast[XSMSL_CHANNEL_NUM];
// INT stuff
// interrupt handler installed = 1
INT handler_installed;
// DMA stuff
// DMA Channels for MSL to Queue, -1 means no channel setup
INT dma_rx_channel1[XSMSL_CHANNEL_NUM];
// DMA Channels for Queue to Memory, -1 means no channel setup
INT dma_rx_channel2[XSMSL_CHANNEL_NUM];
// DMA Channels for Memory to Queue, -1 means no channel setup
INT dma_tx_channel1[XSMSL_CHANNEL_NUM];
// DMA Channels for Queue to MSL, -1 means no channel setup
INT dma_tx_channel2[XSMSL_CHANNEL_NUM];
XsDmaDescriptorElementsTPT rx1_firstDescVtP[XSMSL_CHANNEL_NUM];
XsDmaDescriptorElementsTPT rx2_firstDescVtP[XSMSL_CHANNEL_NUM];
XsDmaDescriptorElementsTPT tx1_firstDescVtP[XSMSL_CHANNEL_NUM];
XsDmaDescriptorElementsTPT tx2_firstDescVtP[XSMSL_CHANNEL_NUM];
// RX Interrupt occured on which channel
UINT32 rx_interrupt_channel;
// TX Interrupt occured on which channel
UINT32 tx_interrupt_channel;
// DMA Status
MslDmaStatusT dmaRxStatus[XSMSL_CHANNEL_NUM];
MslDmaStatusT dmaTxStatus[XSMSL_CHANNEL_NUM];
// DMA Complete Flags
BOOL xferRxComplete[XSMSL_CHANNEL_NUM];
BOOL xferTxComplete[XSMSL_CHANNEL_NUM];
} XsMslContextT;
/*
*******************************************************************************
* MSL Function Prototypes
*******************************************************************************
*/
VOID XsMslSWInit (VOID);
VOID XsMslInterruptHandler (PVOID);
UINT32 XsMslBgInterruptTransmitPacket(XsMslContextT*, UINT32);
UINT32 XsMslBgInterruptReceivePacket(XsMslContextT*, UINT32);
VOID XsMslBgDmaTransmitPacket(PVOID, UINT32);
VOID XsMslBgDmaReceivePacket(PVOID, UINT32);
UINT32 XsMslChannelStatus(XsMslContextT *ctxP, UINT32 channel_offset);
UINT32 XsMslChangeConfiguration(XsMslContextT *ctxP, UINT32 channel_offset);
UINT32 XsMslEnableTxService(XsMslContextT *ctxP, UINT32 channel_offset);
UINT32 XsMslEnableRxService(XsMslContextT *ctxP, UINT32 channel_offset);
UINT32 XsMslDisableTxService(XsMslContextT *ctxP, UINT32 channel_offset);
UINT32 XsMslDisableRxService(XsMslContextT *ctxP, UINT32 channel_offset);
UINT32 XsMslHWSetup(XsMslContextT *ctxP);
void SetGPIO (void);
#ifdef XSMSL_GLOBALS
#define EXTRN
#else
#define EXTRN extern
#endif
#define MSL_MAX_CONTEXT 1
EXTRN XsMslContextT context[MSL_MAX_CONTEXT];
#undef EXTRN
#endif // _XsMslDcs_h_
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -