xsmsl.c

优龙YLP270开发板 光盘自带的BIOS和实验例程源码 强烈推荐

            // install interrupt handler if it hasn't been installed yet
            if (!ctxP->handler_installed)
            {

                DM_CwDbgPrintf(DM_CW_MSL_1, "XsIcRegisterHandler");

                ctxP->handler_installed = 1;
                status = XsIcRegisterHandler (XSIC_BASEBAND_SGNL, 
                                              XsMslInterruptHandler,
                                              ctxP);
                if (status != ERR_NONE)
                {
                    LOGERRORX(ctxP->loggedError, ERR_L_MSL, ERR_S_MSL_TX_CONFIG, 
                                7, ERR_T_NO_HANDLER, 0, 0, 0);
                    DM_LEAVE(DM_CW_MSL_1);
                    return (ctxP->loggedError);
                }

                DM_CwDbgPrintf(DM_CW_MSL_1, "XsIcEnableIrqDeviceInt");

               // Enable first level MSL interrupt
               status = XsIcEnableIrqDeviceInt (XSIC_BASEBAND_SGNL);
               if (status)
               {
                    LOGERRORX(ctxP->loggedError, ERR_L_MSL, ERR_S_MSL_TX_CONFIG,
                              8, ERR_T_ILLPARAM, 0, 0, 0);
                    DM_LEAVE(DM_CW_MSL_1);
                    return (ctxP->loggedError);
               }
            }

            break;

        case TXSERVICE_DMA:

            DM_CwDbgPrintf(DM_CW_MSL_1, "FIFO_SERVICE_DMA");

            DM_CwDbgPrintf(DM_CW_MSL_1, "Calling XsDmaConfigureMemToMem for transmit");

            // Memory to Queue DMA config
            status = XsDmaConfigureMemToMem(
                        XSDMA_CH_PR_HIGH,
                        XSDMA_DN_MEMORY,
                        &ctxP->tx1_firstDescVtP[channel_offset],
                        MSL_TX_NUM_DEV_DESC,
                        ctxP->tx_length, 
                        NULL,
                        NULL,
                        0,
                        &ctxP->dma_tx_channel1[channel_offset]);
            if (status != ERR_NONE)
            {
                LOGERRORX(ctxP->loggedError, ERR_L_MSL, ERR_S_MSL_TX_CONFIG, 
                            9, ERR_T_ILLPARAM, 0, 0, 0);
                DM_LEAVE(DM_CW_MSL_1);
                return (ctxP->loggedError);
            }

            DM_CwDbgPrintf(DM_CW_MSL_1, "Free descriptors");

            // Throw away the allocated buffer for the source and target.
            free(ctxP->tx1_firstDescVtP[channel_offset]->sourceVirtualAddr);
            free(ctxP->tx1_firstDescVtP[channel_offset]->targetVirtualAddr);

            DM_CwDbgPrintf(DM_CW_MSL_1, "Calling XsDmaConfigureDevice for transmit");

            // Queue to MSL DMA config
            status = XsDmaConfigureDevice(
                        XSDMA_CH_PR_LOW,
                        XSDMA_DN_BASEBAND_1 + channel_offset,
                        TRUE,
                        &ctxP->tx2_firstDescVtP[channel_offset],
                        MSL_RX_NUM_MEM_DESC,
                        ctxP->tx_length,
                        XsMslBgDmaTransmitPacket,
                        ctxP,
                        DCSR_STOPINTR,
                        &ctxP->dma_tx_channel2[channel_offset]);
            if (status != ERR_NONE)
            {
                LOGERRORX(ctxP->loggedError, ERR_L_MSL, ERR_S_MSL_TX_CONFIG, 
                            10, ERR_T_ILLPARAM, 0, 0, 0);
                DM_LEAVE(DM_CW_MSL_1);
                return (ctxP->loggedError);
            }

            break;
    }

    DM_LEAVE(DM_CW_MSL_1);
    return (ERR_S_MSL_NONE);
}

/*
*******************************************************************************
*
* FUNCTION:
*    SetMslConfiguration
*
* DESCRIPTION:
*    Convert the users configuration to the driver configuration.
*
* INPUT PARAMETERS:
*    XsMslContextT      ctxP
*
* RETURNS:
*    None.
*
* GLOBAL EFFECTS:
*    The MSL Device Context Structure is initialized via the user's
*    configuration.
*
* ASSUMPTIONS:
*    None.
*
* CALLS:
*    None.
*
* CALLED BY:
*    MSL Device Driver.
*
* PROTOTYPE:
*    static
*    VOID SetMslConfiguration(XsMslContextT *ctxP)
*
*******************************************************************************
*/
static
VOID SetMslConfiguration(XsMslContextT *ctxP)
{
    MslCfgT *mslCfgP = ctxP->mslCfgP;
    UINT maxChannel = mslCfgP->channel;
    UINT x;

    DM_FUNC("SetMslConfiguration");
    DM_ENTER(DM_CW_MSL_1);

    // Initialize the DMA channels and linked lists to inactive.
    for (x = 0; x < XSMSL_CHANNEL_NUM; x++)
    {
        // Signify that no dma channels are active
        ctxP->dma_rx_channel1[x] = -1;
        ctxP->dma_rx_channel2[x] = -1;
        ctxP->dma_tx_channel1[x] = -1;
        ctxP->dma_tx_channel2[x] = -1;

        // The Link List is empty.
        ctxP->tx_llfirst[x] = NULL;
        ctxP->tx_lllast[x] = NULL;
        ctxP->rx_llfirst[x] = NULL;
        ctxP->rx_lllast[x] = NULL;
    }

    // Determine the specified channels.
    if (mslCfgP->channel)
    {
        // Just one channel has been specified.
        maxChannel = mslCfgP->channel;
        x = mslCfgP->channel - 1;
    }
    else
    {
        // All channels have been specified.
        x = 0;
        maxChannel = XSMSL_CHANNEL_NUM;
    }

    // Set the transmit length.
    ctxP->tx_length = mslCfgP->tx_length;
    // Set the receive length.
    ctxP->rx_length = mslCfgP->rx_length;

    // Set transmit wait.
    ctxP->tx_wait = mslCfgP->tx_wait;

    // Set clock count.
    ctxP->clock_count = mslCfgP->clock_count;

    // Set frequency divider.
    ctxP->freq_divider = mslCfgP->freq_divider;

//    ctxP->start_thresh = 4;  // Transmitter continues sending if rx fifo < 4 Bytes
//    ctxP->stop_thresh = 48;  // Receiver sent wait if rx fifo > 48 Bytes

    // Convert the bit width parameter to the value.
    switch (mslCfgP->bit_width)
    {
        case IF_1BIT:    // Serial
            ctxP->txinterfacewidth = TX_ITFC_1BIT;
            ctxP->rxinterfacewidth = RX_ITFC_1BIT;
            break;

        case IF_2BITS:   // Two-bit
            ctxP->txinterfacewidth = TX_ITFC_2BIT;
            ctxP->rxinterfacewidth = RX_ITFC_2BIT;
            break;

        case IF_4BITS:   // Nibble
            ctxP->txinterfacewidth = TX_ITFC_4BIT;
            ctxP->rxinterfacewidth = RX_ITFC_4BIT;
            break;

        default:    // Nibble
            ctxP->txinterfacewidth = TX_ITFC_4BIT;
            ctxP->rxinterfacewidth = RX_ITFC_4BIT;
            break;
    }

    // Set the parameters for all configured channels.
    for (; x < maxChannel; x++)
    {
        // Convert the transmit block size parameter to the value.
        switch (mslCfgP->tx_blocksize)
        {
            case BLOCKSIZE_4B:    // 4 bytes
                ctxP->tx_blocksize[x] = TXBLOCK_4B;
                break;

            case BLOCKSIZE_8B:    // 8 bytes
                ctxP->tx_blocksize[x] = TXBLOCK_8B;
                break;

            case BLOCKSIZE_16B:    // 16 bytes
                ctxP->tx_blocksize[x] = TXBLOCK_16B;
                break;

            case BLOCKSIZE_32B:    // 32 bytes
                ctxP->tx_blocksize[x] = TXBLOCK_32B;
                break;

            default:    // 32 bytes
                ctxP->tx_blocksize[x] = TXBLOCK_32B;
                break;
        }

        // Convert the transmit fifo service parameter to the value.
        switch (mslCfgP->tx_fifo_service)
        {
            case FIFO_SERVICE_POLL:
                DM_CwDbgPrintf(DM_CW_MSL_1, "TX FIFO_SERVICE_POLL");
                ctxP->tx_fifoservice[x] = TXSERVICE_NONE;
                break;

            case FIFO_SERVICE_INT:
                DM_CwDbgPrintf(DM_CW_MSL_1, "TX FIFO_SERVICE_INT");
                ctxP->tx_fifoservice[x] = TXSERVICE_INT;
                break;

            case FIFO_SERVICE_DMA:
                DM_CwDbgPrintf(DM_CW_MSL_1, "TX FIFO_SERVICE_DMA");
                ctxP->tx_fifoservice[x] = TXSERVICE_DMA;
                break;

            default:    // NONE
                DM_CwDbgPrintf(DM_CW_MSL_1, "TX FIFO_SERVICE_NONE");
                ctxP->tx_fifoservice[x] = TXSERVICE_NONE;
                break;
        }

        // Convert the receive fifo service parameter to the value.
        switch (mslCfgP->rx_fifo_service)
        {
            case FIFO_SERVICE_POLL:
                DM_CwDbgPrintf(DM_CW_MSL_1, "RX FIFO_SERVICE_POLL");
                ctxP->rx_fifoservice[x] = RXSERVICE_NONE;
                break;

            case FIFO_SERVICE_INT:
                DM_CwDbgPrintf(DM_CW_MSL_1, "RX FIFO_SERVICE_INT");
                ctxP->rx_fifoservice[x] = RXSERVICE_INT;
                break;

            case FIFO_SERVICE_DMA:
                DM_CwDbgPrintf(DM_CW_MSL_1, "RX FIFO_SERVICE_DMA");
                ctxP->rx_fifoservice[x] = RXSERVICE_DMA;
                break;

            default:    // NONE
                DM_CwDbgPrintf(DM_CW_MSL_1, "RX FIFO_SERVICE_NONE");
                ctxP->rx_fifoservice[x] = RXSERVICE_NONE;
                break;
        }

        // Convert the transmit flow control parameter to the value.
        switch(mslCfgP->tx_flowcontrol)
        {
            case NONE:
                DM_CwDbgPrintf(DM_CW_MSL_1, "TX No flow control");
                ctxP->tx_flowcontrol[x] = 0;
                break;

            case DFC:
                DM_CwDbgPrintf(DM_CW_MSL_1, "TX Direct Flow Control");
                ctxP->tx_flowcontrol[x] = TXDFCENABLE;
                break;

            case MFC:
                DM_CwDbgPrintf(DM_CW_MSL_1, "TX Message Flow Control");
                ctxP->tx_flowcontrol[x] = TXMFCENABLE;
                break;

            default:    // None
                DM_CwDbgPrintf(DM_CW_MSL_1, "TX No flow control");
                ctxP->tx_flowcontrol[x] = 0;
                break;
        }

        // Convert the receive flow control parameter to the value.
        switch(mslCfgP->rx_flowcontrol)
        {
            case NONE:
                DM_CwDbgPrintf(DM_CW_MSL_1, "RX No flow control");
                ctxP->rx_flowcontrol[x] = 0;
                break;

            case DFC:
                DM_CwDbgPrintf(DM_CW_MSL_1, "RX Direct Flow Control");
                ctxP->rx_flowcontrol[x] = RXDFCENABLE;
                break;

            case MFC:
                DM_CwDbgPrintf(DM_CW_MSL_1, "RX Message Flow Control");
                ctxP->rx_flowcontrol[x] = RXMFCENABLE;
                break;

            default:    // None
                DM_CwDbgPrintf(DM_CW_MSL_1, "RX No flow control");
                ctxP->rx_flowcontrol[x] = 0;
                break;
        }

        // Calculate the FIFO level.
        ctxP->tx_loadfifo_amt[x] = FIFO_LEN - mslCfgP->tx_threshold;

        // Convert the transmt threshold parameter to the value.
        switch (mslCfgP->tx_threshold)
        {
            case THRESHOLD_4B:    // 4 bytes
                DM_CwDbgPrintf(DM_CW_MSL_1, "TX THRESHOLD_4B");
                ctxP->tx_threshold[x] = TXTHRESHLEVEL_4B;
                break;

            case THRESHOLD_8B:    // 8 bytes
                DM_CwDbgPrintf(DM_CW_MSL_1, "TX THRESHOLD_8B");
                ctxP->tx_threshold[x] = TXTHRESHLEVEL_8B;
                break;

            case THRESHOLD_16B:    // 16 bytes
                DM_CwDbgPrintf(DM_CW_MSL_1, "TX THRESHOLD_16B");
                ctxP->tx_threshold[x] = TXTHRESHLEVEL_16B;
                break;

            case THRESHOLD_32B:    // 32 bytes
                DM_CwDbgPrintf(DM_CW_MSL_1, "TX THRESHOLD_32B");
                ctxP->tx_threshold[x] = TXTHRESHLEVEL_32B;
                break;

            default:    // 32 bytes
                DM_CwDbgPrintf(DM_CW_MSL_1, "TX THRESHOLD_32B");
                ctxP->tx_threshold[x] = TXTHRESHLEVEL_32B;
                break;
        }
    
        // Convert the receive threshold parameter to the value.
        switch (mslCfgP->rx_threshold)
        {
            case THRESHOLD_4B:    // 4 bytes
                DM_CwDbgPrintf(DM_CW_MSL_1, "RX THRESHOLD_4B");
                ctxP->rx_threshold[x] = RXTHRESHLEVEL_4B;
                break;

            case THRESHOLD_8B:    // 8 bytes
                DM_CwDbgPrintf(DM_CW_MSL_1, "RX THRESHOLD_8B");
                ctxP->rx_threshold[x] = RXTHRESHLEVEL_8B;
                break;

            case THRESHOLD_16B:    // 16 bytes
                DM_CwDbgPrintf(DM_CW_MSL_1, "RX THRESHOLD_16B");
                ctxP->rx_threshold[x] = RXTHRESHLEVEL_16B;
                break;

            case THRESHOLD_32B:    // 32 bytes
                DM_CwDbgPrintf(DM_CW_MSL_1, "RX THRESHOLD_32B");
                ctxP->rx_threshold[x] = RXTHRESHLEVEL_32B;
                break;

            default:    // 32 bytes
                DM_CwDbgPrintf(DM_CW_MSL_1, "RX THRESHOLD_32B");
                ctxP->rx_threshold[x] = RXTHRESHLEVEL_32B;
                break;
        }

    }

    // Initialize to No Interrupt Handler Installed