xsgpioplatform.h

优龙YLP270开发板 光盘自带的BIOS和实验例程源码 强烈推荐

    //  29 - AC_SDIN: AC-Link Serial Data In
{_XSG_AC97,            XS_GPIO_ALT_FUNC_1,    XS_GPIO_DIR_IN,  XS_GPIO_PIN_LEVEL_X,       FALSE},
    //  30 - AC_SOUT: AC-Link Serial Data Out
{_XSG_AC97,            XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_X,       FALSE},
    //  31 - AC_SYNC: AC-Link Sync
{_XSG_AC97,            XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_1,       FALSE},
    //  32 - MMCLK: MultiMediaCard Clock
{_XSG_MMC,             XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_X,       FALSE},
    //  33 - nCS5: Chip Select 5
{_XSG_NCS_5,           XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_1,       FALSE},
    //  34 - FF_RXD: Full Featured UART Receive
{_XSG_FFUART,          XS_GPIO_ALT_FUNC_1,    XS_GPIO_DIR_IN,  XS_GPIO_PIN_LEVEL_X,       FALSE},
    //  35 - FF_CTS: Full Featured UART Clear to Send
{_XSG_FFUART,          XS_GPIO_ALT_FUNC_1,    XS_GPIO_DIR_IN,  XS_GPIO_PIN_LEVEL_X,       FALSE},
    //  36 - FF_DCD: Full Featured UART Data Carrier Detect
{_XSG_FFUART,          XS_GPIO_ALT_FUNC_1,    XS_GPIO_DIR_IN,  XS_GPIO_PIN_LEVEL_X,       FALSE},
    //  37 - FF_DSR: Full Featured UART Data Set Ready
{_XSG_FFUART,          XS_GPIO_ALT_FUNC_1,    XS_GPIO_DIR_IN,  XS_GPIO_PIN_LEVEL_X,       FALSE},
    //  38 - FF_RI:  Full Featured UART Ring Indicator
{_XSG_FFUART,          XS_GPIO_ALT_FUNC_1,    XS_GPIO_DIR_IN,  XS_GPIO_PIN_LEVEL_X,       FALSE},
    //  39 - FF_TXD: Full Featured UART Transmit
{_XSG_FFUART,          XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_1,       FALSE},
    //  40 - FF_DTR: Full Featured UART Data Terminal Ready
{_XSG_FFUART,          XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_1,       FALSE},
    //  41 - FF_RTS: Full Featured UART Request To Send
{_XSG_FFUART,          XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_1,       FALSE},
    //  42 - BT_RXD: BluetoothUART Receive
{_XSG_BTUART,          XS_GPIO_ALT_FUNC_1,    XS_GPIO_DIR_IN,  XS_GPIO_PIN_LEVEL_X,       FALSE},
    //  43 - BT_TXD: Bluetooth UART Transmit
{_XSG_BTUART,          XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_1,       FALSE},
    //  44 - BT_CTS: Bluetooth UART Clear to Send
{_XSG_BTUART,          XS_GPIO_ALT_FUNC_1,    XS_GPIO_DIR_IN,  XS_GPIO_PIN_LEVEL_X,       FALSE},
    //  45 - BT_RTS: Bluetooth UART Request to Send
{_XSG_BTUART,          XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_1,       FALSE},
    //  46 - IR_RXD: iRDA UART Receive
{_XSG_ICP,             XS_GPIO_ALT_FUNC_1,    XS_GPIO_DIR_IN,  XS_GPIO_PIN_LEVEL_X,       FALSE},
    //  47 - IR_TXD: iRDA UART Transmit
{_XSG_ICP,             XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_1,       FALSE},
    //  48 - nPOE: PCMCIA Output Enable
{_XSG_CARD,            XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_ASSUMED_1,FALSE},
    //  49 - nPWE: PCMCIA Write Enable
{_XSG_CARD,            XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_ASSUMED_1,FALSE},
    //  50 - nPIOR: PCMCIA I/O Read
{_XSG_CARD,            XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_ASSUMED_1,FALSE},
    //  51 - nPIOW: PCMCIA I/O Write
{_XSG_CARD,            XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_ASSUMED_1,FALSE},
    //  52 - GPIO[52]
{_XSG_CARD,            XS_GPIO_ALT_FUNC_GPIO, XS_GPIO_DIR_IN,  XS_GPIO_PIN_LEVEL_X,       FALSE},
    //  53 - BB_OB_STB
{_XSG_CARD,            XS_GPIO_ALT_FUNC_1,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_X,       FALSE},
    //  54 - nPCE2: PCMCIA Card Enable high byte lane
{_XSG_CARD,            XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_ASSUMED_1,FALSE},
    //  55 - nPREG: PCMCIA Register Select
{_XSG_CARD,            XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_ASSUMED_1,FALSE},
    //  56 - nPWAIT: PCMCIA Wait
{_XSG_CARD,            XS_GPIO_ALT_FUNC_1,    XS_GPIO_DIR_IN,  XS_GPIO_PIN_LEVEL_X,       FALSE},
    //  57 - nPIOIS16: PCMCIA I/O is 16 bits wide
{_XSG_CARD,            XS_GPIO_ALT_FUNC_1,    XS_GPIO_DIR_IN,  XS_GPIO_PIN_LEVEL_X,       FALSE},

// Next 16 are LCD data lines 0..15
    //  58 - L_DD_0: LCD data pin 0
{_XSG_LCD,             XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_0,       FALSE},
    //  59 - L_DD_1: LCD data pin 1
{_XSG_LCD,             XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_0,       FALSE},
    //  60 - L_DD_2: LCD data pin 2
{_XSG_LCD,             XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_0,       FALSE},
    //  61 - L_DD_3: LCD data pin 3
{_XSG_LCD,             XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_0,       FALSE},
    //  62 - L_DD_4: LCD data pin 4
{_XSG_LCD,             XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_0,       FALSE},
    //  63 - L_DD_5: LCD data pin 5
{_XSG_LCD,             XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_0,       FALSE},
    //  64 - L_DD_6: LCD data pin 6
{_XSG_LCD,             XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_0,       FALSE},
    //  65 - L_DD_7: LCD data pin 7
{_XSG_LCD,             XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_0,       FALSE},
    //  66 - L_DD_8: LCD data pin 8
{_XSG_LCD,             XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_0,       FALSE},
    //  67 - L_DD_9: LCD data pin 9
{_XSG_LCD,             XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_0,       FALSE},
    //  68 - L_DD_10: LCD data pin 10
{_XSG_LCD,             XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_0,       FALSE},
    //  69 - L_DD_11: LCD data pin 11
{_XSG_LCD,             XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_0,       FALSE},
    //  70 - L_DD_12: LCD data pin 12
{_XSG_LCD,             XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_0,       FALSE},
    //  71 - L_DD_13: LCD data pin 13
{_XSG_LCD,             XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_0,       FALSE},
    //  72 - L_DD_14: LCD data pin 14
{_XSG_LCD,             XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_0,       FALSE},
    //  73 - L_DD_15: LCD data pin 15
{_XSG_LCD,             XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_0,       FALSE},

    //  74 - L_FCLK: LCD Frame Clock
{_XSG_LCD,             XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_0,       FALSE},
    //  75 - L_LCLK: LCD Line Clock
{_XSG_LCD,             XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_0,       FALSE},
    //  76 - L_PCLK: LCD Pixel Clock
{_XSG_LCD,             XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_0,       FALSE},
    //  77 - L_BIAS: LCD AC Bias Drive
{_XSG_LCD,             XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_0,       FALSE},
    //  78 - nCS_2: disable by default
{_XSG_NCS_2,           XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_1,       FALSE},
    //  79 - nPSKTSEL: PCMCIA Socket Select
{_XSG_CARD,            XS_GPIO_ALT_FUNC_1,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_ASSUMED_1,FALSE},
    //  80 - nCS_4: disable by default
{_XSG_NCS_4,           XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_1,       FALSE},

    //  81 - GPIO[81]
{_XSG_GPIO,            XS_GPIO_ALT_FUNC_GPIO, XS_GPIO_DIR_IN,  XS_GPIO_PIN_LEVEL_X,       FALSE},
    //  82 - GPIO[82]
{_XSG_GPIO,            XS_GPIO_ALT_FUNC_GPIO, XS_GPIO_DIR_IN,  XS_GPIO_PIN_LEVEL_X,       FALSE},
    //  83 - GPIO[83]
{_XSG_GPIO,            XS_GPIO_ALT_FUNC_GPIO, XS_GPIO_DIR_IN,  XS_GPIO_PIN_LEVEL_X,       FALSE},
    //  84 - GPIO[84]
{_XSG_GPIO,            XS_GPIO_ALT_FUNC_GPIO, XS_GPIO_DIR_IN,  XS_GPIO_PIN_LEVEL_X,       FALSE},
    //  85 - nPCE1: PCMCIA Card Enable low byte lane
{_XSG_CARD,            XS_GPIO_ALT_FUNC_1,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_ASSUMED_1,FALSE},
    //  86 - GPIO[86]
{_XSG_GPIO,            XS_GPIO_ALT_FUNC_GPIO, XS_GPIO_DIR_IN,  XS_GPIO_PIN_LEVEL_X,       FALSE},
    //  87 - GPIO[87]
{_XSG_GPIO,            XS_GPIO_ALT_FUNC_GPIO, XS_GPIO_DIR_IN,  XS_GPIO_PIN_LEVEL_X,       FALSE},
    //  88 - USBHBWR[0]
{_XSG_GPIO,            XS_GPIO_ALT_FUNC_1,    XS_GPIO_DIR_IN,  XS_GPIO_PIN_LEVEL_X,       FALSE},
    //  89 - USBHPEN[0]
{_XSG_GPIO,            XS_GPIO_ALT_FUNC_2,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_X,       FALSE}

} ; // End of XsGpioDfltCfgTblNoExpBd[]

/*
*******************************************************************************
  Default GPIO Configuration Table for daughtercard with Mainstone.
*******************************************************************************
*/

XsGpioDefaultEntryT XsGpioDfltCfgTblWithExpBd [XS_GPIO_PIN_COUNT]=
{
     // GPIO ID, schematic symbol, usage in system
// defaultCategory,     altFunctionSelector,  direction,        initialLevel,         simulatedLevelInt

    //  00 - GP0: Interrupt created by U46 (CPLD). Interrupt can also be created by S13
{_XSG_GPIO,            XS_GPIO_ALT_FUNC_GPIO, XS_GPIO_DIR_IN,  XS_GPIO_PIN_LEVEL_X,       TRUE},
    //  01 - GP1: Interrupt created by S12.
{_XSG_GPIO,            XS_GPIO_ALT_FUNC_GPIO, XS_GPIO_DIR_IN,  XS_GPIO_PIN_LEVEL_X,       FALSE},
    //  02 - GP2: Unused, Can be used as a GPI/O, located on J19
{_XSG_GPIO,            XS_GPIO_ALT_FUNC_GPIO, XS_GPIO_DIR_IN,  XS_GPIO_PIN_LEVEL_X,       FALSE},
    //  03 - GP3: Unused, Can be used as a GPI/O, located on J19
{_XSG_GPIO,            XS_GPIO_ALT_FUNC_GPIO, XS_GPIO_DIR_IN,  XS_GPIO_PIN_LEVEL_X,       FALSE},
    //  04 - GP4: Unused, Can be used as a GPI/O, located on J19
{_XSG_GPIO,            XS_GPIO_ALT_FUNC_GPIO, XS_GPIO_DIR_IN,  XS_GPIO_PIN_LEVEL_X,       FALSE},
    //  05 - GP5: Unused, Can be used as a GPI/O, located on J19
{_XSG_GPIO,            XS_GPIO_ALT_FUNC_GPIO, XS_GPIO_DIR_IN,  XS_GPIO_PIN_LEVEL_X,       FALSE},
// Wrong!    //  06 - MMCLK: MultiMediaCard Clock
{_XSG_MMC,             XS_GPIO_ALT_FUNC_1,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_UNKNOWN, FALSE},
    //  07 - GP7: Unused Can be used as a GPI/O, located on J20
{_XSG_GPIO,            XS_GPIO_ALT_FUNC_GPIO, XS_GPIO_DIR_IN,  XS_GPIO_PIN_LEVEL_X,       FALSE},
    //  08 - MMCSO: MultiMediaCard Chip select 0
{_XSG_MMC,             XS_GPIO_ALT_FUNC_1,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_UNKNOWN, FALSE},
    //  09 - GP9: Unused, Can be used as a GPI/O, located on J21
{_XSG_GPIO,            XS_GPIO_ALT_FUNC_GPIO, XS_GPIO_DIR_IN,  XS_GPIO_PIN_LEVEL_X,       FALSE},
    //  10 - GPIO[10]: 32 KHz oscillator output
{_XSG_CLK_32_KHZ_OUT,  XS_GPIO_ALT_FUNC_GPIO, XS_GPIO_DIR_IN,  XS_GPIO_PIN_LEVEL_X,       FALSE},
    //  11 - 48M_CLK: 48 MHz oscillator output
{_XSG_CLK_48_MHZ_0UT,  XS_GPIO_ALT_FUNC_3,    XS_GPIO_DIR_OUT, XS_GPIO_PIN_LEVEL_X,       FALSE},