usbotgi2c.h

优龙YLP270开发板 光盘自带的BIOS和实验例程源码 强烈推荐

/******************************************************************************
**
**  COPYRIGHT (C) 2000 - 2003 Intel Corporation.
**
**  This software as well as the software described in it is furnished under 
**  license and may only be used or copied in accordance with the terms of the 
**  license. The information in this file is furnished for informational use 
**  only, is subject to change without notice, and should not be construed as 
**  a commitment by Intel Corporation. Intel Corporation assumes no 
**  responsibility or liability for any errors or inaccuracies that may appear 
**  in this document or any software that may be provided in association with 
**  this document. 
**  Except as permitted by such license, no part of this document may be 
**  reproduced, stored in a retrieval system, or transmitted in any form or by 
**  any means without the express written consent of Intel Corporation. 
**
**  FILENAME:       UsbOTGi2c.h
**
**  PURPOSE:   		This file contains the functions prototypes of the routines
**                  used to communicate with Phillips ISP1301 USB OTG Transeiver 
**                  via I2C interface.
**
**  LAST MODIFIED: $Modtime: 9/05/03 4:12p $
**
******************************************************************************/
#ifndef _UsbOTGi2c_h
#define _UsbOTGi2c_h

/*
*******************************************************************************
*    Timer Definitions
*******************************************************************************
*/
#define OST_REGISTER_BASE   0x40A00000

/*
************************************************************************************
*							CONSTANTS 
************************************************************************************
*/

#define STAND_I2C_BASE		0x40301680  // I2C registers base address
#define CLK_MGR_REGS_BASE   0x41300000  // Clock Manager registers base address
#define GPIO_REGS_BASE      0x40E00000  // GPIOs registers base address


//#define USB_OTG_ADDR_HIGH   0
//#ifdef USB_OTG_ADDR_HIGH    
//#define USB_OTG_TRV_ADDRESS 0x5A
//#else
//#define USB_OTG_TRV_ADDRESS 0x58
//#endif


//UINT32 USB_OTG_TRV_ADDRESS = 0x58;

#define XLLP_OTG_TIMEOUT    2           // Timeout
#define XLLP_STATUS_T       XLLP_UINT32_T

// Enumeration for registers access type
typedef enum XLLP_REG_ACCESS_E
{
    XLLP_REG_ACCESS_CLEAR = 0,
    XLLP_REG_ACCESS_SET   = 1
} XLLP_REG_ACCESS_T;

// Registers Enumeration for read access
typedef enum XLLP_REG_ADDRESS_READ_E
{
    XLLP_REG_VENDOR_ID_R    = 0x00,
    XLLP_REG_PRODUCT_ID_R   = 0x02,
    XLLP_REG_MODE_1_R       = 0x04,
    XLLP_REG_MODE_2_R       = 0x12,
    XLLP_REG_OTG_R          = 0x06,
    XLLP_REG_INT_SOURCE_R   = 0x08,
    XLLP_REG_LATCH_R        = 0x0A,
    XLLP_REG_INT_EN_FALL_R  = 0x0C,
    XLLP_REG_INT_EN_RAS_R   = 0x0E,
    XLLP_REG_CHIP_VER_R     = 0x14
} XLLP_REG_ADDRESS_READ_T;

// Registers Enumeration for write/set access
typedef enum XLLP_REG_ADDRESS_SET_E
{
    XLLP_REG_MODE_1_S       = 0x04,
    XLLP_REG_MODE_2_S       = 0x12,
    XLLP_REG_OTG_S          = 0x06,
    XLLP_REG_LATCH_S        = 0x0A,
    XLLP_REG_INT_EN_FALL_S  = 0x0C,
    XLLP_REG_INT_EN_RAS_S   = 0x0E
} XLLP_REG_ADDRESS_SET_T;

// Registers Enumeration for write/clear access
typedef enum XLLP_REG_ADDRESS_CLEAR_E
{
    XLLP_REG_MODE_1_C       = 0x05,
    XLLP_REG_MODE_2_C       = 0x13,
    XLLP_REG_OTG_C          = 0x07,
    XLLP_REG_LATCH_C        = 0x0B,
    XLLP_REG_INT_EN_FALL_C  = 0x0D,
    XLLP_REG_INT_EN_RAS_C   = 0x0F
} XLLP_REG_ADDRESS_CLEAR_T;

/*
************************************************************************************
*                            FUNCTION PROTOTYPES 
************************************************************************************
*/
VOID UsbOTGi2cConfigGpio (XLLP_UINT32_T debugMode);
XLLP_STATUS_T UsbOTGi2cWrite (XLLP_UINT32_T regAddr, XLLP_UINT32_T numBytes, P_XLLP_UINT8_T dataP); 
XLLP_STATUS_T UsbOTGi2cRead (XLLP_UINT32_T regAddr, XLLP_UINT32_T numBytes, P_XLLP_UINT8_T dataP);

#endif  // _UsbOTGi2c_h