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📄 mpcsio.asm

📁 X86 GX1 BOOTLOAD代码 ,支持WINCE操作系统!
💻 ASM
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;**************************************************************************
;*
;*  MPCSIO.ASM
;*
;*  Copyright (c) 1999 National Semiconductor Corporation.
;*  All Rights Reserved.
;*
;*  Function:
;*    SC1x00 Super I/O configuration
;*
;*  $Revision: 3 $
;*
;**************************************************************************

	.486P

	INCLUDE DEF.INC
	INCLUDE MACROS.INC
	INCLUDE PORT80.INC
	INCLUDE OPTIONS.INC
	INCLUDE MPC.INC
	INCLUDE NSSIO.INC
	INCLUDE strings.inc
	INCLUDE BDCFG.INC
	INCLUDE	NVRAMTOK.INC

INSTALL_NSSIO SC1x00

_TEXT SEGMENT PUBLIC use16 'CODE'

	EXTERN	LPCsioTest:NEAR
	EXTERN	InitAB:NEAR
	EXTERN	GetTransNVRAM:NEAR

;************************************************************
; translate table for translating
; mvram entries into real working values
;************************************************************
MPCSIOTransTable	LABEL NVRAMTransStruct

	NVRAMTransStruct	<MEDIA_ANY,TOKEN_UART1_CONFIG,TVALUE_UART_CONFIG_DIS,0>  ; disabled
	NVRAMTransStruct	<MEDIA_ANY,TOKEN_UART1_CONFIG,TVALUE_UART_CONFIG_3F8,010403f8h>	; 3f8,4
	NVRAMTransStruct	<MEDIA_ANY,TOKEN_UART1_CONFIG,TVALUE_UART_CONFIG_2F8,010302f8h>	; 2f8,3
	NVRAMTransStruct	<MEDIA_ANY,TOKEN_UART1_CONFIG,TVALUE_UART_CONFIG_3E8,010703e8h>	; 3e8,7
	NVRAMTransStruct	<MEDIA_ANY,TOKEN_UART1_CONFIG,TVALUE_UART_CONFIG_2E8,010902e8h>	; 2e8,9
;	NVRAMTransStruct	<MEDIA_ANY,TOKEN_UART1_CONFIG,TVALUE_UART_CONFIG_3E8,010403e8h>	; 3e8,4
;	NVRAMTransStruct	<MEDIA_ANY,TOKEN_UART1_CONFIG,TVALUE_UART_CONFIG_2E8,010302e8h>	; 2e8,3

	NVRAMTransStruct	<MEDIA_ANY,TOKEN_UART2_CONFIG,TVALUE_UART_CONFIG_DIS,0>  ; disabled
	NVRAMTransStruct	<MEDIA_ANY,TOKEN_UART2_CONFIG,TVALUE_UART_CONFIG_3F8,010403f8h>	; 3f8,4
	NVRAMTransStruct	<MEDIA_ANY,TOKEN_UART2_CONFIG,TVALUE_UART_CONFIG_2F8,010302f8h>	; 2f8,3
	NVRAMTransStruct	<MEDIA_ANY,TOKEN_UART2_CONFIG,TVALUE_UART_CONFIG_3E8,010703e8h>	; 3e8,7
	NVRAMTransStruct	<MEDIA_ANY,TOKEN_UART2_CONFIG,TVALUE_UART_CONFIG_2E8,010902e8h>	; 2e8,9
;	NVRAMTransStruct	<MEDIA_ANY,TOKEN_UART2_CONFIG,TVALUE_UART_CONFIG_3E8,010403e8h>	; 3e8,4
;	NVRAMTransStruct	<MEDIA_ANY,TOKEN_UART2_CONFIG,TVALUE_UART_CONFIG_2E8,010302e8h>	; 2e8,3

	NVRAMTransStruct	<MEDIA_ANY,TOKEN_UART3_CONFIG,TVALUE_UART_CONFIG_DIS,0>  ; disabled
	NVRAMTransStruct	<MEDIA_ANY,TOKEN_UART3_CONFIG,TVALUE_UART_CONFIG_3F8,010403f8h>	; 3f8,4
	NVRAMTransStruct	<MEDIA_ANY,TOKEN_UART3_CONFIG,TVALUE_UART_CONFIG_2F8,010302f8h>	; 2f8,3
	NVRAMTransStruct	<MEDIA_ANY,TOKEN_UART3_CONFIG,TVALUE_UART_CONFIG_3E8,010703e8h>	; 3e8,7
	NVRAMTransStruct	<MEDIA_ANY,TOKEN_UART3_CONFIG,TVALUE_UART_CONFIG_2E8,010902e8h>	; 2e8,9
;	NVRAMTransStruct	<MEDIA_ANY,TOKEN_UART3_CONFIG,TVALUE_UART_CONFIG_3E8,010403e8h>	; 3e8,4
;	NVRAMTransStruct	<MEDIA_ANY,TOKEN_UART3_CONFIG,TVALUE_UART_CONFIG_2E8,010302e8h>	; 2e8,3
	
	NVRAMTransStruct	<MEDIA_ANY,TOKEN_LPTA_PORT,TVALUE_LPT_PORT_DIS,0h>  ; disabled
	NVRAMTransStruct	<MEDIA_ANY,TOKEN_LPTA_PORT,TVALUE_LPT_PORT_378,01000378h>	; 378
	NVRAMTransStruct	<MEDIA_ANY,TOKEN_LPTA_PORT,TVALUE_LPT_PORT_278,01000278h>	; 278
	NVRAMTransStruct	<MEDIA_ANY,TOKEN_LPTA_PORT,TVALUE_LPT_PORT_3BC,010003BCh>	; 3BC
	
	NVRAMTransStruct	<MEDIA_ANY,TOKEN_LPTA_MODE,TVALUE_LPT_MODE_SPP,  00000002h>	; SPP
	NVRAMTransStruct	<MEDIA_ANY,TOKEN_LPTA_MODE,TVALUE_LPT_MODE_PS2,  00000022h>	; PS/2 BI-DIR
	NVRAMTransStruct	<MEDIA_ANY,TOKEN_LPTA_MODE,TVALUE_LPT_MODE_EPP17,00000042h>	; EPP 1.7
	NVRAMTransStruct	<MEDIA_ANY,TOKEN_LPTA_MODE,TVALUE_LPT_MODE_EPP19,00000062h>	; EPP 1.9
	NVRAMTransStruct	<MEDIA_ANY,TOKEN_LPTA_MODE,TVALUE_LPT_MODE_ECP,  000000F2h>	; ECP
	
	NVRAMTransStruct	<0,0,0,0>  ; end of table

;
; temp disabled until I get back to finish
;
NSSIO_INIT_S	STRUCT	1
index	db	?			; index
token	dw	?			; token or 0 
val	db	?			; shift factor or value if token = 0
					; this is number of bytes to shift
NSSIO_INIT_S	ends

NSSIO_INIT_TABLE2:
	NSSIO_INIT_S	<NSSIO_LOGICAL_DEVICE_NUMBER, 0, RTC_DEVICE>	; Select the RTC device
	NSSIO_INIT_S	<NSSIO_PRIMARY_INTERRUPT_SELECT, 0, 8>	; Set the interrupt
	NSSIO_INIT_S	<NSSIO_ACTIVATE,0, 1>			; Enable it

	NSSIO_INIT_S	<NSSIO_LOGICAL_DEVICE_NUMBER, 0, UART2_DEVICE>	; Select the COM B device
	NSSIO_INIT_S	<NSSIO_ACTIVATE, 0, 0>			; Disable it
	NSSIO_INIT_S	<NSSIO_PRIMARY_BASE_IO_ADDR_HI,TOKEN_UART2_CONFIG,1>
	NSSIO_INIT_S	<NSSIO_PRIMARY_BASE_IO_ADDR_LOW,TOKEN_UART2_CONFIG,0>
	NSSIO_INIT_S	<NSSIO_PRIMARY_INTERRUPT_SELECT,TOKEN_UART2_CONFIG,2>
	NSSIO_INIT_S	<NSSIO_OPTION_REG0,0, 82h>			; Enable bank switching and normal power mode
	NSSIO_INIT_S	<NSSIO_ACTIVATE,TOKEN_UART2_CONFIG, 3> 		; Enable it

	NSSIO_INIT_S	<NSSIO_LOGICAL_DEVICE_NUMBER,0, UART1_DEVICE>	; Select the COM A device
	NSSIO_INIT_S	<NSSIO_ACTIVATE,0, 0>			; Disable it
	NSSIO_INIT_S	<NSSIO_PRIMARY_BASE_IO_ADDR_HI,TOKEN_UART1_CONFIG,1>
	NSSIO_INIT_S	<NSSIO_PRIMARY_BASE_IO_ADDR_LOW,TOKEN_UART1_CONFIG,0>
	NSSIO_INIT_S	<NSSIO_PRIMARY_INTERRUPT_SELECT,TOKEN_UART1_CONFIG,2>
	NSSIO_INIT_S	<NSSIO_OPTION_REG0,0, 82h>			; Enable bank switching and normal power mode
	NSSIO_INIT_S	<NSSIO_ACTIVATE,TOKEN_UART1_CONFIG, 3> 		; Enable it

	NSSIO_INIT_S	<NSSIO_LOGICAL_DEVICE_NUMBER,0, WAKEUP_DEVICE>	; Select the Wake-Up device
	NSSIO_INIT_S	<NSSIO_PRIMARY_BASE_IO_ADDR_HI,0, NSSIO_WAKEUP_BASE_HIGH>
	NSSIO_INIT_S	<NSSIO_PRIMARY_BASE_IO_ADDR_LOW,0, NSSIO_WAKEUP_BASE_LOW>
	NSSIO_INIT_S	<NSSIO_ACTIVATE,0, 1>			; Enable it	

	NSSIO_INIT_S	<NSSIO_LOGICAL_DEVICE_NUMBER,0, INFRARED_DEVICE>	; Select the Infrared device
	NSSIO_INIT_S	<NSSIO_ACTIVATE, 0, 0>			; Disable it
	NSSIO_INIT_S	<NSSIO_PRIMARY_BASE_IO_ADDR_HI,TOKEN_UART3_CONFIG,1>
	NSSIO_INIT_S	<NSSIO_PRIMARY_BASE_IO_ADDR_LOW,TOKEN_UART3_CONFIG,0>
	NSSIO_INIT_S	<NSSIO_PRIMARY_INTERRUPT_SELECT,TOKEN_UART3_CONFIG,2>
	NSSIO_INIT_S	<NSSIO_OPTION_REG0,0, 82h>			; Enable bank switching and normal power mode
	NSSIO_INIT_S	<NSSIO_ACTIVATE,TOKEN_UART3_CONFIG, 3> 		; Enable it

	NSSIO_INIT_S	<NSSIO_LOGICAL_DEVICE_NUMBER,0, LPT_DEVICE>	; parallel port
	NSSIO_INIT_S	<NSSIO_ACTIVATE, 0, 0>			; Disable it
	NSSIO_INIT_S	<NSSIO_PRIMARY_BASE_IO_ADDR_HI,TOKEN_LPTA_PORT,1>  ; base address
	NSSIO_INIT_S	<NSSIO_PRIMARY_BASE_IO_ADDR_LOW,TOKEN_LPTA_PORT,0>
	NSSIO_INIT_S	<NSSIO_PRIMARY_INTERRUPT_SELECT,TOKEN_LPTA_IRQ,0>
	NSSIO_INIT_S	<NSSIO_DMA_CHANNEL_SELECT,TOKEN_LPTA_DMA,0>
	NSSIO_INIT_S	<NSSIO_OPTION_REG0,TOKEN_LPTA_MODE,0>	    	; mode
; if dowser force lpt to output only regardless of what CMOS contains
IF DOWSER_ON
    ; code to set to output only for dowser
	NSSIO_INIT_S	<NSSIO_OPTION_REG0,0,02h>			; output only
ENDIF
	NSSIO_INIT_S	<NSSIO_ACTIVATE,TOKEN_LPTA_PORT, 3> 		; Enable it
	
	NSSIO_INIT_S	<NSSIO_LOGICAL_DEVICE_NUMBER,0, ACCESS_BUS1_DEVICE>	; Select the ACCESS.bus device1
	NSSIO_INIT_S	<NSSIO_PRIMARY_BASE_IO_ADDR_HI,0, NSSIO_AB1_BASE_HIGH>
	NSSIO_INIT_S	<NSSIO_PRIMARY_BASE_IO_ADDR_LOW,0, NSSIO_AB1_BASE_LOW>
	NSSIO_INIT_S	<NSSIO_ACTIVATE,0, 1>			; Enable it
IF (SCx1xx_PROCESSOR NE 1)
	NSSIO_INIT_S	<NSSIO_LOGICAL_DEVICE_NUMBER,0, ACCESS_BUS2_DEVICE>	; Select the ACCESS.bus device2
	NSSIO_INIT_S	<NSSIO_PRIMARY_BASE_IO_ADDR_HI,0, NSSIO_AB2_BASE_HIGH>
	NSSIO_INIT_S	<NSSIO_PRIMARY_BASE_IO_ADDR_LOW,0, NSSIO_AB2_BASE_LOW>
	NSSIO_INIT_S	<NSSIO_ACTIVATE,0, 1>			; Enable it
ENDIF

NSSIO_INIT_COUNT2 EQU ($ - NSSIO_INIT_TABLE2)/ (size NSSIO_INIT_S)



sioTest PROC NEAR PUBLIC
	mov	gs, bx
	
	PORT80	P80_SIO			; Indicate Entrance to SIO code

	mov	cx, NSSIO_INIT_COUNT2
	lea	si, NSSIO_INIT_TABLE2

nsloop:
	
	push	cx			; save count
	mov	cx,cs:[si].NSSIO_INIT_S.token  ; get token
	or	cx,cx			; see if have token
	jz	litvalue		; no - have literal value
; go get the value for the token
	push	si			; save pointer
	lea	si,MPCSIOTransTable
	call	GetTransNVRAM		; get translated NVRAM value
	pop	si			; restore pointer
	jc	point_next		; error *****************
ok:
	mov	cl,cs:[si].NSSIO_INIT_S.val  ; get shift factor
	shl	cl,3			; *8
	jz	writevalue		; don't need shift
	shr	eax,cl			; shift down
	jmp	short writevalue
litvalue:
	mov	al,cs:[si].NSSIO_INIT_S.val	  ; get literal value

writevalue:
	mov	dx, GEODE_SIO_BASE	; point to base IO address
	mov	ah,cs:[si].NSSIO_INIT_S.index  ; get index
	xchg	al,ah			; save value in ah index to al
	out	dx,al			; write index
	xchg	al,ah			; get value back
	inc	dx			; point to data reg
	out	dx,al			; write data value
point_next:
	add	si,size NSSIO_INIT_S	; point to next table entry
	pop	cx			; restore count
	loop	nsloop			; go do another if we have one
	

	PORT80	P80_SIO+0Ah		; Indicate Entrance to AB init code
	; Access.Bus initialization
	mov	bp, ACCESS_BUS1_DEVICE	; Reset Access.Bus1
	NOSTACK	si, InitAB
IF (SCx1xx_PROCESSOR NE 1)
	mov	bp, ACCESS_BUS2_DEVICE	; Reset Access.Bus2
	NOSTACK	si, InitAB
ENDIF

	PORT80	P80_SIO+0Eh		; Indicate Entrance to AB init code

	NOSTACK	bx, LPCsioTest

	mov	bx, gs
	jmp	bx
sioTest ENDP

_TEXT ENDS

	END

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