mpccl.asm

X86 GX1 BOOTLOAD代码 ,支持WINCE操作系统!

;**************************************************************************
;* 
;*  MPCCL.ASM
;* 
;*  Copyright (c) 1999-2000 National Semiconductor Corporation. 
;*  All Rights Reserved. 
;* 
;*  Function: 
;*    Set up the SC1x00 core logic to default values
;* 
;*  $Revision: 5 $
;*
;**************************************************************************
	.486P

	INCLUDE DEF.INC
	INCLUDE MACROS.INC
	INCLUDE PORT80.INC
	INCLUDE MPC.INC
	INCLUDE OPTIONS.INC
	INCLUDE	NVRAMTOK.INC
	INCLUDE BDCFG.INC

_TEXT SEGMENT PUBLIC use16 'CODE'

	EXTERN	cy55x0RegRead8:NEAR
	EXTERN	cy55x0RegWrite8:NEAR
	EXTERN	GetHRTimerSpeed:NEAR
	EXTERN	Cy55x0RegRead32:NEAR
	EXTERN	Cy55x0RegWrite32:NEAR
	EXTERN	GetPCISpeed:NEAR
	EXTERN	GetNVRAMValue:NEAR

CHIP_INIT_S	STRUCT	1
index	db	?		; index
token	dw	?		; token or 0 
val		db	?		; shift factor or value if token = 0
					; this is number of bytes to shift
amask	db	?		; Mask that is AND'd with existing value 
omask	db	?		; Mask that is OR'd with existing value
CHIP_INIT_S	ends

;
; We use  DB  FF, FF to Increment the FUNCTION number
; Make sure you NEVER need to talk to REG FF of any device.
;
FUN_GEODE_0_TABLE:

	DB	GEODE_REG04, 1Fh	; Allow memory, I/O, special, & MWIO cycles
	DB	GEODE_REG05, 00h
	DB	GEODE_REG06, 80h
	DB	GEODE_REG07, 02h	; Medium Devsel timing
	DB	GEODE_REG0C, 08h	; set pci cache line size to 32 bytes to allow MWIO cycles

	DB	GEODE_REG10, (GEODE_GPIO_BASE and 0ffh) or 01h	; GPIO I/O = 6401
	DB	GEODE_REG11, ((GEODE_GPIO_BASE shr 8) and 0ffh)
	DB	GEODE_REG12, ((GEODE_GPIO_BASE shr 16) and 0ffh)
	DB	GEODE_REG13, ((GEODE_GPIO_BASE shr 24) and 0ffh)

	DB	GEODE_REG14, (GEODE_LPC_BASE and 0ffh) or 01h	; LPC I/O = 6601
	DB	GEODE_REG15, ((GEODE_LPC_BASE shr 8) and 0ffh)
	DB	GEODE_REG16, ((GEODE_LPC_BASE shr 16) and 0ffh)
	DB	GEODE_REG17, ((GEODE_LPC_BASE shr 24) and 0ffh)

	DB	GEODE_REG40, 19h
	DB	GEODE_REG41, 00h
;	DB	GEODE_REG42, 4Dh

	DB	GEODE_REG43, 9Eh; PIT, PIC & IDE access is delayed on PCI, Enable UDMA bypass 20h bugfix
	DB	GEODE_REG45, 02h
if (SCx1xx_PROCESSOR eq 0)
	DB	GEODE_REG46, 0FEh	; Enable PCI F1, F2, F3, F4, F5
	DB	GEODE_REG47, 02h OR LPC	; Enable F0BAR0 and F0BAR1
else ; If Tavor
	DB	GEODE_REG46, 0EEh		; Enable PCI F1, F2, F3, F5
	DB	GEODE_REG47, 0Ah OR LPC	; Enable F0BAR0, F0BAR1	and Subsystem ID Write.	
	DB	GEODE_REG2E, 10h		; Tavor Function 0 Subsystem ID is 510h
	DB	GEODE_REG2F, 05h
endif

	;
	; Top of System Memory configuration
	; alwasy set to 0ffffffffx so bus mastering works
	;
	DB	GEODE_REG4C, 0FCh	; Enable these bits in order to by-pass bus-master bug in
							; SC1200 rev A and rev B. Disable it in rev C (?)
							; Hidden bits of the registers:
							; bit 0 = pre fetch enable.
							; bit 1 = enable spci transfer to begin, even if not enough
							; 		  buffers available.
							; bit 2 = enable bursts in slow pci, and write buffer hand shake.
							; bit 3 = 1 - handshake on write buffer full by STOP# assertion.
							;  	      0 - handshake on write buffer full by TRDY# deassertion.
	DB	GEODE_REG4D,0ffh
	DB	GEODE_REG4E,0ffh
;	DB	GEODE_REG4F,0ffh
	DB	GEODE_REG4F,07Fh	; bug fix 121.22

	DB	GEODE_REG50, 7Bh
	DB	GEODE_REG51, 44h

	DB	GEODE_REG52, 98h
	DB	GEODE_REG53, 03h
	DB	GEODE_REG5A, 01h	; RTC Positive decode
	DB	GEODE_REG5B, 28h	; BIOS ROM Positive decode,
					; Primary IDE controller Positive decode
	DB	GEODE_REG5C, INTBA	; PCI INT steering
	DB	GEODE_REG5D, INTDC	; PCI INT steering

	DB	GEODE_REG60, 07h	; acpi control register - turn off plls on susp 3v
	DB	GEODE_REG61, 00h	; acpi control register - turn off plls on susp 3v
	DB	GEODE_REG6E, 0F0h	; ROM Mask Register
	DB	GEODE_REG6F, 0FFh	; ROM Mask Register, 16M
	
	DB	GEODE_REG70, IOCS1_BASE AND 0ffh		; IOCS1 Base Address
	DB	GEODE_REG71, (IOCS1_BASE shr 8) AND 0ffh	; IOCS1 Base Address
	DB	GEODE_REG72, IOCS1_CONTROL
	
	DB	GEODE_REG74, IOCS0_BASE AND 0ffh		; IOCS0 Base Address
	DB	GEODE_REG75, (IOCS0_BASE shr 8) AND 0ffh	; IOCS0 Base Address
	DB	GEODE_REG76, IOCS0_CONTROL

IF DOC_USED
; Configure D.O.C. Base address
	DB	GEODE_REG78, DOC_BASE AND 0ffH
	DB	GEODE_REG79, (DOC_BASE shr 8) and 0ffh
	DB	GEODE_REG7A, (DOC_BASE shr 16) and 0ffh
	DB	GEODE_REG7B, (DOC_BASE shr 24) and 0ffh
; doc enable & memory range
	DB	GEODE_REG7C,(DOC_F0_7C_MASK AND 0ffh)  ; 7c 
	DB	GEODE_REG7D,(DOC_F0_7C_MASK SHR 8) AND 0FFh  ; 7d
	DB	GEODE_REG7E,(DOC_F0_7C_MASK SHR 16) AND 003h  ; 7e
	DB	GEODE_REG7F, DOC_F0_7F		; enable bits
ENDIF

	DB	GEODE_REG80, 00h	; SMI related registers
	DB	GEODE_REG81, 00h	; SMI related registers
	DB	GEODE_REG82, 00h	; SMI related registers
	DB	GEODE_REG83, 00h	; SMI related registers

	DB	GEODE_REG93, 0c0h	; Miscellaneous Device Control Register
	DB	GEODE_REG96, 002h	; Enable SMI Speedup when throttling is enabled

;
; Func 1 - SMI/ACPI  PCI Config Cycles
;
	DB	0ffh, 0ffh
FUN_GEODE_1_TABLE:
	DB	GEODE_REG04, 01h	; Enable I/O cycles

	DB	GEODE_REG10, (GEODE_SMI_BASE and 0ffh) or 01h	; I/O Base = 6001h (SMI)
	DB	GEODE_REG11, ((GEODE_SMI_BASE shr 8) and 0ffh)
	DB	GEODE_REG12, ((GEODE_SMI_BASE shr 16) and 0ffh)
	DB	GEODE_REG13, ((GEODE_SMI_BASE shr 24) and 0ffh)

IF (SCx1xx_PROCESSOR)
	DB	GEODE_REG2E, 11h		; Tavor Function 1 Subsystem ID is 511h
	DB	GEODE_REG2F, 05h
ENDIF

	DB	GEODE_REG40, (GEODE_ACPI_BASE and 0ffh) or 01h	; I/O Base = AC01h (ACPI)
	DB	GEODE_REG41, ((GEODE_ACPI_BASE shr 8) and 0ffh)
	DB	GEODE_REG42, ((GEODE_ACPI_BASE shr 16) and 0ffh)
	DB	GEODE_REG43, ((GEODE_ACPI_BASE shr 24) and 0ffh)

;
; Func 2 - IDE  PCI Config Cycles
;
	DB	0ffh, 0ffh
FUN_GEODE_2_TABLE:
	DB	GEODE_REG04, 01h	; Enable

	DB	GEODE_REG20, (GEODE_IDE_BASE and 0ffh) or 01h	; I/O Base = 5001h (F2BAR4)
	DB	GEODE_REG21, ((GEODE_IDE_BASE shr 8) and 0ffh)
	DB	GEODE_REG22, ((GEODE_IDE_BASE shr 16) and 0ffh)
	DB	GEODE_REG23, ((GEODE_IDE_BASE shr 24) and 0ffh)

;IF (SCx1xx_PROCESSOR)
;	DB	GEODE_REG2E, 12h								; Tavor Function 1 Subsystem ID is 510h
;	DB	GEODE_REG2F, 05h
;ENDIF
;
; Func 3 - Audio  PCI Config Cycles
;
	DB	0ffh, 0ffh
FUN_GEODE_3_TABLE:	 
	DB	GEODE_REG04, 0Fh	; Enable Memory cycles
	DB	GEODE_REG10, (GEODE_AUDIO_BASE and 0ffh); Mem Base = x0011000h
	DB	GEODE_REG11, ((GEODE_AUDIO_BASE shr 8) and 0ffh)
	DB	GEODE_REG12, ((GEODE_AUDIO_BASE shr 16) and 0ffh)
	DB	GEODE_REG13, ((GEODE_AUDIO_BASE shr 24) and 03fh) or (GX_BASE / 1000000h)

;IF (SCx1xx_PROCESSOR)
;	DB	GEODE_REG2E, 13h	    ; Tavor Function 3 Subsystem ID is 513h
;	DB	GEODE_REG2F, 05h
;ENDIF

;
; Func 4 - Video  PCI Config Cycles
;
	DB	0ffh, 0ffh
FUN_GEODE_4_TABLE:
IF (SCx1xx_PROCESSOR EQ 0)	
	DB	GEODE_REG04, 02h	; Enable Memory cycles

	DB	GEODE_REG10, (GEODE_VIDEO_BASE and 0ffh)	; Dhruva Memory Base = x0010000h
	DB	GEODE_REG11, ((GEODE_VIDEO_BASE shr 8) and 0ffh)
	DB	GEODE_REG12, ((GEODE_VIDEO_BASE shr 16) and 0ffh)
	DB	GEODE_REG13, ((GEODE_VIDEO_BASE shr 24) and 03fh) or (GX_BASE / 1000000h)

	DB	GEODE_REG18, (GEODE_VIP_BASE and 0ffh)		; VIP Memory Base = x0015000h
	DB	GEODE_REG19, ((GEODE_VIP_BASE shr 8) and 0ffh)
	DB	GEODE_REG1A, ((GEODE_VIP_BASE shr 16) and 0ffh)
	DB	GEODE_REG1B, ((GEODE_VIP_BASE shr 24) and 03fh) or (GX_BASE / 1000000h)
ENDIF
;
; Func 5 - X-BUS and EMMA PCI Config Cycles
;
	DB	0ffh, 0ffh
FUN_GEODE_5_TABLE:
	DB	GEODE_REG40, 0C1h	; X-BUS BAR0 mask (64-bytes I/O space)
	DB	GEODE_REG41, 0FFh
	DB	GEODE_REG42, 0FFh
	DB	GEODE_REG43, 0FFh


	DB	GEODE_REG10, (GEODE_XBUS_BASE and 0ffh) or 01h	; X-BUS BAR0 = 6201h (I/O mapped)
	DB	GEODE_REG11, ((GEODE_XBUS_BASE shr 8) and 0ffh)
	DB	GEODE_REG12, ((GEODE_XBUS_BASE shr 16) and 0ffh)
	DB	GEODE_REG13, ((GEODE_XBUS_BASE shr 24) and 0ffh)

IF (SCx1xx_PROCESSOR)
	DB	GEODE_REG2E, 15h	; Tavor Function 5 Subsystem ID is 515h
	DB	GEODE_REG2F, 05h
ENDIF

	DB	GEODE_REG58, 01h	; F5BAR0 is initialized
	DB	GEODE_REG04, 0Fh	; Enable Memory and I/O transactions

TOTAL_GEODE_COUNT EQU (($ - FUN_GEODE_0_TABLE)/ (2*SIZEOF(BYTE)) )

;
; LPC bridge configuration table
;
LPC_INIT_TABLE:
	;	REG	   , and mask,	or mask

	; Enable addressing of LPC bridge
	DB	GEODE_REG10, 00h,	040h	; FDC
	DB	GEODE_REG11, 80h,	024h	; 2Eh/2Dh and KBC (60h, 64h)
	
	; Enable address decoding
;	DB	GEODE_REG14, 00h,	0BCh	; PP is 378h, SP0 is 3E8h, SP1 is 2E8h
	db	GEODE_REG14, 00h,	000h	; none
	
	; Enable IRQs of LPC bridge
	DB	GEODE_REG08, 00h,	0c0h	; Enable Serial IRQ interface
	DB	GEODE_REG00, 00h,	042h	; IRQ1 (KBC), IRQ6 (FDC)
	DB	GEODE_REG01, 00h,	010h	; IRQ12 (PS/2 Mouse)
	DB	GEODE_REG02, 00h,	000h	; ISA/PCI

	; Enable DRQs of LPC bridge
	DB	GEODE_REG0C, 00h,	014h	; DRQ2 (FDC)
	DB	GEODE_REG1F, 00h,	07fh	; clear errors

LPC_INIT_COUNT EQU (($ - LPC_INIT_TABLE)/ (3*SIZEOF(BYTE)) )

;
; GPIO Config registers
;
GPIO_INIT_TABLE:
	; No interrupts
	DB	GEODE_GPIEN0,	000h
	DB	GEODE_GPIEN0+1,	000h
	DB	GEODE_GPIEN0+2,	000h
	DB	GEODE_GPIEN0+3,	000h
	DB	GEODE_GPIEN1,	000h
	DB	GEODE_GPIEN1+1,	000h
	DB	GEODE_GPIEN1+2,	000h
	DB	GEODE_GPIEN1+3,	000h

GPIO_INIT_COUNT EQU (($ - GPIO_INIT_TABLE)/(2*SIZEOF(BYTE)))

VIP_INIT_TABLE:
	Db	GEODE_REG00,	02h

VIP_INIT_COUNT EQU (($ - VIP_INIT_TABLE)/(2*SIZEOF(BYTE)))


;**************************************************************************
;*
;*	chipsetInit
;*
;*	Core Logic initialization:  ISA-bridge, LPC, GPIO, X-BUS, PCI BARs
;*
;*	Entry:
;*	  BX = return address
;*
;*	Exit:
;*	  None
;*
;*	Modified:
;*	  EBX, EAX, EDX, SI, CX
;*
;**************************************************************************
chipsetInit PROC NEAR PUBLIC
	ror	ebx, 16

	PORT80	P80_CHIPSET_INIT	; Chipset init

	mov	cx, TOTAL_GEODE_COUNT
	lea	si, FUN_GEODE_0_TABLE
	mov	eax, CX55x0_ID
	mov	ah,  FUNC0

Register_GEODE_Loop:
	mov	al, cs:[si]
	inc	si
	mov	dl, cs:[si]
	inc	si
	cmp	al, 0FFh
	jne	ValidReg
	cmp	dl, 0FFh
	jne	ValidReg
	inc	ah			; Crossed a Function Table
					; Add one to the Function 
	jmp	SkipRegWrite
ValidReg:
	mov	edi, eax
	mov	bx, cx
	mov	ecx, edx		; save data to write
	mov	dx, 0CF8h
	out	dx, eax			; Point to register
	and	eax,03h
	mov	dx, 0CFCh
	or	dx, ax
	mov	al, cl
	out	dx, al			; Write EDX to register specified

	xor	ecx, ecx
	mov	cx, bx
	mov	eax, edi

SkipRegWrite:
	loop Register_GEODE_Loop

	NOSTACK bx, LPCBusInit
	NOSTACK bx, GPIOInit
	NOSTACK bx, VIPInit
	NOSTACK bx, ConfigBaseAddr