📄 gxmreg.asm
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;**************************************************************************
;*
;* GXMREG.ASM
;*
;* Copyright (c) 1999 National Semiconductor Corporation.
;* All Rights Reserved.
;*
;* Function:
;* Initialize CPU registers before testing.
;*
;* $Revision:: 3 $
;*
;**************************************************************************
;.MODEL TINY
.486P
INCLUDE DEF.INC
INCLUDE MACROS.INC
INCLUDE PORT80.INC
INCLUDE OPTIONS.INC
INCLUDE MPC.INC
_TEXT SEGMENT PUBLIC use16 'CODE'
EXTERN CpuRegWrite:NEAR
EXTERN CpuRegRead:NEAR
EXTERN csGeodeGetMmrBase:NEAR
EXTERN unReal:NEAR
PUBLIC cpu_TABLE
cpu_TABLE LABEL BYTE
db CPU_CCR1, 000h ; NO SMI's
db CPU_CCR3, 014h ; Enable Cpu config register
db CPU_PCR, 000h ;
db CPU_GXI_GCR, (GX_BASE shr 30) ; Enable GXBASE address.
IF SC_CHIP
db CPU_CCR2, 080h ; Enable SUSPA bit always for HW ACPI module
ELSE
db CPU_CCR2, 000h ; To be configured by Power Management
ENDIF
db CPU_CCR4, 098h ; Sets IORT to minimum setting for performance
db CPU_CCR3, 0F8h ; Enable Cpu config register
NUM_VALS EQU (($-cpu_TABLE) /2 )
;**************************************************************************
;*
;* cpuRegInit
;*
;* Initialize any cpu registers (STACKLESS)
;*
;* Entry:
;* BX = return location
;*
;* Exit:
;* BX - None
;*
;* Destroys:
;* AX, EBX, CX, DX, SI
;*
;**************************************************************************
cpuRegInit PROC NEAR PUBLIC
shl ebx,16
mov cx, NUM_VALS
lea si, cpu_TABLE
regLoop:
mov al, cs:[si]
inc si
mov dl, cs:[si]
inc si
NOSTACK bx, CpuRegWrite
loop regLoop
IF SC_CHIP
; establish unreal mode here as we are way before post code 03
NOSTACK dx, unReal ; Setup Big-Real mode
; MAPEN MUST ALREADY BE ENABLED
mov al, CPU_GXI_GCR
out CPU_INDEX, al
in al, CPU_DATA ; Read upper 2 addr bits from GCR
shl eax, 30
; Bug fixes: Reset values of memory controller
; If booting straight from DOC, we are in RAM (not ROM) thus messing with
; the DRAM controller will blow the code we're executing away
mov ax, cs ; Will be F000h if ROM'd, 7000h if DOC'd
test ah, 80h ; Bit15=1 if ROM'd, 0 if DOC'd
jz skipMemorySetup
mov ax, CPU_MC_MEM_CNTRL2
mov dword ptr es:[eax],0801h
mov ax, CPU_MC_MEM_CNTRL1
mov dword ptr es:[eax], 248C0040h
mov ax, CPU_MC_BANK_CFG
mov dword ptr es:[eax], 41104110h
mov ax, CPU_MC_SYNC_TIM1
mov dword ptr es:[eax], 2a733225h
skipMemorySetup:
ENDIF
; Initialize the FPU
FINIT
shr ebx, 16
jmp bx
cpuRegInit ENDP
PUBLIC cpu_mem_TABLE
cpu_mem_TABLE LABEL BYTE
dd CPU_DC_UNLOCK, CPU_DC_UNLOCK_KEY
dd CPU_DC_GENERAL_CFG, 0
dd CPU_DC_UNLOCK, 0
dd CPU_BC_DRAM_TOP, 03FFFFFFFh
dd CPU_BC_XMAP_1, 00000060h
dd CPU_BC_XMAP_2, 00000000h
dd CPU_BC_XMAP_3, 00000000h
dd CPU_MC_BANK_CFG, 00700070h
dd CPU_MC_MEM_CNTRL1, 00000008h
dd CPU_MC_GBASE_ADD, 000007FFh
mem_vals EQU 10 ; This is not good...
;**************************************************************************
;*
;* cpuMemRegInit
;*
;* Initialize any cpu registers (STACKLESS)
;*
;* Entry:
;* BX = return location
;*
;* Exit:
;* BX - None
;*
;* Destroys:
;*
;**************************************************************************
cpuMemRegInit PROC NEAR PUBLIC
shl ebx,16
NOSTACK bx, csGeodeGetMmrBase
mov cx, mem_vals
lea si, cpu_mem_TABLE
regLoop:
mov eax, DWORD PTR cs:[si]
add si, 4
mov edx, DWORD PTR cs:[si]
add si, 4
mov di, ax
mov es:[edi], edx
loop regLoop
shr ebx, 16
jmp bx
cpuMemRegInit ENDP
_TEXT ENDS
END
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