ns317.asm

X86 GX1 BOOTLOAD代码 ,支持WINCE操作系统!

;**************************************************************************
;*
;*  NS317.ASM
;*
;*  Copyright (c) 1999 National Semiconductor Corporation.
;*  All Rights Reserved.
;*
;*  Function:
;*    Set up the NS 317 SuperIO and determine if it's alive.
;*
;*  $Revision:: 1   $
;*
;**************************************************************************

	;.MODEL TINY
	.486P

	INCLUDE DEF.INC
	INCLUDE MACROS.INC
	INCLUDE PORT80.INC
	INCLUDE 5530.inc
	INCLUDE strings.inc
	INCLUDE options.inc

_TEXT SEGMENT PUBLIC use16 'CODE'

	EXTERN	cy55x0RegRead8:NEAR
	EXTERN	cy55x0RegWrite8:NEAR
	EXTERN	cy55x0RegRead32:NEAR
	EXTERN	cy55x0RegWrite32:NEAR


NS_INIT_TABLE:
	; card control registers
	DB	21h, 1eh		; floppy in pc mode, uart 2 pins
	DB	22h, 07h		;
	DB	25h, 01h		;

	; device registers
	DB	07h, 01h		; Mouse
	DB	30h, 01h		; enable

	DB	07h, 06h		; COM1
	DB	30h, 01h		; enable

	DB	07h, 05h		; COM2
	DB	30h, 01h		; enable

	DB	07h, 02h		; RTC
	DB	30h, 00h		; de-activate
	DB	70h, 08h		; irq 8
	DB	30h, 01h		; enable

	DB	07h, 07h		; GPIO
	DB	30h, 00h		; disable
	DB	61h, 0E0h		; base address is e0
	DB	30h, 01h		; enable


	DB	07h, 03h		; Floppy
	DB	30h, 00h		; de-activate
	DB	31h, 00h		; i/o range check off
	DB	060h, 003h		; i/o port base address at 3f0
	db	061h, 0F0h		;  for i/o descriptor 0
	db	070h, 006h		; irql 6
	db	071h, 003h		; irq is level and high polarity
	db	074h, 002h		; dma channel 2 (select 0)
	db	075h, 005h		; dma channel 5 (select 1)
	db	0f0h, 020h		; vendor defined ????
	db	0f1h, 000h		; vendor defined ????
	db	030h, 001h		; re-activate
NS_INIT_COUNT EQU ($ - NS_INIT_TABLE)


NS_LPT_TABLE:
	DW	0002h, LPT_SPP_BIDIR_COUNT, OFFSET LPT_SPP_BIDIR
NS_LPT_ENTRY_LENGTH EQU ($ - NS_LPT_TABLE)
	DW	0001h, LPT_SPP_OUTPUT_COUNT, OFFSET LPT_SPP_OUTPUT
	DW	0000h, LPT_NONE_COUNT, OFFSET LPT_NONE

LPT_NONE:
	DB	07h, 04h		; lpt
	DB	30h, 00h		; de-activate
LPT_NONE_COUNT EQU ($ - LPT_NONE)


LPT_SPP_OUTPUT:
	DB	07h, 04h		; lpt
	DB	30h, 00h		; de-activate
	DB	60h, 03h		; base address is 378
	DB	61h, 78h		; 
	DB	0F0h, 0ah		; spp output only
	DB	30h, 01h		; enable
LPT_SPP_OUTPUT_COUNT EQU ($ - LPT_SPP_OUTPUT)

LPT_SPP_BIDIR:
	DB	07h, 04h		; lpt
	DB	30h, 00h		; de-activate
	DB	60h, 03h		; base address is 378
	DB	61h, 78h		; 
	DB	0F0h, 4ah		; spp bidirectional
	DB	30h, 01h		; enable
LPT_SPP_BIDIR_COUNT EQU ($ - LPT_SPP_BIDIR)



;**************************************************************************
;*
;*	sioTest
;*
;*	Entry:
;*	Exit:
;*	Destroys:
;*
;**************************************************************************
sioTest PROC

	mov	gs, bx

	PORT80	P80_SIO			; Indicate Entrance to SIORESET code

;
; Cx5530 Initialization. Configure Registers 50-53 to
;  Reg50[2:0] Set ISA clock divisor according to PCI Bus speed
;  Reg50[6:3] PIT 0 and 1 enables
;  Reg51[7:0] Set I/O recovery time
;  Reg52[0]   Enable lower ROM decode
;  Reg52[3]   Enable port 92
;  Reg52[4]   Enable A20M# deassertion on warm reset
;  Reg52[7]   Enable fast keyboard gate A20 and fast reset disable
;  Reg53[1]   RSVD
;

	mov	esi, 0299447Bh		; See above description
	mov	eax, CX55x0_ID
	mov	al, CX5530_REG50
	NOSTACK	bx,  Cy55x0RegRead32
	and	edx, 0FF000000h
	or	edx, esi
	mov	eax, CX55x0_ID
	mov	al, CX5530_REG50
	NOSTACK	bx, Cy55x0RegWrite32

ns317Present:
	PORT80	P80_SIO+01h		; SIO Present

	mov	cx, NS_INIT_COUNT
	lea	si, NS_INIT_TABLE
	mov	dx, NS317

nsloop:
	mov	al, byte ptr cs:[si]
	inc	si
	out	dx,al
	xor	dl,1
	loop nsloop


;load parallel port mode
	mov	si, NS_LPT_TABLE
	mov	dx, NS317
lptloop:
	mov	ax, word ptr cs:[si]	;match LPTMODE with table
	cmp	ax, LPTMODE
	je	setlptmode
	cmp	ax, 0000h		;count down modes to 0 - if no match, set no lpt
	je	setlptmode
	add	si, NS_LPT_ENTRY_LENGTH
	jmp	lptloop

setlptmode:
	add	si, 2
	mov	cx, word ptr cs:[si]	;get the count of the table we're programming
	add	si, 2
	mov	ax, word ptr cs:[si]	;move to the correct table
	mov	si, ax
	mov	dx, NS317

lptmodeloop:
	mov	al, byte ptr cs:[si]
	inc	si
	out	dx, al
	xor	dl,1
	loop lptmodeloop

lptmodedone:


nsExit:
	mov	al, 0Dh			; Must read to validate RTC
	out	070h, al		; 
	in	al, 071h		; 

	PORT80	P80_SIO+0Eh
	mov	bx, gs
	jmp	bx

sioTest ENDP

_TEXT ENDS

	END