siostub.asm

X86 GX1 BOOTLOAD代码 ,支持WINCE操作系统!

;**************************************************************************
;*
;*  SIOSTUB.ASM
;*
;*  Copyright (c) 1999 National Semiconductor Corporation.
;*  All Rights Reserved.
;*
;*  Function:
;*    SuperIO stub.  Sets the 5530 for when a SuperIO isn't present.
;*
;*  $Revision:: 1  $
;*
;**************************************************************************

	;.MODEL TINY
	.486P

	INCLUDE DEF.INC
	INCLUDE MACROS.INC
	INCLUDE PORT80.INC
	INCLUDE STRINGS.inc
	INCLUDE 5530.inc

_TEXT SEGMENT PUBLIC use16 'CODE'

	EXTERN	cy55x0RegRead8:NEAR
	EXTERN	cy55x0RegWrite8:NEAR
	EXTERN	cy55x0RegRead32:NEAR
	EXTERN	cy55x0RegWrite32:NEAR
	EXTERN	hex_dword:NEAR


SIO_INIT_TABLE:

	DB	00h, 00h		; Activate  SIO

SIO_INIT_COUNT EQU ($ - SIO_INIT_TABLE)

;**************************************************************************
;*
;*	sioTest
;*
;*	Entry:
;*	Exit:
;*	Destroys:
;*
;**************************************************************************
sioTest PROC
	
	mov	gs, bx
	
	PORT80	P80_SIO			; Indicate Entrance to SIORESET code

;
; Set KBC and RTC to ISA SD bus to enable KBC and RTC decode.
;

	mov	eax, CX55x0_ID
	mov	al, CX5530_REG58
	NOSTACK	bx, Cy55x0RegRead8
	mov	eax, CX55x0_ID
	mov	al, CX5530_REG58
	and	dl, 0FCh
	NOSTACK	bx, Cy55x0RegWrite8

; Cx5530 Initialization. Configure Registers 50-53 to
;  Reg50[2:0] Set ISA clock divisor according to PCI Bus speed
;  Reg50[6:3] PIT 0 and 1 enables
;  Reg51[7:0] Set I/O recovery time
;  Reg52[0]   Enable lower ROM decode
;  Reg52[3]   Enable port 92
;  Reg52[4]   Enable A20M# deassertion on warm reset
;  Reg52[7]   Enable fast keyboard gate A20 and fast reset disable
;  Reg53[1]   RSVD
;

	mov	esi, 0299447Bh		; See above description
	mov	eax, CX55x0_ID
	mov	ax, CX5530_REG50
	NOSTACK	bx, Cy55x0RegRead32
	and	edx, 0FF000000h
	or	edx, esi
	mov	eax, CX55x0_ID
	mov	ax, CX5530_REG50
	NOSTACK	bx, Cy55x0RegWrite32

	PORT80	P80_SIO+0Eh
	mov	bx, gs
	jmp	bx

sioTest ENDP

_TEXT ENDS

END