📄 92105530.asm
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;**************************************************************************
;* *
;* CX9210.ASM *
;* *
;* Copyright (c) 1998-1999 National Semiconductor Corporation. *
;* All Rights Reserved. *
;* *
;* Function: *
;* Initialization for the 9210 DSTN controller. *
;* *
;* $Revision:: 1 $
;**************************************************************************
.486P
INCLUDE MACROS.INC ; Macros used throughout
INCLUDE DEF.INC ; EQU Definitions
INCLUDE PORT80.INC ; Post code Definitions
INCLUDE STRINGS.INC ; New macros and defines
INCLUDE OPTIONS.INC
INCLUDE 5530.INC
_TEXT SEGMENT PUBLIC use16 'CODE'
extern hex_byte:NEAR
extern hex_word:NEAR
extern hex_dword:NEAR
EXTERN Delay_100_mSec:near
;;; Data Ports
CLOCKP9210 EQU 090h
DATAINP9210 EQU 090h
DATAOUTP9210 EQU 090h
CSP9210 EQU 090h
;;; Pin MASKS
CLOCK9210 EQU 040h
DATAIN9210 EQU 020h
DATAOUT9210 EQU 080h
CS9210 EQU 008h
cx92xxinit PROC NEAR PUBLIC
pusha
pushf
call Delay_100_mSec
call cx9210gpioInit ; Get the GPIO's ready, direction & state.
; Wake up the Cx9210 Per Section 3.6 of 9210 data book
mov cx, 5
cld
clockInit9210:
call cx9210toggleClock
loop clockInit9210
mov bl, 0
nextread9210:
call cx9210readReg
call hex_byte
msg ' '
inc bl
cmp bl, 012h
je DoneWithDump1
jmp nextread9210
DoneWithDump1:
crlf
crlf
mov cx, TableLength
shr cx, 1
lea si, TableStart
DSTNLoop:
mov bl, cs:[si] ; Get index
inc si ; Advance table pointer
mov al, cs:[si] ; Get data
inc si
call cx9210writeReg
loop DSTNLoop
mov bl, 0
nextread92102:
call cx9210readReg
call hex_byte
msg ' '
inc bl
cmp bl, 012h
je DoneWithDump2
jmp nextread92102
DoneWithDump2:
popf
popa
ret
cx92xxinit ENDP
cx9210gpioInit PROC NEAR PUBLIC
push dx
push ax
mov dx, 0CF8h ; Point to PCI address register
mov eax, CX55x0_ID+090h ; 55XX GPIO direction register
out dx, eax
mov dl, 0FCh ; Point to PCI data register (CFCh)
in al, dx ; Make CLOCK9210 an output
or al, CLOCK9210
out dx, al
in al, dx ; Make DATAOUT9210 an output
or al, DATAOUT9210
out dx, al
in al, dx ; Make DATAIN9210 an INPUT
and al, NOT DATAIN9210
out dx, al
in al, dx ; Make CS9210 an output
or al, CS9210
out dx, al
; Set all PINS LOW
in ax, dx ; Drive CLOCK9210 Low
and ah, NOT CLOCK9210
out dx, ax
in ax, dx ; Drive DATAOUT9210 Low
and ah, NOT DATAOUT9210
out dx, ax
in ax, dx ; Drive DATAIN9210 Low
and ah, NOT DATAIN9210
out dx, ax
in ax, dx ; Drive CS9210 Low
and ah, NOT CS9210
out dx, ax
pop ax
pop dx
ret
cx9210gpioInit ENDP
;------------------------------------------------
; Read an indexed register from Cx9210
;
; BL contains Register to Read
; AL contains Data on Exit, BL is maintained.
cx9210readReg PROC NEAR PUBLIC
push ebx
push edx
push ecx
mov al, bl ; Command in AX with INDEX
; Set CS
; Send 1 0 0 0 Read command
;
call cx9210setCS ; Set CS
call cx9210toggleClock ; 1 clock
call cx9210setDataOut ; Set start bit
call cx9210toggleClock ; 1 clock
call cx9210clearDataOut ; Clear
call cx9210toggleClock ; 1 clock
call cx9210clearDataOut ; Clear
call cx9210toggleClock ; 1 clock
call cx9210clearDataOut ; Clear
call cx9210toggleClock ; 1 clock
;
; Send Register INDEX to read
;
mov cx, 8 ; 8 bits to send
cld ; Count down
readRegIndexSend:
rol al, 1
mov dl, al ; Put lower 8 bits into DL
and dl, 01h ; Mask off all but data bit
cmp dl, 1 ; Is it SET?
jne readRegIndexClr ; no Its CLEAR
readRegIndexSet:
call cx9210setDataOut
jmp readRegIndexClock
readRegIndexClr:
call cx9210clearDataOut
readRegIndexClock:
call cx9210toggleClock ; 1 clock
loop readRegIndexSend
readRegIndexIdle:
call cx9210clearDataOut
call cx9210toggleClock ; 1 clock
xor dx, dx
mov cx, 7 ; 7 bits to read
cld ; Count down
readRegData:
call cx9210ReadDataIn ; read data
or dl, al ; store in dl
shl dl, 1 ; move data left one
call cx9210toggleClock ; 1 clock
loop readRegData
call cx9210ReadDataIn ; read data; LAST BIT, No Shift
or dl, al ; store in dl
call cx9210clearCS ; Clear CS
call cx9210toggleClock ; 1 clock
call cx9210toggleClock ; 1 clock
mov al, dl ; al contains value read
pop ecx
pop edx
pop ebx
ret
cx9210readReg ENDP
;------------------------------------------------
; write an indexed register from Cx9210
;
; BL contains Register to Read
; AL contains Data
cx9210writeReg PROC NEAR PUBLIC
push ebx
push edx
push ecx
mov ah, bl
; Set CS
; Send 1 0 0 1 Write command
;
call cx9210setCS ; Set CS
call cx9210toggleClock ; 1 clock
call cx9210setDataOut ; Set start bit
call cx9210toggleClock ; 1 clock
call cx9210clearDataOut ; Clear
call cx9210toggleClock ; 1 clock
call cx9210clearDataOut ; Clear
call cx9210toggleClock ; 1 clock
call cx9210setDataOut ; Clear
call cx9210toggleClock ; 1 clock
mov cx, 16 ; 8 bits to send
cld ; Count down
wrRegIndexSend:
rol ax, 1
mov dl, al ; Put lower 8 bits into DL
and dl, 01h ; Mask off all but data bit
cmp dl, 1 ; Is it SET?
jne wrRegIndexClr ; no Its CLEAR
wrRegIndexSet:
call cx9210setDataOut
jmp wrRegIndexClock
wrRegIndexClr:
call cx9210clearDataOut
wrRegIndexClock:
call cx9210toggleClock ; 1 clock
loop wrRegIndexSend
wrRegIndexIdle:
call cx9210clearDataOut
call cx9210toggleClock ; 1 clock
call cx9210clearCS ; Set CS
call cx9210toggleClock ; 1 clock
call cx9210toggleClock ; 1 clock
pop ecx
pop edx
pop ebx
ret
cx9210writeReg ENDP
cx9210setCS PROC NEAR PUBLIC
pusha
mov dx, 0CF8h ; Point to PCI address register
mov eax, CX55x0_ID+090h ; 55XX GPIO direction register
out dx, eax
mov dl, 0FCh ; Point to PCI data register (CFCh)
in ax, dx
or ah, CS9210
out dx, ax
popa
ret
cx9210setCS ENDP
cx9210clearCS PROC NEAR PUBLIC
pusha
mov dx, 0CF8h ; Point to PCI address register
mov eax, CX55x0_ID+090h ; 55XX GPIO direction register
out dx, eax
mov dl, 0FCh ; Point to PCI data register (CFCh)
; Set CS LOW
in ax, dx
and ah, NOT CS9210
out dx, ax
popa
ret
cx9210clearCS ENDP
cx9210setDataOut PROC NEAR PUBLIC
pusha
mov dx, 0CF8h ; Point to PCI address register
mov eax, CX55x0_ID+090h ; 55XX GPIO direction register
out dx, eax
mov dl, 0FCh ; Point to PCI data register (CFCh)
; Set DATA HIGH
in ax, dx
or ah, DATAOUT9210
out dx, ax
popa
ret
cx9210setDataOut ENDP
cx9210clearDataOut PROC NEAR PUBLIC
pusha
mov dx, 0CF8h ; Point to PCI address register
mov eax, CX55x0_ID+090h ; 55XX GPIO direction register
out dx, eax
mov dl, 0FCh ; Point to PCI data register (CFCh)
; Set Data LOW
in ax, dx
and ah, NOT DATAOUT9210
out dx, ax
popa
ret
cx9210clearDataOut ENDP
cx9210readDataIn PROC NEAR PUBLIC
push DX
mov dx, 0CF8h ; Point to PCI address register
mov eax, CX55x0_ID+090h ; 55XX GPIO direction register
out dx, eax
mov dl, 0FCh ; Point to PCI data register (CFCh)
in ax, dx
and ah, DATAIN9210 ; Preserve just Data IN bit
mov al, ah
cmp al, 0 ; Is it LOW?
je readDataLow
mov al, 1 ; must be HIGH
readDataLow:
pop DX
ret
cx9210ReadDataIn ENDP
cx9210toggleClock PROC NEAR PUBLIC
pusha
mov dx, 0CF8h ; Point to PCI address register
mov eax, CX55x0_ID+090h ; 55XX GPIO direction register
out dx, eax
mov dl, 0FCh ; Point to PCI data register (CFCh)
; SET CLOCK
in ax, dx
or ah, CLOCK9210
out dx, ax
IOPAUSE
mov dx, 0CF8h ; Point to PCI address register
mov eax, CX55x0_ID+090h ; 55XX GPIO direction register
out dx, eax
mov dl, 0FCh ; Point to PCI data register (CFCh)
; CLEAR CLOCK
in ax, dx
and ah, NOT CLOCK9210
out dx, ax
popa
ret
cx9210toggleClock ENDP
TableStart LABEL BYTE
DSTNTable1 BYTE 2h, 80h,
2h, 24h,
03h,00h,
0c0h,00h,
0c1h,00h,
0c2h,00h,
0c3h,00h,
0c4h,00h,
0c5h,01h,
0c6h,0ffh,
0c7h,0ffh,
0c8h, 03h,
0c9h, 0feh,
0cah, 00h,
0cbh, 3fh,
0cch, 0ch,
0cdh, 01h,
0ceh, 0ffh,
0cfh, 0c1h
BYTE 0d0h, 00h,
0d1h, 7eh,
0d2h, 03h,
0d3h, 0feh,
0d4h, 03h,
0d5h, 81h,
0d6h, 0fch,
0d7h, 3fh,
0d8h, 14h,
0d9h, 1eh,
0dah, 0fh,
0dbh, 0c7h,
0dch, 29h,
0ddh, 0e1h,
0deh, 0f1h,
0dfh, 0f9h
BYTE 0e0h, 02h,
0e1h, 0eh,
0e2h, 1eh,
0e3h, 3eh,
0e4h, 04h,
0e5h, 71h,
0e6h, 0e3h,
0e7h, 0cfh,
0e8h, 01h,
0e9h, 86h,
0eah, 3ch,
0ebh, 0f3h,
0ech, 0ah,
0edh, 39h,
0eeh, 0c7h,
0efh, 3dh
BYTE 0f0h, 14h,
0f1h, 0c6h,
0f2h, 39h,
0f3h, 0ceh,
0f4h, 03h,
0f5h, 19h,
0f6h, 0ceh,
0f7h, 77h,
0f8h, 00h,
0f9h, 66h,
0fah, 33h,
0fbh, 0bbh,
0fch, 2dh,
0fdh, 99h,
0feh, 0ddh,
0ffh, 0ddh
BYTE 03h, 01h,
0c0h, 02h,
0c1h, 22h,
0c2h, 66h,
0c3h, 66h,
0c4h, 00h,
0c5h, 0cdh,
0c6h, 99h,
0c7h, 0bbh,
0c8h, 05h,
0c9h, 32h,
0cah, 66h,
0cbh, 0ddh,
0cch, 1ah,
0cdh, 4dh,
0ceh, 9bh,
0cfh, 6fh
BYTE 0d0h, 00h,
0d1h, 92h,
0d2h, 6dh,
0d3h, 0b6h,
0d4h, 05h,
0d5h, 25h,
0d6h, 0b6h,
0d7h, 0dbh,
0d8h, 02h,
0d9h, 5ah,
0dah, 4bh,
0dbh, 6dh,
0dch, 29h,
0ddh, 0a5h,
0deh, 0b5h,
0dfh, 0b7h
BYTE 0e0h, 04h,
0e1h, 4ah,
0e2h, 5ah,
0e3h, 0dah,
0e4h, 12h,
0e5h, 95h,
0e6h, 0adh,
0e7h, 6fh,
0e8h, 01h,
0e9h, 2ah,
0eah, 56h,
0ebh, 0b5h,
0ech, 0eh,
0edh, 55h,
0eeh, 0abh,
0efh, 5fh
BYTE 0f0h, 00h,
0f1h, 0aah,
0f2h, 55h,
0f3h, 0eah,
0f4h, 01h,
0f5h, 55h,
0f6h, 0aah,
0f7h, 0bfh,
0f8h, 06h,
0f9h, 0aah,
0fah, 55h,
0fbh, 55h,
0fch, 39h,
0fdh, 55h,
0feh, 0ffh,
0ffh, 0ffh
BYTE 03h, 02h,
0c0h, 00h,
0c1h, 00h,
0c2h, 0aah,
0c3h, 0aah,
0c4h, 06h,
0c5h, 0abh,
0c6h, 55h,
0c7h, 55h,
0c8h, 01h,
0c9h, 54h,
0cah, 0aah,
0cbh, 0bfh,
0cch, 08h,
0cdh, 0abh,
0ceh, 55h,
0cfh, 0ebh
BYTE 0d0h, 06h,
0d1h, 54h,
0d2h, 0abh,
0d3h, 5eh,
0d4h, 01h,
0d5h, 2bh,
0d6h, 56h,
0d7h, 0b5h,
0d8h, 12h,
0d9h, 94h,
0dah, 0adh,
0dbh, 6fh,
0dch, 2dh,
0ddh, 4bh,
0deh, 5bh,
0dfh, 0dbh
BYTE 0e0h, 00h,
0e1h, 0a4h,
0e2h, 0b4h,
0e3h, 0b6h,
0e4h, 02h,
0e5h, 5bh,
0e6h, 4bh,
0e7h, 6dh,
0e8h, 05h,
0e9h, 24h,
0eah, 0b6h,
0ebh, 0dbh,
0ech, 08h,
0edh, 93h,
0eeh, 6dh,
0efh, 0b7h
BYTE 0f0h, 12h,
0f1h, 4ch,
0f2h, 9bh,
0f3h, 6eh,
0f4h, 05h,
0f5h, 33h,
0f6h, 66h,
0f7h, 0ddh,
0f8h, 00h,
0f9h, 0cch,
0fah, 99h,
0fbh, 0bbh,
0fch, 2bh,
0fdh, 33h,
0feh, 77h,
0ffh, 77h
BYTE 03h, 03h,
0c0h, 04h,
0c1h, 88h,
0c2h, 0cch,
0c3h, 0cch,
0c4h, 00h,
0c5h, 67h,
0c6h, 33h,
0c7h, 0bbh,
0c8h, 03h,
0c9h, 18h,
0cah, 0ceh,
0cbh, 77h,
0cch, 1ch,
0cdh, 0c7h,
0ceh, 39h,
0cfh, 0cfh
BYTE 0d0h, 02h,
0d1h, 38h,
0d2h, 0c7h,
0d3h, 3ch,
0d4h, 01h,
0d5h, 87h,
0d6h, 3ch,
0d7h, 0f3h,
0d8h, 04h,
0d9h, 70h,
0dah, 0e3h,
0dbh, 0cfh,
0dch, 2bh,
0ddh, 0fh,
0deh, 1fh,
0dfh, 3fh
BYTE 0e0h, 00h,
0e1h, 0e0h,
0e2h, 0f0h,
0e3h, 0f8h,
0e4h, 14h,
0e5h, 1fh,
0e6h, 0fh,
0e7h, 0c7h,
0e8h, 03h,
0e9h, 80h,
0eah, 0fch,
0ebh, 3fh,
0ech, 08h,
0edh, 7fh,
0eeh, 03h,
0efh, 0ffh
BYTE 0f0h, 04h,
0f1h, 00h,
0f2h, 0ffh,
0f3h, 0c0h,
0f4h, 03h,
0f5h, 0ffh,
0f6h, 00h,
0f7h, 3fh,
0f8h, 00h,
0f9h, 00h,
0fah, 0ffh,
0fbh, 0ffh,
0fch, 3fh,
0fdh, 0ffh,
0feh, 0ffh,
0ffh, 0ffh,
03h, 04h
;Setup the Dither to Pattern33
BYTE 80h, 0ddh,
81h, 0ddh,
82h, 33h,
83h, 33h,
84h, 0ddh,
85h, 0ddh,
86h, 33h,
87h, 33h,
88h, 33h,
89h, 33h,
8ah, 77h,
8bh, 77h,
8ch, 33h,
8dh, 33h,
8eh, 77h,
8fh, 77h
BYTE 90h, 0ddh,
91h, 0ddh,
92h, 33h,
93h, 33h,
94h, 0ddh,
95h, 0ddh,
96h, 33h,
97h, 33h,
98h, 33h,
99h, 33h,
9ah, 77h,
9bh, 77h,
9ch, 33h,
9dh, 33h,
9eh, 77h,
9fh, 77h
;Set the register to the appropriate values for 800x600
BYTE 4h, 20h,
5h, 3h,
6h, 56h,
7h, 2h,
8h, 18h,
9h, 0h,
0ah, 0a8h,
0bh, 0h,
0ch, 0e8h,
0dh, 3h,
0eh, 9fh,
0fh, 8h,
10h, 0f4h,
11h, 1h,
12h, 64h,
13h, 0h,
14h, 31h,
15h, 23h,
16h, 0h
;Enable DSTN panel
BYTE 2h,64h
TableLength EQU ($ - TableStart)
_TEXT ENDS
END
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