p&e_fcs.map

MC68HC单片机原理及C语言

     _IDIVMOD                                  C173      69     105       1   .text       
     _IDIVU                                    C1DC      10      16       1   .text       
     _IDIVU_8                                  C1EC       C      12       1   .text       
- VARIABLES:

*********************************************************************************************
SECTION USE IN OBJECT-ALLOCATION SECTION
---------------------------------------------------------------------------------------------
SECTION: ".text"
  delay main _IDIVMOD _IDIVU _IDIVU_8 
SECTION: ".init"
  loadByte Init _Startup 
SECTION: ".abs_section_5e"
  _ADASCR 
SECTION: ".abs_section_58"
  _ADICLK 
SECTION: ".abs_section_59"
  _ADR0 _ADR0H 
SECTION: ".abs_section_5a"
  _ADR0L 
SECTION: ".abs_section_5b"
  _ADR1L 
SECTION: ".abs_section_5c"
  _ADR2L 
SECTION: ".abs_section_5d"
  _ADR3L 
SECTION: ".abs_section_57"
  _ADSCR 
SECTION: ".abs_section_e"
  _AMCR 
SECTION: ".abs_section_f"
  _AMGCR 
SECTION: ".abs_section_10"
  _AMSCR 
SECTION: ".abs_section_fe0c"
  _BRK _BRKH 
SECTION: ".abs_section_fe0d"
  _BRKL 
SECTION: ".abs_section_fe0e"
  _BRKSCR 
SECTION: ".abs_section_1f"
  _CONFIG1 
SECTION: ".abs_section_1d"
  _CONFIG2 
SECTION: ".abs_section_ffff"
  _COPCTL 
SECTION: ".abs_section_4"
  _DDRA 
SECTION: ".abs_section_5"
  _DDRB 
SECTION: ".abs_section_6"
  _DDRC 
SECTION: ".abs_section_7"
  _DDRD 
SECTION: ".abs_section_ff09"
  _FLBPR 
SECTION: ".abs_section_fe08"
  _FLCR 
SECTION: ".abs_section_fe04"
  _INT1 
SECTION: ".abs_section_fe05"
  _INT2 
SECTION: ".abs_section_fe06"
  _INT3 
SECTION: ".abs_section_1e"
  _INTSCR1 
SECTION: ".abs_section_1c"
  _INTSCR2 
SECTION: ".abs_section_1b"
  _KBIER 
SECTION: ".abs_section_1a"
  _KBSCR 
SECTION: ".abs_section_c"
  _LEDA 
SECTION: ".abs_section_d"
  _LEDC 
SECTION: ".abs_section_fe0f"
  _LVISR 
SECTION: ".abs_section_48"
  _MMADR 
SECTION: ".abs_section_49"
  _MMCR1 
SECTION: ".abs_section_4a"
  _MMCR2 
SECTION: ".abs_section_4e"
  _MMCRCDR 
SECTION: ".abs_section_4d"
  _MMDRR 
SECTION: ".abs_section_4c"
  _MMDTR 
SECTION: ".abs_section_4f"
  _MMFDR 
SECTION: ".abs_section_4b"
  _MMSR 
SECTION: ".abs_section_ff80"
  _MOR 
SECTION: ".abs_section_37"
  _PBWC 
SECTION: ".abs_section_36"
  _PCTL 
SECTION: ".abs_section_3b"
  _PMDS 
SECTION: ".abs_section_3a"
  _PMRS 
SECTION: ".abs_section_38"
  _PMS _PMSH 
SECTION: ".abs_section_39"
  _PMSL 
SECTION: ".abs_section_0"
  _PTA 
SECTION: ".abs_section_1"
  _PTB 
SECTION: ".abs_section_2"
  _PTC 
SECTION: ".abs_section_3"
  _PTD 
SECTION: ".abs_section_52"
  _PWMCCR 
SECTION: ".abs_section_51"
  _PWMCR 
SECTION: ".abs_section_53"
  _PWMDR0 
SECTION: ".abs_section_54"
  _PWMDR1 
SECTION: ".abs_section_55"
  _PWMDR2 
SECTION: ".abs_section_56"
  _PWMPCR 
SECTION: ".abs_section_fe03"
  _SBFCR 
SECTION: ".abs_section_fe00"
  _SBSR 
SECTION: ".abs_section_19"
  _SCBR 
SECTION: ".abs_section_13"
  _SCC1 
SECTION: ".abs_section_14"
  _SCC2 
SECTION: ".abs_section_15"
  _SCC3 
SECTION: ".abs_section_18"
  _SCDR 
SECTION: ".abs_section_16"
  _SCS1 
SECTION: ".abs_section_17"
  _SCS2 
SECTION: ".abs_section_fe01"
  _SRSR 
SECTION: ".abs_section_21"
  _T1CNT _T1CNTH 
SECTION: ".abs_section_22"
  _T1CNTL 
SECTION: ".abs_section_26"
  _T1CH0 _T1CH0H 
SECTION: ".abs_section_27"
  _T1CH0L 
SECTION: ".abs_section_29"
  _T1CH1 _T1CH1H 
SECTION: ".abs_section_2a"
  _T1CH1L 
SECTION: ".abs_section_23"
  _T1MOD _T1MODH 
SECTION: ".abs_section_24"
  _T1MODL 
SECTION: ".abs_section_20"
  _T1SC 
SECTION: ".abs_section_25"
  _T1SC0 
SECTION: ".abs_section_28"
  _T1SC1 
SECTION: ".abs_section_2c"
  _T2CNT _T2CNTH 
SECTION: ".abs_section_2d"
  _T2CNTL 
SECTION: ".abs_section_31"
  _T2CH0 _T2CH0H 
SECTION: ".abs_section_32"
  _T2CH0L 
SECTION: ".abs_section_34"
  _T2CH1 _T2CH1H 
SECTION: ".abs_section_35"
  _T2CH1L 
SECTION: ".abs_section_2e"
  _T2MOD _T2MODH 
SECTION: ".abs_section_2f"
  _T2MODL 
SECTION: ".abs_section_2b"
  _T2SC 
SECTION: ".abs_section_30"
  _T2SC0 
SECTION: ".abs_section_33"
  _T2SC1 
SECTION: ".abs_section_46"
  _TBCR 

*********************************************************************************************
UNUSED-OBJECTS SECTION
---------------------------------------------------------------------------------------------
NOT USED PROCEDURES
RTSHC08.C.o (ansii.lib):
  _PUSH_ARGS_L _PUSH_ARGS_D _ENTER_UNARY_L _ENTER_UNARY_L64 _ENTER_UNARY_L64_4 
  _ENTER_BINARY_L _ENTER_BINARY_L_RC _ENTER_BINARY_L_LC _ENTER_BINARY_L64 
  _ENTER_BINARY_L64_LC _ENTER_BINARY_L64_RC _SPLITSIGN _LADD_k_is_k_plus_j 
  _k_is_k_plus_j_l _k_is_k_plus_j_i _LSUB_k_is_k_minus_j _LAND_k_is_k_and_j 
  _LOR_k_is_k_or_j _LXOR_k_is_k_xor_j _LMUL_k_is_k_mul_j _LDIVMOD _NEG_L_HX 
  _ABS_L_HX _SPLITSIGN_L _LMODU_k_is_k_mod_j _LDIVU_k_is_k_div_j 
  _LMODS_k_is_k_mod_j _LDIVS_k_is_k_div_j _LCMP_k_rel_j _BMULS _BDIVS _BMODS 
  _IMUL _IDIVS _IMODS _IMODU _IMODU_8 _IASR _ILSR _ILSL _ICMP _LINC _LDEC _LNEG 
  _LNOT _LADD _LADD_RC _LSUB _LSUB_LC _LSUB_RC _LAND _LAND_RC _LOR _LOR_RC 
  _LXOR _LXOR_RC _LMUL _LMUL_RC _LDIVS _LDIVS_LC _LDIVS_RC _LDIVU _LDIVU_LC 
  _LDIVU_RC _LMODS _LMODS_LC _LMODS_RC _LMODU _LMODU_LC _LMODU_RC _LASR _LLSR 
  _LLSL _LCMP _LCMP_RC _COPY _COPY_L _POP32 _POP64 _STORE32 _STORE64 _SEXT8_32 
  _SEXT16_32 _CALL _Jump_Table_Addr _Jump_Table_Offset _Jump_Table_Header_Addr 
  _Jump_Table_Header_Offset _Search_Table_16_Addr _Search_Table_16_Offset 
  _Search_Table_8_Addr _Search_Table_8_Offset _PUSH_CC _POP_CC 
NOT USED VARIABLES
RTSHC08.C.o (ansii.lib):
  _PowOfTwo_8 _PowOfTwo_16 _PowOfTwo_32 errno 

*********************************************************************************************
COPYDOWN SECTION
---------------------------------------------------------------------------------------------
------- ROM-ADDRESS: 0xC1F8 ---- SIZE       2 ---
Filling bytes inserted
 0000

*********************************************************************************************
OBJECT-DEPENDENCIES SECTION
---------------------------------------------------------------------------------------------
Init                      USES _startupData loadByte 
_Startup                  USES _startupData __SEG_END_SSTACK Init 
main                      USES _CONFIG1 _ADICLK _DDRD _PTD _ADSCR _ADR0L 
                                _IDIVU_8 delay 
_IDIVU                    USES _IDIVMOD 
_IDIVU_8                  USES _IDIVU 

*********************************************************************************************
DEPENDENCY TREE
*********************************************************************************************
 main and _Startup Group
 | 
 +- main                
 |  | 
 |  +- _IDIVU_8            
 |  |  | 
 |  |  +- _IDIVU              
 |  |     | 
 |  |     +- _IDIVMOD            
 |  |          
 |  +- delay               
 |       
 +- _Startup            
    | 
    +- Init                
       | 
       +- loadByte            
            
*********************************************************************************************
STATISTIC SECTION
---------------------------------------------------------------------------------------------

ExeFile:
--------
Number of blocks to be downloaded: 5
Total size of all blocks to be downloaded: 508