clkscan2.hif

采用Quartus2编写的数码管扫描显示电路 共有三个电路 电路1：当按下启动计时按钮时

Version 5.0 Build 148 04/26/2005 SJ Full Version
32
1624
OFF
OFF
OFF
OFF
OFF
FV_OFF
VRSM_ON
VHSM_ON
0
# entity
clkscan
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
clkscan.v
973927410
7
# storage
db|clkscan2.(2).cnf
db|clkscan2.(2).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# include_file {
clkscan.v
973927410
}
# hierarchies {
clkscan:inst6
}
# end
# entity
clkdiv
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
clkdiv.v
974061776
7
# storage
db|clkscan2.(3).cnf
db|clkscan2.(3).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
clkdiv:inst
}
# end
# entity
clkdiv1ms
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
clkdiv1ms.v
974063510
7
# storage
db|clkscan2.(5).cnf
db|clkscan2.(5).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
clkdiv1ms:inst3
}
# end
# entity
clkscan2
# case_insensitive
# source_file
clkscan2.bdf
1208179246
23
# storage
db|clkscan2.(0).cnf
db|clkscan2.(0).cnf
# hierarchies {
|
}
# end
# entity
p7segment
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
p7segment.v
1208178366
7
# storage
db|clkscan2.(1).cnf
db|clkscan2.(1).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
p7segment:inst7
}
# end
# entity
button
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
button.v
1208172728
7
# storage
db|clkscan2.(4).cnf
db|clkscan2.(4).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
button:inst2
button:inst4
}
# end
# complete