clkscan3.qsf

采用Quartus2编写的数码管扫描显示电路 共有三个电路 电路1：当按下启动计时按钮时

# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic       
# functions, and any output files any of the foregoing           
# (including device programming or simulation files), and any    
# associated documentation or information are expressly subject  
# to the terms and conditions of the Altera Program License      
# Subscription Agreement, Altera MegaCore Function License       
# Agreement, or other applicable license agreement, including,   
# without limitation, that your use is for the sole purpose of   
# programming logic devices manufactured by Altera and sold by   
# Altera or its authorized distributors.  Please refer to the    
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		clkscan3_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 5.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "01:08:29  NOVEMBER 12, 2000"
set_global_assignment -name LAST_QUARTUS_VERSION 5.0
set_global_assignment -name VERILOG_FILE button.v
set_global_assignment -name VERILOG_FILE clkdiv1ms.v
set_global_assignment -name VERILOG_FILE clkdiv.v
set_global_assignment -name VERILOG_FILE p7segment.v
set_global_assignment -name VERILOG_FILE clkscan.v
set_global_assignment -name VERILOG_FILE timer.v
set_global_assignment -name BDF_FILE clkscan3.bdf
set_global_assignment -name BDF_FILE clkscan3_test.bdf

# Pin & Location Assignments
# ==========================
set_location_assignment PIN_28 -to clk
set_location_assignment PIN_132 -to start
set_location_assignment PIN_128 -to reset
set_location_assignment PIN_162 -to scan_en[8]
set_location_assignment PIN_161 -to scan_en[7]
set_location_assignment PIN_160 -to scan_en[6]
set_location_assignment PIN_159 -to scan_en[5]
set_location_assignment PIN_158 -to scan_en[4]
set_location_assignment PIN_141 -to scan_en[3]
set_location_assignment PIN_140 -to scan_en[2]
set_location_assignment PIN_139 -to scan_en[1]
set_location_assignment PIN_163 -to out[7]
set_location_assignment PIN_164 -to out[6]
set_location_assignment PIN_165 -to out[5]
set_location_assignment PIN_166 -to out[4]
set_location_assignment PIN_167 -to out[3]
set_location_assignment PIN_168 -to out[2]
set_location_assignment PIN_169 -to out[1]
set_location_assignment PIN_173 -to out[0]

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY Cyclone
set_global_assignment -name TOP_LEVEL_ENTITY clkscan3

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EP1C12Q240C8
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1

# Simulator Assignments
# =====================
set_global_assignment -name SIMULATION_MODE TIMING
set_global_assignment -name SIMULATOR_GENERATE_SIGNAL_ACTIVITY_FILE ON
set_global_assignment -name VECTOR_INPUT_SOURCE timer.vwf
set_global_assignment -name SIMULATOR_SIGNAL_ACTIVITY_FILE_OUTPUT_DESTINATION clkscan3.saf