clkscan3.map.eqn

采用Quartus2编写的数码管扫描显示电路 共有三个电路 电路1：当按下启动计时按钮时

--E1_h_clk is timer:inst6|h_clk
--operation mode is normal

E1_h_clk_lut_out = !E1L15;
E1_h_clk = DFFEAS(E1_h_clk_lut_out, E1_min_clk, VCC, , D2_signal, , , , );


--C1_count[13] is clkdiv1ms:inst1|count[13]
--operation mode is normal

C1_count[13]_lut_out = C1L1;
C1_count[13] = DFFEAS(C1_count[13]_lut_out, clk, VCC, , , , , , );


--C1_count[12] is clkdiv1ms:inst1|count[12]
--operation mode is normal

C1_count[12]_lut_out = C1L3;
C1_count[12] = DFFEAS(C1_count[12]_lut_out, clk, VCC, , , , , , );


--C1_count[14] is clkdiv1ms:inst1|count[14]
--operation mode is normal

C1_count[14]_lut_out = C1L5 & C1L15;
C1_count[14] = DFFEAS(C1_count[14]_lut_out, clk, VCC, , , , , , );


--C1_count[11] is clkdiv1ms:inst1|count[11]
--operation mode is normal

C1_count[11]_lut_out = C1L6 & C1L15;
C1_count[11] = DFFEAS(C1_count[11]_lut_out, clk, VCC, , , , , , );


--C1L74 is clkdiv1ms:inst1|reduce_nor~99
--operation mode is normal

C1L74 = C1_count[13] # C1_count[12] # !C1_count[11] # !C1_count[14];


--C1_count[8] is clkdiv1ms:inst1|count[8]
--operation mode is normal

C1_count[8]_lut_out = C1L8;
C1_count[8] = DFFEAS(C1_count[8]_lut_out, clk, VCC, , , , , , );


--C1_count[7] is clkdiv1ms:inst1|count[7]
--operation mode is normal

C1_count[7]_lut_out = C1L01;
C1_count[7] = DFFEAS(C1_count[7]_lut_out, clk, VCC, , , , , , );


--C1_count[10] is clkdiv1ms:inst1|count[10]
--operation mode is normal

C1_count[10]_lut_out = C1L21 & C1L15;
C1_count[10] = DFFEAS(C1_count[10]_lut_out, clk, VCC, , , , , , );


--C1_count[9] is clkdiv1ms:inst1|count[9]
--operation mode is normal

C1_count[9]_lut_out = C1L41 & C1L15;
C1_count[9] = DFFEAS(C1_count[9]_lut_out, clk, VCC, , , , , , );


--C1L84 is clkdiv1ms:inst1|reduce_nor~100
--operation mode is normal

C1L84 = C1_count[8] # C1_count[7] # !C1_count[9] # !C1_count[10];


--C1_count[6] is clkdiv1ms:inst1|count[6]
--operation mode is normal

C1_count[6]_lut_out = C1L61;
C1_count[6] = DFFEAS(C1_count[6]_lut_out, clk, VCC, , , , , , );


--C1_count[4] is clkdiv1ms:inst1|count[4]
--operation mode is normal

C1_count[4]_lut_out = C1L81;
C1_count[4] = DFFEAS(C1_count[4]_lut_out, clk, VCC, , , , , , );


--C1_count[3] is clkdiv1ms:inst1|count[3]
--operation mode is normal

C1_count[3]_lut_out = C1L02;
C1_count[3] = DFFEAS(C1_count[3]_lut_out, clk, VCC, , , , , , );


--C1_count[5] is clkdiv1ms:inst1|count[5]
--operation mode is normal

C1_count[5]_lut_out = C1L22 & C1L15;
C1_count[5] = DFFEAS(C1_count[5]_lut_out, clk, VCC, , , , , , );


--C1L94 is clkdiv1ms:inst1|reduce_nor~101
--operation mode is normal

C1L94 = C1_count[6] # C1_count[4] # C1_count[3] # !C1_count[5];


--C1_count[2] is clkdiv1ms:inst1|count[2]
--operation mode is normal

C1_count[2]_lut_out = C1L42;
C1_count[2] = DFFEAS(C1_count[2]_lut_out, clk, VCC, , , , , , );


--C1_count[1] is clkdiv1ms:inst1|count[1]
--operation mode is normal

C1_count[1]_lut_out = C1L62;
C1_count[1] = DFFEAS(C1_count[1]_lut_out, clk, VCC, , , , , , );


--C1_count[0] is clkdiv1ms:inst1|count[0]
--operation mode is normal

C1_count[0]_lut_out = C1L82 & C1L15;
C1_count[0] = DFFEAS(C1_count[0]_lut_out, clk, VCC, , , , , , );


--C1L05 is clkdiv1ms:inst1|reduce_nor~102
--operation mode is normal

C1L05 = C1_count[2] # C1_count[1] # C1_count[0];


--C1L15 is clkdiv1ms:inst1|reduce_nor~103
--operation mode is normal

C1L15 = C1L74 # C1L84 # C1L94 # C1L05;


--D2L1 is button:inst9|add~421
--operation mode is arithmetic

D2L1_carry_eqn = D2L8;
D2L1 = D2L32Q $ (D2L1_carry_eqn);

--D2L2 is button:inst9|add~423
--operation mode is arithmetic

D2L2 = CARRY(!D2L8 # !D2L32Q);


--D2L82Q is button:inst9|cnt[6]~reg0
--operation mode is normal

D2L82Q_lut_out = D2L71;
D2L82Q = DFFEAS(D2L82Q_lut_out, C1_clkout, VCC, , , , , , );


--D2L52Q is button:inst9|cnt[3]~reg0
--operation mode is normal

D2L52Q_lut_out = D2L02;
D2L52Q = DFFEAS(D2L52Q_lut_out, C1_clkout, VCC, , , , , , );


--D2L72Q is button:inst9|cnt[5]~reg0
--operation mode is normal

D2L72Q_lut_out = D2L21;
D2L72Q = DFFEAS(D2L72Q_lut_out, C1_clkout, VCC, , , , , , );


--D2L62Q is button:inst9|cnt[4]~reg0
--operation mode is normal

D2L62Q_lut_out = D2L51;
D2L62Q = DFFEAS(D2L62Q_lut_out, C1_clkout, VCC, , , , , , );


--D2L03 is button:inst9|reduce_nor~69
--operation mode is normal

D2L03 = D2L82Q # D2L52Q # !D2L62Q # !D2L72Q;


--D2L42Q is button:inst9|cnt[2]~reg0
--operation mode is normal

D2L42Q_lut_out = D2L6;
D2L42Q = DFFEAS(D2L42Q_lut_out, C1_clkout, VCC, , , , , , );


--D2L22Q is button:inst9|cnt[0]~reg0
--operation mode is normal

D2L22Q_lut_out = D2L9;
D2L22Q = DFFEAS(D2L22Q_lut_out, C1_clkout, VCC, , , , , , );


--D2L32Q is button:inst9|cnt[1]~reg0
--operation mode is normal

D2L32Q_lut_out = D2L3;
D2L32Q = DFFEAS(D2L32Q_lut_out, C1_clkout, VCC, , , , , , );


--D2L92 is button:inst9|reduce_nor~0
--operation mode is normal

D2L92 = D2L03 # D2L42Q # D2L22Q # !D2L32Q;


--D2L3 is button:inst9|add~426
--operation mode is normal

D2L3 = D2L1 & D2L92;


--D2L4 is button:inst9|add~427
--operation mode is arithmetic

D2L4_carry_eqn = D2L2;
D2L4 = D2L42Q $ (!D2L4_carry_eqn);

--D2L5 is button:inst9|add~429
--operation mode is arithmetic

D2L5 = CARRY(D2L42Q & (!D2L2));


--D2L6 is button:inst9|add~432
--operation mode is normal

D2L6 = D2L4 & D2L92;


--D2L7 is button:inst9|add~433
--operation mode is arithmetic

D2L7 = D2L22Q $ D2L12;

--D2L8 is button:inst9|add~435
--operation mode is arithmetic

D2L8 = CARRY(D2L22Q & D2L12);


--D2L9 is button:inst9|add~438
--operation mode is normal

D2L9 = D2L7 & D2L92;


--D2L01 is button:inst9|add~439
--operation mode is arithmetic

D2L01_carry_eqn = D2L41;
D2L01 = D2L72Q $ (D2L01_carry_eqn);

--D2L11 is button:inst9|add~441
--operation mode is arithmetic

D2L11 = CARRY(!D2L41 # !D2L72Q);


--D2L21 is button:inst9|add~444
--operation mode is normal

D2L21 = D2L01 & D2L92;


--D2L13 is button:inst9|reduce_nor~70
--operation mode is normal

D2L13 = D2L3 # D2L6 # D2L9 # D2L21;


--D2L31 is button:inst9|add~445
--operation mode is arithmetic

D2L31_carry_eqn = D2L91;
D2L31 = D2L62Q $ (!D2L31_carry_eqn);

--D2L41 is button:inst9|add~447
--operation mode is arithmetic

D2L41 = CARRY(D2L62Q & (!D2L91));


--D2L51 is button:inst9|add~450
--operation mode is normal

D2L51 = D2L31 & D2L92;


--D2L61 is button:inst9|add~451
--operation mode is normal

D2L61_carry_eqn = D2L11;
D2L61 = D2L82Q $ (!D2L61_carry_eqn);


--D2L71 is button:inst9|add~456
--operation mode is normal

D2L71 = D2L61 & D2L92;


--D2L81 is button:inst9|add~457
--operation mode is arithmetic

D2L81_carry_eqn = D2L5;
D2L81 = D2L52Q $ (D2L81_carry_eqn);

--D2L91 is button:inst9|add~459
--operation mode is arithmetic

D2L91 = CARRY(!D2L5 # !D2L52Q);


--D2L02 is button:inst9|add~462
--operation mode is normal

D2L02 = D2L81 & D2L92;


--S42L8 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~58
--operation mode is arithmetic

S42L8 = CARRY(!M6L42 & !M6L32 & !S42L6);


--S3L6 is clkscan:inst7|lpm_divide:div_rtl_1|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~48
--operation mode is arithmetic

S3L6 = CARRY(!M1L81 & !M1L71 & !S3L8);


--S61L01 is clkscan:inst7|lpm_divide:mod_rtl_0|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~58
--operation mode is arithmetic

S61L01 = CARRY(!M4L42 & !M4L32 & !S61L8);


--S02L8 is clkscan:inst7|lpm_divide:mod_rtl_2|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~58
--operation mode is arithmetic

S02L8 = CARRY(!M5L42 & !M5L32 & !S02L6);


--S7L6 is clkscan:inst7|lpm_divide:div_rtl_3|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~48
--operation mode is arithmetic

S7L6 = CARRY(!M2L81 & !M2L71 & !S7L8);


--S11L6 is clkscan:inst7|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~48
--operation mode is arithmetic

S11L6 = CARRY(!M3L81 & !M3L71 & !S11L8);


--M5L91 is clkscan:inst7|lpm_divide:mod_rtl_2|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|StageOut[31]~13
--operation mode is normal

M5L91 = E1_hour[2] & (!S91L2);


--M5L02 is clkscan:inst7|lpm_divide:mod_rtl_2|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|StageOut[31]~18
--operation mode is normal

M5L02 = S91L2 & (!E1_hour[2]);


--S02L01 is clkscan:inst7|lpm_divide:mod_rtl_2|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~63
--operation mode is arithmetic

S02L01 = CARRY(S02L11);


--S2L6 is clkscan:inst7|lpm_divide:div_rtl_1|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~48
--operation mode is arithmetic

S2L6 = CARRY(!M1L21 & !M1L11 & !S2L01);


--S32L6 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~53
--operation mode is arithmetic

S32L6 = CARRY(!M6L81 & !M6L71 & !S32L01);


--M6L91 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|StageOut[31]~13
--operation mode is normal

M6L91 = E1_min[2] & (!S32L2);


--M6L02 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|StageOut[31]~18
--operation mode is normal

M6L02 = S32L2 & (!E1_min[2]);


--S42L01 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~63
--operation mode is arithmetic

S42L01 = CARRY(S42L11);


--S91L6 is clkscan:inst7|lpm_divide:mod_rtl_2|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~53
--operation mode is arithmetic

S91L6 = CARRY(!M5L81 & !M5L71 & !S91L01);


--S6L6 is clkscan:inst7|lpm_divide:div_rtl_3|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~48
--operation mode is arithmetic

S6L6 = CARRY(!M2L21 & !M2L11 & !S6L01);


--S01L6 is clkscan:inst7|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~48
--operation mode is arithmetic

S01L6 = CARRY(!M3L21 & !M3L11 & !S01L01);