clkscan3.fit.eqn

采用Quartus2编写的数码管扫描显示电路 共有三个电路 电路1：当按下启动计时按钮时

--operation mode is arithmetic

S11L7_cout_0 = !M3L81 & !M3L71 & !S11L01;
S11L7 = CARRY(S11L7_cout_0);

--S11L8 is clkscan:inst7|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~48COUT1_72 at LC_X32_Y18_N3
--operation mode is arithmetic

S11L8_cout_1 = !M3L81 & !M3L71 & !S11L11;
S11L8 = CARRY(S11L8_cout_1);


--M5L91 is clkscan:inst7|lpm_divide:mod_rtl_2|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|StageOut[31]~13 at LC_X27_Y17_N8
--operation mode is normal

M5L91 = E1_hour[2] & !S91L3;


--M5L02 is clkscan:inst7|lpm_divide:mod_rtl_2|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|StageOut[31]~18 at LC_X29_Y17_N4
--operation mode is normal

M5L02 = S91L3 & !E1_hour[2];


--S02L41 is clkscan:inst7|lpm_divide:mod_rtl_2|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~63 at LC_X30_Y17_N0
--operation mode is arithmetic

S02L41_cout_0 = S02L61;
S02L41 = CARRY(S02L41_cout_0);

--S02L51 is clkscan:inst7|lpm_divide:mod_rtl_2|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~63COUT1_69 at LC_X30_Y17_N0
--operation mode is arithmetic

S02L51_cout_1 = S02L61;
S02L51 = CARRY(S02L51_cout_1);


--S2L7 is clkscan:inst7|lpm_divide:div_rtl_1|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~48 at LC_X26_Y16_N8
--operation mode is arithmetic

S2L7_cout_0 = !M1L11 & !M1L21 & !S2L31;
S2L7 = CARRY(S2L7_cout_0);

--S2L8 is clkscan:inst7|lpm_divide:div_rtl_1|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~48COUT1_72 at LC_X26_Y16_N8
--operation mode is arithmetic

S2L8_cout_1 = !M1L11 & !M1L21 & !S2L41;
S2L8 = CARRY(S2L8_cout_1);


--S32L8 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~53 at LC_X31_Y14_N3
--operation mode is arithmetic

S32L8_cout_0 = !M6L71 & !M6L81 & !S32L41;
S32L8 = CARRY(S32L8_cout_0);

--S32L9 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~53COUT1_72 at LC_X31_Y14_N3
--operation mode is arithmetic

S32L9_cout_1 = !M6L71 & !M6L81 & !S32L51;
S32L9 = CARRY(S32L9_cout_1);


--M6L91 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|StageOut[31]~13 at LC_X35_Y13_N2
--operation mode is normal

M6L91 = !S32L3 & (E1_min[2]);


--M6L02 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|StageOut[31]~18 at LC_X31_Y14_N8
--operation mode is normal

M6L02 = S32L3 & !E1_min[2];


--S42L41 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~63 at LC_X31_Y18_N5
--operation mode is arithmetic

S42L41_cout_0 = S42L61;
S42L41 = CARRY(S42L41_cout_0);

--S42L51 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~63COUT1_69 at LC_X31_Y18_N5
--operation mode is arithmetic

S42L51_cout_1 = S42L61;
S42L51 = CARRY(S42L51_cout_1);


--S91L8 is clkscan:inst7|lpm_divide:mod_rtl_2|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~53 at LC_X29_Y17_N8
--operation mode is arithmetic

S91L8_cout_0 = !M5L71 & !M5L81 & !S91L41;
S91L8 = CARRY(S91L8_cout_0);

--S91L9 is clkscan:inst7|lpm_divide:mod_rtl_2|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~53COUT1_71 at LC_X29_Y17_N8
--operation mode is arithmetic

S91L9_cout_1 = !M5L71 & !M5L81 & !S91L51;
S91L9 = CARRY(S91L9_cout_1);


--S6L7 is clkscan:inst7|lpm_divide:div_rtl_3|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~48 at LC_X35_Y14_N8
--operation mode is arithmetic

S6L7_cout_0 = !M2L21 & !M2L11 & !S6L31;
S6L7 = CARRY(S6L7_cout_0);

--S6L8 is clkscan:inst7|lpm_divide:div_rtl_3|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~48COUT1_72 at LC_X35_Y14_N8
--operation mode is arithmetic

S6L8_cout_1 = !M2L21 & !M2L11 & !S6L41;
S6L8 = CARRY(S6L8_cout_1);


--S01L7 is clkscan:inst7|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~48 at LC_X31_Y15_N3
--operation mode is arithmetic

S01L7_cout_0 = !M3L11 & !M3L21 & !S01L31;
S01L7 = CARRY(S01L7_cout_0);

--S01L8 is clkscan:inst7|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~48COUT1_72 at LC_X31_Y15_N3
--operation mode is arithmetic

S01L8_cout_1 = !M3L11 & !M3L21 & !S01L41;
S01L8 = CARRY(S01L8_cout_1);


--S61L61 is clkscan:inst7|lpm_divide:mod_rtl_0|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~63 at LC_X29_Y18_N0
--operation mode is arithmetic

S61L61_cout_0 = S61L81;
S61L61 = CARRY(S61L61_cout_0);

--S61L71 is clkscan:inst7|lpm_divide:mod_rtl_0|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~63COUT1_70 at LC_X29_Y18_N0
--operation mode is arithmetic

S61L71_cout_1 = S61L81;
S61L71 = CARRY(S61L71_cout_1);


--S51L01 is clkscan:inst7|lpm_divide:mod_rtl_0|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~53 at LC_X30_Y14_N8
--operation mode is arithmetic

S51L01_cout_0 = !M4L81 & !M4L71 & !S51L61;
S51L01 = CARRY(S51L01_cout_0);

--S51L11 is clkscan:inst7|lpm_divide:mod_rtl_0|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~53COUT1_72 at LC_X30_Y14_N8
--operation mode is arithmetic

S51L11_cout_1 = !M4L81 & !M4L71 & !S51L71;
S51L11 = CARRY(S51L11_cout_1);


--S5L5 is clkscan:inst7|lpm_divide:div_rtl_3|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_4|add_sub_cella[2]~48 at LC_X32_Y15_N3
--operation mode is arithmetic

S5L5_cout_0 = !M2L5 & !M2L6 & !S5L11;
S5L5 = CARRY(S5L5_cout_0);

--S5L6 is clkscan:inst7|lpm_divide:div_rtl_3|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_4|add_sub_cella[2]~48COUT1_71 at LC_X32_Y15_N3
--operation mode is arithmetic

S5L6_cout_1 = !M2L5 & !M2L6 & !S5L21;
S5L6 = CARRY(S5L6_cout_1);


--S9L7 is clkscan:inst7|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_4|add_sub_cella[2]~48 at LC_X29_Y15_N3
--operation mode is arithmetic

S9L7_cout_0 = !M3L5 & !M3L6 & !S9L31;
S9L7 = CARRY(S9L7_cout_0);

--S9L8 is clkscan:inst7|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_4|add_sub_cella[2]~48COUT1_72 at LC_X29_Y15_N3
--operation mode is arithmetic

S9L8_cout_1 = !M3L5 & !M3L6 & !S9L41;
S9L8 = CARRY(S9L8_cout_1);


--S81L5 is clkscan:inst7|lpm_divide:mod_rtl_2|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~48 at LC_X28_Y16_N3
--operation mode is arithmetic

S81L5_cout_0 = !M5L11 & !M5L21 & !S81L11;
S81L5 = CARRY(S81L5_cout_0);

--S81L6 is clkscan:inst7|lpm_divide:mod_rtl_2|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~48COUT1_72 at LC_X28_Y16_N3
--operation mode is arithmetic

S81L6_cout_1 = !M5L11 & !M5L21 & !S81L21;
S81L6 = CARRY(S81L6_cout_1);


--M5L31 is clkscan:inst7|lpm_divide:mod_rtl_2|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|StageOut[26]~23 at LC_X30_Y18_N5
--operation mode is normal

M5L31 = E1_hour[3] & (!S81L3);


--M5L41 is clkscan:inst7|lpm_divide:mod_rtl_2|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|StageOut[26]~28 at LC_X28_Y16_N5
--operation mode is normal

M5L41 = !E1_hour[3] & (S81L3);


--S91L11 is clkscan:inst7|lpm_divide:mod_rtl_2|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~58 at LC_X29_Y17_N5
--operation mode is arithmetic

S91L11_cout_0 = S91L61;
S91L11 = CARRY(S91L11_cout_0);

--S91L21 is clkscan:inst7|lpm_divide:mod_rtl_2|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~58COUT1_69 at LC_X29_Y17_N5
--operation mode is arithmetic

S91L21_cout_1 = S91L61;
S91L21 = CARRY(S91L21_cout_1);


--S41L7 is clkscan:inst7|lpm_divide:mod_rtl_0|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~48 at LC_X29_Y14_N8
--operation mode is arithmetic

S41L7_cout_0 = !M4L11 & !M4L21 & !S41L31;
S41L7 = CARRY(S41L7_cout_0);

--S41L8 is clkscan:inst7|lpm_divide:mod_rtl_0|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~48COUT1_72 at LC_X29_Y14_N8
--operation mode is arithmetic

S41L8_cout_1 = !M4L11 & !M4L21 & !S41L41;
S41L8 = CARRY(S41L8_cout_1);


--M4L31 is clkscan:inst7|lpm_divide:mod_rtl_0|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|StageOut[26]~23 at LC_X38_Y13_N4
--operation mode is normal

M4L31 = !S41L5 & (E1_sec[3]);


--M4L41 is clkscan:inst7|lpm_divide:mod_rtl_0|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|StageOut[26]~28 at LC_X38_Y13_N8
--operation mode is normal

M4L41 = S41L5 & (!S41_add_sub_cella[1]);


--S51L31 is clkscan:inst7|lpm_divide:mod_rtl_0|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~58 at LC_X30_Y14_N5
--operation mode is arithmetic

S51L31_cout_0 = S51L81;
S51L31 = CARRY(S51L31_cout_0);

--S51L41 is clkscan:inst7|lpm_divide:mod_rtl_0|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~58COUT1_70 at LC_X30_Y14_N5
--operation mode is arithmetic

S51L41_cout_1 = S51L81;
S51L41 = CARRY(S51L41_cout_1);


--S22L5 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~48 at LC_X32_Y14_N8
--operation mode is arithmetic

S22L5_cout_0 = !M6L21 & !M6L11 & !S22L11;
S22L5 = CARRY(S22L5_cout_0);

--S22L6 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~48COUT1_71 at LC_X32_Y14_N8
--operation mode is arithmetic

S22L6_cout_1 = !M6L21 & !M6L11 & !S22L21;
S22L6 = CARRY(S22L6_cout_1);


--M6L31 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|StageOut[26]~23 at LC_X35_Y14_N2
--operation mode is normal

M6L31 = !S22L3 & E1_min[3];


--M6L41 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|StageOut[26]~28 at LC_X32_Y14_N1
--operation mode is normal

M6L41 = S22L3 & (!E1_min[3]);


--S32L11 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~58 at LC_X31_Y14_N0
--operation mode is arithmetic

S32L11_cout_0 = S32L61;
S32L11 = CARRY(S32L11_cout_0);

--S32L21 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~58COUT1_70 at LC_X31_Y14_N0
--operation mode is arithmetic

S32L21_cout_1 = S32L61;
S32L21 = CARRY(S32L21_cout_1);


--S1L5 is clkscan:inst7|lpm_divide:div_rtl_1|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_4|add_sub_cella[2]~48 at LC_X27_Y16_N8
--operation mode is arithmetic

S1L5_cout_0 = !M1L6 & !M1L5 & !S1L11;
S1L5 = CARRY(S1L5_cout_0);

--S1L6 is clkscan:inst7|lpm_divide:div_rtl_1|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_4|add_sub_cella[2]~48COUT1_71 at LC_X27_Y16_N8
--operation mode is arithmetic

S1L6_cout_1 = !M1L6 & !M1L5 & !S1L21;
S1L6 = CARRY(S1L6_cout_1);


--S3L9 is clkscan:inst7|lpm_divide:div_rtl_1|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~51 at LC_X27_Y18_N2
--operation mode is arithmetic

S3L9 = S3L31 $ (!M1L51 & !M1L61);

--S3L01 is clkscan:inst7|lpm_divide:div_rtl_1|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~53 at LC_X27_Y18_N2
--operation mode is arithmetic

S3L01_cout_0 = !S3L31 & (M1L51 # M1L61);
S3L01 = CARRY(S3L01_cout_0);

--S3L11 is clkscan:inst7|lpm_divide:div_rtl_1|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~53COUT1_71 at LC_X27_Y18_N2
--operation mode is arithmetic

S3L11_cout_1 = !S3L41 & (M1L51 # M1L61);
S3L11 = CARRY(S3L11_cout_1);


--E1_hour[4] is timer:inst6|hour[4] at LC_X27_Y16_N3
--operation mode is arithmetic

E1_hour[4]_lut_out = E1L93;
E1_hour[4] = DFFEAS(E1_hour[4]_lut_out, GLOBAL(E1_h_clk), GLOBAL(D2_signal), , , , , !E1L86, );

--S1L1 is clkscan:inst7|lpm_divide:div_rtl_1|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_4|add_sub_cella[1]~COUT at LC_X27_Y16_N3
--operation mode is arithmetic

S1L1_cout_0 = E1_hour[4];
S1L1 = CARRY(S1L1_cout_0);

--S1L2 is clkscan:inst7|lpm_divide:div_rtl_1|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_4|add_sub_cella[1]~COUTCOUT1 at LC_X27_Y16_N3
--operation mode is arithmetic

S1L2_cout_1 = E1_hour[4];
S1L2 = CARRY(S1L2_cout_1);


--M1L61 is clkscan:inst7|lpm_divide:div_rtl_1|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|StageOut[27]~525 at LC_X27_Y18_N8
--operation mode is normal

M1L61 = !S2L5 & (E1_hour[4] $ S1L3);


--S2L9 is clkscan:inst7|lpm_divide:div_rtl_1|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~51 at LC_X26_Y16_N6
--operation mode is arithmetic

S2L9 = S2L61 $ (!M1L7 & !M1L8);

--S2L01 is clkscan:inst7|lpm_divide:div_rtl_1|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_