clkscan3.fit.eqn

采用Quartus2编写的数码管扫描显示电路 共有三个电路 电路1：当按下启动计时按钮时

--S02L8 is clkscan:inst7|lpm_divide:mod_rtl_2|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~53 at LC_X30_Y17_N2
--operation mode is arithmetic

S02L8_cout_0 = !S02L5 & (M5L22 # M5L12);
S02L8 = CARRY(S02L8_cout_0);

--S02L9 is clkscan:inst7|lpm_divide:mod_rtl_2|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~53COUT1_70 at LC_X30_Y17_N2
--operation mode is arithmetic

S02L9_cout_1 = !S02L6 & (M5L22 # M5L12);
S02L9 = CARRY(S02L9_cout_1);


--S22L3 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~41 at LC_X32_Y14_N9
--operation mode is normal

S22L3 = !S22L5;


--E1_min[3] is timer:inst6|min[3] at LC_X35_Y14_N3
--operation mode is arithmetic

E1_min[3]_lut_out = E1L92;
E1_min[3] = DFFEAS(E1_min[3]_lut_out, GLOBAL(E1_min_clk), GLOBAL(D2_signal), , , , , !E1L76, );

--S22L1 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_cella[1]~COUT at LC_X35_Y14_N3
--operation mode is arithmetic

S22L1_cout_0 = E1_min[3];
S22L1 = CARRY(S22L1_cout_0);

--S22L2 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_cella[1]~COUTCOUT1 at LC_X35_Y14_N3
--operation mode is arithmetic

S22L2_cout_1 = E1_min[3];
S22L2 = CARRY(S22L2_cout_1);


--M6L22 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|StageOut[32]~609 at LC_X31_Y14_N5
--operation mode is normal

M6L22 = !S32L3 & (E1_min[3] $ S22L3);


--S32L4 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~46 at LC_X31_Y14_N1
--operation mode is arithmetic

S32L4 = S32L11 $ (!M6L41 & !M6L31);

--S32L5 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~48 at LC_X31_Y14_N1
--operation mode is arithmetic

S32L5_cout_0 = !M6L41 & !M6L31 & !S32L11;
S32L5 = CARRY(S32L5_cout_0);

--S32L6 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~48COUT1 at LC_X31_Y14_N1
--operation mode is arithmetic

S32L6_cout_1 = !M6L41 & !M6L31 & !S32L21;
S32L6 = CARRY(S32L6_cout_1);


--M6L12 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|StageOut[32]~17 at LC_X31_Y14_N9
--operation mode is normal

M6L12 = S32L3 & S32L4;


--F1L81 is clkscan:inst7|Select~1316 at LC_X30_Y18_N9
--operation mode is normal

F1L81 = F1_scan_en[2] & !S42L3 & (M6L22 # M6L12);


--S61L9 is clkscan:inst7|lpm_divide:mod_rtl_0|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~51 at LC_X29_Y18_N2
--operation mode is arithmetic

S61L9 = S61L7 $ (!M4L12 & !M4L22);

--S61L01 is clkscan:inst7|lpm_divide:mod_rtl_0|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~53 at LC_X29_Y18_N2
--operation mode is arithmetic

S61L01_cout_0 = !S61L7 & (M4L12 # M4L22);
S61L01 = CARRY(S61L01_cout_0);

--S61L11 is clkscan:inst7|lpm_divide:mod_rtl_0|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~53COUT1_71 at LC_X29_Y18_N2
--operation mode is arithmetic

S61L11_cout_1 = !S61L8 & (M4L12 # M4L22);
S61L11 = CARRY(S61L11_cout_1);


--F1L91 is clkscan:inst7|Select~1317 at LC_X30_Y18_N6
--operation mode is normal

F1L91 = F1L81 # S61L5 & F1_scan_en[8] & S61L9;


--S42L7 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~51 at LC_X31_Y18_N7
--operation mode is arithmetic

S42L7 = S42L5 $ (!M6L12 & !M6L22);

--S42L8 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~53 at LC_X31_Y18_N7
--operation mode is arithmetic

S42L8_cout_0 = !S42L5 & (M6L12 # M6L22);
S42L8 = CARRY(S42L8_cout_0);

--S42L9 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~53COUT1_70 at LC_X31_Y18_N7
--operation mode is arithmetic

S42L9_cout_1 = !S42L6 & (M6L12 # M6L22);
S42L9 = CARRY(S42L9_cout_1);


--S1L3 is clkscan:inst7|lpm_divide:div_rtl_1|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_4|add_sub_cella[2]~41 at LC_X27_Y16_N9
--operation mode is normal

S1L3 = !S1L5;


--F1L02 is clkscan:inst7|Select~1318 at LC_X30_Y18_N2
--operation mode is normal

F1L02 = F1_scan_en[2] & S42L3;


--F1L12 is clkscan:inst7|Select~1319 at LC_X30_Y18_N3
--operation mode is normal

F1L12 = S42L7 & (F1L02 # F1_scan_en[7] & S1L3) # !S42L7 & F1_scan_en[7] & (S1L3);


--S4L3 is clkscan:inst7|lpm_divide:div_rtl_1|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~75 at LC_X31_Y19_N3
--operation mode is arithmetic

S4L3_cout_0 = M1L22 & !F1_scan_en[7] & !S4L6 # !M1L22 & (!S4L6 # !F1_scan_en[7]);
S4L3 = CARRY(S4L3_cout_0);

--S4L4 is clkscan:inst7|lpm_divide:div_rtl_1|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~75COUT1_96 at LC_X31_Y19_N3
--operation mode is arithmetic

S4L4_cout_1 = M1L22 & !F1_scan_en[7] & !S4L7 # !M1L22 & (!S4L7 # !F1_scan_en[7]);
S4L4 = CARRY(S4L4_cout_1);


--B1_clkout is clkdiv:inst|clkout at LC_X7_Y9_N1
--operation mode is normal

B1_clkout_lut_out = !B1L88;
B1_clkout = DFFEAS(B1_clkout_lut_out, GLOBAL(clk), VCC, , , , , , );


--E1L96 is timer:inst6|reduce_nor~140 at LC_X38_Y13_N3
--operation mode is normal

E1L96 = E1_sec[3] & E1_sec[0] & E1_sec[1] & !E1_sec[2];


--E1_sec[5] is timer:inst6|sec[5] at LC_X28_Y13_N5
--operation mode is arithmetic

E1_sec[5]_carry_eqn = (!E1L98 & GND) # (E1L98 & VCC);
E1_sec[5]_lut_out = E1_sec[5] $ E1_sec[5]_carry_eqn;
E1_sec[5] = DFFEAS(E1_sec[5]_lut_out, GLOBAL(B1_clkout), GLOBAL(D2_signal), , , , , E1L99, );

--E1L39 is timer:inst6|sec[5]~121 at LC_X28_Y13_N5
--operation mode is arithmetic

E1L39_cout_0 = !E1L98 # !E1_sec[5];
E1L39 = CARRY(E1L39_cout_0);

--E1L49 is timer:inst6|sec[5]~121COUT1_141 at LC_X28_Y13_N5
--operation mode is arithmetic

E1L49_cout_1 = !E1L98 # !E1_sec[5];
E1L49 = CARRY(E1L49_cout_1);


--E1_sec[4] is timer:inst6|sec[4] at LC_X28_Y13_N4
--operation mode is arithmetic

E1_sec[4]_lut_out = E1_sec[4] $ !E1L68;
E1_sec[4] = DFFEAS(E1_sec[4]_lut_out, GLOBAL(B1_clkout), GLOBAL(D2_signal), , , , , E1L99, );

--E1L98 is timer:inst6|sec[4]~125 at LC_X28_Y13_N4
--operation mode is arithmetic

E1L98 = E1L09;


--E1_sec[7] is timer:inst6|sec[7] at LC_X28_Y13_N7
--operation mode is normal

E1_sec[7]_carry_eqn = (!E1L98 & E1L69) # (E1L98 & E1L79);
E1_sec[7]_lut_out = E1_sec[7] $ (E1_sec[7]_carry_eqn);
E1_sec[7] = DFFEAS(E1_sec[7]_lut_out, GLOBAL(B1_clkout), GLOBAL(D2_signal), , , , , E1L99, );


--E1_sec[6] is timer:inst6|sec[6] at LC_X28_Y13_N6
--operation mode is arithmetic

E1_sec[6]_carry_eqn = (!E1L98 & E1L39) # (E1L98 & E1L49);
E1_sec[6]_lut_out = E1_sec[6] $ (!E1_sec[6]_carry_eqn);
E1_sec[6] = DFFEAS(E1_sec[6]_lut_out, GLOBAL(B1_clkout), GLOBAL(D2_signal), , , , , E1L99, );

--E1L69 is timer:inst6|sec[6]~133 at LC_X28_Y13_N6
--operation mode is arithmetic

E1L69_cout_0 = E1_sec[6] & (!E1L39);
E1L69 = CARRY(E1L69_cout_0);

--E1L79 is timer:inst6|sec[6]~133COUT1_142 at LC_X28_Y13_N6
--operation mode is arithmetic

E1L79_cout_1 = E1_sec[6] & (!E1L49);
E1L79 = CARRY(E1L79_cout_1);


--E1L07 is timer:inst6|reduce_nor~141 at LC_X38_Y13_N2
--operation mode is normal

E1L07 = !E1_sec[6] & E1_sec[4] & E1_sec[5] & !E1_sec[7];


--E1_started is timer:inst6|started at LC_X28_Y13_N9
--operation mode is normal

E1_started_lut_out = VCC;
E1_started = DFFEAS(E1_started_lut_out, !D1_signal, GLOBAL(D2_signal), , , , , , );


--E1L99 is timer:inst6|sec[7]~136 at LC_X28_Y13_N8
--operation mode is normal

E1L99 = E1L96 & E1L07 # !E1_started;


--E1L1 is timer:inst6|add~379 at LC_X35_Y15_N0
--operation mode is arithmetic

E1L1 = !E1_min[0];

--E1L2 is timer:inst6|add~381 at LC_X35_Y15_N0
--operation mode is arithmetic

E1L2_cout_0 = E1_min[0];
E1L2 = CARRY(E1L2_cout_0);

--E1L3 is timer:inst6|add~381COUT1_460 at LC_X35_Y15_N0
--operation mode is arithmetic

E1L3_cout_1 = E1_min[0];
E1L3 = CARRY(E1L3_cout_1);


--E1_min_clk is timer:inst6|min_clk at LC_X38_Y13_N7
--operation mode is normal

E1_min_clk_lut_out = E1L07 & E1L96 & E1_started;
E1_min_clk = DFFEAS(E1_min_clk_lut_out, GLOBAL(B1_clkout), GLOBAL(D2_signal), , , , , , );


--S21L3 is clkscan:inst7|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~75 at LC_X32_Y17_N3
--operation mode is arithmetic

S21L3_cout_0 = F1_scan_en[1] & (!S21L6 # !M3L22) # !F1_scan_en[1] & !M3L22 & !S21L6;
S21L3 = CARRY(S21L3_cout_0);

--S21L4 is clkscan:inst7|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~75COUT1_96 at LC_X32_Y17_N3
--operation mode is arithmetic

S21L4_cout_1 = F1_scan_en[1] & (!S21L7 # !M3L22) # !F1_scan_en[1] & !M3L22 & !S21L7;
S21L4 = CARRY(S21L4_cout_1);


--S8L3 is clkscan:inst7|lpm_divide:div_rtl_3|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~75 at LC_X30_Y19_N8
--operation mode is arithmetic

S8L3_cout_0 = F1_scan_en[4] & !M2L22 & !S8L6 # !F1_scan_en[4] & (!S8L6 # !M2L22);
S8L3 = CARRY(S8L3_cout_0);

--S8L4 is clkscan:inst7|lpm_divide:div_rtl_3|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~75COUT1_96 at LC_X30_Y19_N8
--operation mode is arithmetic

S8L4_cout_1 = F1_scan_en[4] & !M2L22 & !S8L7 # !F1_scan_en[4] & (!S8L7 # !M2L22);
S8L4 = CARRY(S8L4_cout_1);


--E1L4 is timer:inst6|add~384 at LC_X28_Y18_N0
--operation mode is arithmetic

E1L4 = !E1_hour[0];

--E1L5 is timer:inst6|add~386 at LC_X28_Y18_N0
--operation mode is arithmetic

E1L5_cout_0 = E1_hour[0];
E1L5 = CARRY(E1L5_cout_0);

--E1L6 is timer:inst6|add~386COUT1_465 at LC_X28_Y18_N0
--operation mode is arithmetic

E1L6_cout_1 = E1_hour[0];
E1L6 = CARRY(E1L6_cout_1);


--E1_h_clk is timer:inst6|h_clk at LC_X35_Y13_N5
--operation mode is normal

E1_h_clk_lut_out = !E1L76;
E1_h_clk = DFFEAS(E1_h_clk_lut_out, GLOBAL(E1_min_clk), VCC, , D2_signal, , , , );


--C1_count[12] is clkdiv1ms:inst1|count[12] at LC_X10_Y15_N8
--operation mode is normal

C1_count[12]_lut_out = C1L4;
C1_count[12] = DFFEAS(C1_count[12]_lut_out, GLOBAL(clk), VCC, , , , , , );


--C1_count[14] is clkdiv1ms:inst1|count[14] at LC_X9_Y15_N9
--operation mode is normal

C1_count[14]_lut_out = C1L26 & (C1L7);
C1_count[14] = DFFEAS(C1_count[14]_lut_out, GLOBAL(clk), VCC, , , , , , );


--C1_count[11] is clkdiv1ms:inst1|count[11] at LC_X9_Y15_N6
--operation mode is normal

C1_count[11]_lut_out = C1L8 & (C1L26);
C1_count[11] = DFFEAS(C1_count[11]_lut_out, GLOBAL(clk), VCC, , , , , , );


--C1L85 is clkdiv1ms:inst1|reduce_nor~99 at LC_X10_Y15_N9
--operation mode is normal

C1_count[13]_qfbk = C1_count[13];
C1L85 = C1_count[12] # C1_count[13]_qfbk # !C1_count[14] # !C1_count[11];

--C1_count[13] is clkdiv1ms:inst1|count[13] at LC_X10_Y15_N9
--operation mode is normal

C1_count[13] = DFFEAS(C1L85, GLOBAL(clk), VCC, , , C1L1, , , VCC);


--C1_count[7] is clkdiv1ms:inst1|count[7] at LC_X10_Y14_N2
--operation mode is normal

C1_count[7]_lut_out = GND;
C1_count[7] = DFFEAS(C1_count[7]_lut_out, GLOBAL(clk), VCC, , , C1L31, , , VCC);


--C1_count[10] is clkdiv1ms:inst1|count[10] at LC_X9_Y15_N8
--operation mode is normal