clkscan3.fit.eqn

采用Quartus2编写的数码管扫描显示电路 共有三个电路 电路1：当按下启动计时按钮时

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--F1_data[0] is clkscan:inst7|data[0] at LC_X31_Y19_N6
--operation mode is normal

F1_data[0]_lut_out = F1L2 # S4L1 # F1L1;
F1_data[0] = DFFEAS(F1_data[0]_lut_out, !GLOBAL(C1_clkout), GLOBAL(D2_signal), , , , , , );


--F1_data[1] is clkscan:inst7|data[1] at LC_X31_Y18_N0
--operation mode is normal

F1_data[1]_lut_out = F1L6 # F1_scan_en[2] & (S42L3 $ E1_min[1]);
F1_data[1] = DFFEAS(F1_data[1]_lut_out, !GLOBAL(C1_clkout), GLOBAL(D2_signal), , , , , , );


--F1_data[2] is clkscan:inst7|data[2] at LC_X30_Y17_N9
--operation mode is normal

F1_data[2]_lut_out = F1L8 # F1L41 # F1_scan_en[2] & F1L9;
F1_data[2] = DFFEAS(F1_data[2]_lut_out, !GLOBAL(C1_clkout), GLOBAL(D2_signal), , , , , , );


--F1_data[3] is clkscan:inst7|data[3] at LC_X30_Y18_N4
--operation mode is normal

F1_data[3]_lut_out = F1L91 # F1L12 # F1L61 # F1L22;
F1_data[3] = DFFEAS(F1_data[3]_lut_out, !GLOBAL(C1_clkout), GLOBAL(D2_signal), , , , , , );


--G1L4 is p7segment:inst8|out[6]~44 at LC_X52_Y22_N6
--operation mode is normal

G1L4 = F1_data[2] & !F1_data[3] & (!F1_data[1] # !F1_data[0]) # !F1_data[2] & (F1_data[1] $ F1_data[3]);


--G1L3 is p7segment:inst8|out[5]~45 at LC_X52_Y22_N8
--operation mode is normal

G1L3 = F1_data[2] & (F1_data[3] # F1_data[0] & F1_data[1]) # !F1_data[2] & (F1_data[1] # F1_data[0] & !F1_data[3]);


--G1L2 is p7segment:inst8|out[4]~46 at LC_X52_Y22_N9
--operation mode is normal

G1L2 = F1_data[0] # F1_data[1] & (F1_data[3]) # !F1_data[1] & F1_data[2];


--G1L1 is p7segment:inst8|out[3]~47 at LC_X52_Y22_N5
--operation mode is normal

G1L1 = F1_data[1] & (F1_data[3] # F1_data[2] & F1_data[0]) # !F1_data[1] & (F1_data[2] $ (F1_data[0] & !F1_data[3]));


--G1L5 is p7segment:inst8|reduce_or~47 at LC_X52_Y22_N4
--operation mode is normal

G1L5 = F1_data[2] & (F1_data[3]) # !F1_data[2] & F1_data[1] & (F1_data[3] # !F1_data[0]);


--G1L6 is p7segment:inst8|reduce_or~48 at LC_X52_Y22_N7
--operation mode is normal

G1L6 = F1_data[2] & (F1_data[3] # F1_data[0] $ F1_data[1]) # !F1_data[2] & (F1_data[1] & F1_data[3]);


--G1L7 is p7segment:inst8|reduce_or~49 at LC_X52_Y22_N2
--operation mode is normal

G1L7 = F1_data[1] & (F1_data[3]) # !F1_data[1] & (F1_data[2] $ (F1_data[0] & !F1_data[3]));


--F1_scan_en[2] is clkscan:inst7|scan_en[2] at LC_X30_Y18_N0
--operation mode is normal

F1_scan_en[2]_lut_out = !F1_scan_en[1];
F1_scan_en[2] = DFFEAS(F1_scan_en[2]_lut_out, !GLOBAL(C1_clkout), GLOBAL(D2_signal), , , , , , );


--F1_scan_en[1] is clkscan:inst7|scan_en[1] at LC_X32_Y17_N7
--operation mode is normal

F1_scan_en[1]_lut_out = !F1_scan_en[8];
F1_scan_en[1] = DFFEAS(F1_scan_en[1]_lut_out, !GLOBAL(C1_clkout), GLOBAL(D2_signal), , , , , , );


--S4L1 is clkscan:inst7|lpm_divide:div_rtl_1|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~68 at LC_X31_Y19_N4
--operation mode is normal

S4L1 = !S4L3;


--E1_sec[0] is timer:inst6|sec[0] at LC_X28_Y13_N0
--operation mode is arithmetic

E1_sec[0]_lut_out = !E1_sec[0];
E1_sec[0] = DFFEAS(E1_sec[0]_lut_out, GLOBAL(B1_clkout), GLOBAL(D2_signal), , , , , E1L99, );

--E1L77 is timer:inst6|sec[0]~105 at LC_X28_Y13_N0
--operation mode is arithmetic

E1L77_cout_0 = E1_sec[0];
E1L77 = CARRY(E1L77_cout_0);

--E1L87 is timer:inst6|sec[0]~105COUT1_138 at LC_X28_Y13_N0
--operation mode is arithmetic

E1L87_cout_1 = E1_sec[0];
E1L87 = CARRY(E1L87_cout_1);


--F1L1 is clkscan:inst7|Select~1296 at LC_X35_Y15_N9
--operation mode is normal

E1_min[0]_qfbk = E1_min[0];
F1L1 = E1_sec[0] & (F1_scan_en[8] # F1_scan_en[2] & E1_min[0]_qfbk) # !E1_sec[0] & F1_scan_en[2] & E1_min[0]_qfbk;

--E1_min[0] is timer:inst6|min[0] at LC_X35_Y15_N9
--operation mode is normal

E1_min[0] = DFFEAS(F1L1, GLOBAL(E1_min_clk), GLOBAL(D2_signal), , , E1L1, , , VCC);


--S21L1 is clkscan:inst7|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~68 at LC_X32_Y17_N4
--operation mode is normal

S21L1 = !S21L3;


--S8L1 is clkscan:inst7|lpm_divide:div_rtl_3|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~68 at LC_X30_Y19_N9
--operation mode is normal

S8L1 = !S8L3;


--F1L2 is clkscan:inst7|Select~1297 at LC_X31_Y19_N8
--operation mode is normal

E1_hour[0]_qfbk = E1_hour[0];
F1L2 = S21L1 # S8L1 # F1_scan_en[5] & E1_hour[0]_qfbk;

--E1_hour[0] is timer:inst6|hour[0] at LC_X31_Y19_N8
--operation mode is normal

E1_hour[0] = DFFEAS(F1L2, GLOBAL(E1_h_clk), GLOBAL(D2_signal), , , E1L4, , , VCC);


--C1_clkout is clkdiv1ms:inst1|clkout at LC_X8_Y13_N2
--operation mode is normal

C1_clkout_lut_out = !C1L26;
C1_clkout = DFFEAS(C1_clkout_lut_out, GLOBAL(clk), VCC, , , , , , );


--D2_signal is button:inst9|signal at LC_X10_Y13_N9
--operation mode is normal

D2_signal_lut_out = !D2L02 & !D2L22 & !D2L83 & !D2L72;
D2_signal = DFFEAS(D2_signal_lut_out, GLOBAL(C1_clkout), VCC, , , , , , );


--S42L3 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~41 at LC_X31_Y18_N9
--operation mode is normal

S42L3 = !S42L11;


--E1_min[1] is timer:inst6|min[1] at LC_X35_Y13_N8
--operation mode is arithmetic

E1_min[1]_lut_out = E1L7;
E1_min[1] = DFFEAS(E1_min[1]_lut_out, GLOBAL(E1_min_clk), GLOBAL(D2_signal), , , , , , );

--S42L1 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[1]~COUT at LC_X35_Y13_N8
--operation mode is arithmetic

S42L1_cout_0 = E1_min[1];
S42L1 = CARRY(S42L1_cout_0);

--S42L2 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[1]~COUTCOUT1 at LC_X35_Y13_N8
--operation mode is arithmetic

S42L2_cout_1 = E1_min[1];
S42L2 = CARRY(S42L2_cout_1);


--S3L5 is clkscan:inst7|lpm_divide:div_rtl_1|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~41 at LC_X27_Y18_N4
--operation mode is normal

S3L5 = !S3L7;


--E1_sec[1] is timer:inst6|sec[1] at LC_X28_Y13_N1
--operation mode is arithmetic

E1_sec[1]_lut_out = E1_sec[1] $ (E1L77);
E1_sec[1] = DFFEAS(E1_sec[1]_lut_out, GLOBAL(B1_clkout), GLOBAL(D2_signal), , , , , E1L99, );

--E1L08 is timer:inst6|sec[1]~109 at LC_X28_Y13_N1
--operation mode is arithmetic

E1L08_cout_0 = !E1L77 # !E1_sec[1];
E1L08 = CARRY(E1L08_cout_0);

--E1L18 is timer:inst6|sec[1]~109COUT1_139 at LC_X28_Y13_N1
--operation mode is arithmetic

E1L18_cout_1 = !E1L87 # !E1_sec[1];
E1L18 = CARRY(E1L18_cout_1);


--S61L5 is clkscan:inst7|lpm_divide:mod_rtl_0|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~41 at LC_X29_Y18_N4
--operation mode is normal

S61L5 = !S61L31;


--S61_add_sub_cella[1] is clkscan:inst7|lpm_divide:mod_rtl_0|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[1] at LC_X35_Y18_N5
--operation mode is arithmetic

S61_add_sub_cella[1] = E1_sec[1];

--S61L3 is clkscan:inst7|lpm_divide:mod_rtl_0|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[1]~COUT at LC_X35_Y18_N5
--operation mode is arithmetic

S61L3_cout_0 = E1_sec[1];
S61L3 = CARRY(S61L3_cout_0);

--S61L4 is clkscan:inst7|lpm_divide:mod_rtl_0|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[1]~COUTCOUT1 at LC_X35_Y18_N5
--operation mode is arithmetic

S61L4_cout_1 = E1_sec[1];
S61L4 = CARRY(S61L4_cout_1);


--F1L3 is clkscan:inst7|Select~1299 at LC_X29_Y18_N5
--operation mode is normal

F1L3 = F1_scan_en[8] & (S61L5 & (!S61_add_sub_cella[1]) # !S61L5 & E1_sec[1]);


--S02L3 is clkscan:inst7|lpm_divide:mod_rtl_2|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~41 at LC_X30_Y17_N4
--operation mode is normal

S02L3 = !S02L11;


--E1_hour[1] is timer:inst6|hour[1] at LC_X27_Y17_N6
--operation mode is arithmetic

E1_hour[1]_lut_out = E1L01;
E1_hour[1] = DFFEAS(E1_hour[1]_lut_out, GLOBAL(E1_h_clk), GLOBAL(D2_signal), , , , , , );

--S02L1 is clkscan:inst7|lpm_divide:mod_rtl_2|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[1]~COUT at LC_X27_Y17_N6
--operation mode is arithmetic

S02L1_cout_0 = E1_hour[1];
S02L1 = CARRY(S02L1_cout_0);

--S02L2 is clkscan:inst7|lpm_divide:mod_rtl_2|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[1]~COUTCOUT1 at LC_X27_Y17_N6
--operation mode is arithmetic

S02L2_cout_1 = E1_hour[1];
S02L2 = CARRY(S02L2_cout_1);


--S7L5 is clkscan:inst7|lpm_divide:div_rtl_3|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~41 at LC_X35_Y16_N4
--operation mode is normal

S7L5 = !S7L7;


--S11L5 is clkscan:inst7|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~41 at LC_X32_Y18_N4
--operation mode is normal

S11L5 = !S11L7;


--F1L4 is clkscan:inst7|Select~1300 at LC_X32_Y18_N8
--operation mode is normal

F1L4 = F1_scan_en[4] & (S7L5 # S11L5 & !F1_scan_en[1]) # !F1_scan_en[4] & S11L5 & (!F1_scan_en[1]);


--F1L5 is clkscan:inst7|Select~1301 at LC_X31_Y18_N2
--operation mode is normal

F1L5 = F1L4 # F1_scan_en[5] & (S02L3 $ E1_hour[1]);


--F1L6 is clkscan:inst7|Select~1302 at LC_X31_Y18_N1
--operation mode is normal

F1L6 = F1L3 # F1L5 # S3L5 & F1_scan_en[7];


--S02L4 is clkscan:inst7|lpm_divide:mod_rtl_2|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~46 at LC_X30_Y17_N1
--operation mode is arithmetic

S02L4 = S02L41 $ (!M5L91 & !M5L02);

--S02L5 is clkscan:inst7|lpm_divide:mod_rtl_2|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~48 at LC_X30_Y17_N1
--operation mode is arithmetic

S02L5_cout_0 = !M5L91 & !M5L02 & !S02L41;
S02L5 = CARRY(S02L5_cout_0);

--S02L6 is clkscan:inst7|lpm_divide:mod_rtl_2|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~48COUT1 at LC_X30_Y17_N1
--operation mode is arithmetic

S02L6_cout_1 = !M5L91 & !M5L02 & !S02L51;
S02L6 = CARRY(S02L6_cout_1);


--S2L5 is clkscan:inst7|lpm_divide:div_rtl_1|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~41 at LC_X26_Y16_N9
--operation mode is normal

S2L5 = !S2L7;


--F1L7 is clkscan:inst7|Select~1304 at LC_X30_Y17_N5
--operation mode is normal

F1L7 = S02L3 & F1_scan_en[5];


--F1L8 is clkscan:inst7|Select~1305 at LC_X30_Y17_N6
--operation mode is normal

F1_scan_en[7]_qfbk = F1_scan_en[7];
F1L8 = S02L4 & (F1L7 # S2L5 & F1_scan_en[7]_qfbk) # !S02L4 & S2L5 & F1_scan_en[7]_qfbk;

--F1_scan_en[7] is clkscan:inst7|scan_en[7] at LC_X30_Y17_N6
--operation mode is normal

F1_scan_en[7] = DFFEAS(F1L8, !GLOBAL(C1_clkout), GLOBAL(D2_signal), , , F1_scan_en[5], , , VCC);


--S32L3 is clkscan:inst7|lpm_divide:mod_rtl_4|lpm_divide_ndf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~41 at LC_X31_Y14_N4
--operation mode is normal

S32L3 = !S32L8;


--E1_min[2] is timer:inst6|min[2] at LC_X35_Y13_N6
--operation mode is arithmetic

E1_min[2]_lut_out = E1L76;