cfft32br2.lst

很好得文件

TMS320C2000 COFF Assembler PC Version 3.06 Fri Nov 07 10:50:04 2003

Tools Copyright (c) 1996-2002 Texas Instruments Incorporated
cfft32br2.asm                                                        PAGE    1

       1              ;========================================================================
       2              ;
       3              ; File Name     : cfft_br2c.asm
       4              ; 
       5              ; Originator    : Advanced Embeeded Control 
       6              ;                 Texas Instruments 
       7              ; 
       8              ; Description   : This file contains source code, to bit reverse the N-point real sequence
       9              ;                 stored in alternate memory locations.
      10              ;
      11              ; Date          : 26/2/2002
      12              ;======================================================================
      13              ; 
      14              ; 
      15              ; Routine Name  : Generic Function      
      16              ; Routine Type  : C Callable
      17              ; 
      18              ; Usage :
      19              ; void FFTC_brev2(int *src, int *dst, ushort n)
      20              ; This function bit reverses the N-point real sequence stored in alternate memory locations 
      21              ; to carry out N-point complex FFT computation. If src=dst, then in-place bit reversal is performed.
      22              ; The destination array should be aligned to 2N words. 
      23              ;=====================================================================
      24              ; INPUT ARRAY
      25              ;         |Xr(0)|
      26              ;         |Xi(0)|
      27              ;         |Xr(1)|
      28              ;         |Xi(1)|
      29              ;            :
      30              ;            :
      31              ;=====================================================================
      32              
      33                              .def _CFFT32_brev2
      34               
      35 00000000       _CFFT32_brev2:  
      36                                                  ; XAR4->src, XAR5->dst, AL=size
      37 00000000 8EA4              MOVL    XAR0,XAR4       ; XAR0->src
      38 00000001 77B5              NOP     *,ARP5
      39                          
      40 00000002 561D              CMPR    0               ; TC=1, if src==dst
      41 00000003 EF12              BF      off_place,NTC   ; If not equal, jump to off place bit rev
      42              
      43              ; IN-PLACE BIT-REVERSAL
      44 00000004       in_place:
      45 00000004 80A9              MOVZ    AR7,AL          ; AR0=size
      46 00000005 DF81              SUBB    XAR7,#1         ; XAR7=size-1
      47 00000006 FF30              LSL     ACC,#1          ; ACC=2*size
      48 00000007 88A9              MOVZ    AR6,AL          ; AR0=2*size
      49                          
      50 00000008       next_data1: 
      51 00000008 87C4              MOVL    XT,*XAR4        ; XT=*src
      52 00000009 A3C5              MOVL    P,*XAR5         ; P=*dst
      53 0000000a 8EA4              MOVL    XAR0,XAR4       ; XAR0=src
      54 0000000b 5618              CMPR    2               ; check src<dst
      55 0000000c EE03              BF      noswap,TC       ; if src<dst, do not swap *src & *dst
TMS320C2000 COFF Assembler PC Version 3.06 Fri Nov 07 10:50:04 2003

Tools Copyright (c) 1996-2002 Texas Instruments Incorporated
cfft32br2.asm                                                        PAGE    2

      56                          
      57 0000000d A9C4              MOVL    *XAR4,P         ; *src=*dst
      58 0000000e ABC5              MOVL    *XAR5,XT        ; *dst=*src
      59                         
      60 0000000f       noswap:     
      61 0000000f DC04              ADDB    XAR4,#4         ; XAR4=src+2
      62 00000010 58A6              MOVZ    AR0,AR6         ; AR0=2*size
      63 00000011 77AE              NOP     *BR0++          ; dst=br(dst+2*size)
      64 00000012 000F              BANZ    next_data1,AR7-- ; ARP=AR3, AR3->src+2, AR7=AR7-1
         00000013 FFF6 
      65 00000014 0006              LRETR
      66                          
      67              ; OFF-PLACE BIT-REVERSAL            
      68 00000015       off_place:  
      69 00000015 80A9              MOVZ    AR7,AL          ; AR0=size
      70 00000016 DF81              SUBB    XAR7,#1         ; XAR7=size-1
      71 00000017 FF30              LSL     ACC,#1          ; ACC=2*size
      72 00000018 58A9              MOVZ    AR0,AL          ; AR0=2*size
      73                          
      74 00000019 0684  next_data2: MOVL    ACC,*XAR4++     ; XAR4=src+1, ACCL=*src
      75 0000001a DC02              ADDB    XAR4,#2         ; XAR4=src+2
      76 0000001b 77B5              NOP     *,ARP5          ; ARP=XAR5
      77 0000001c 1EAE              MOVL    *BR0++,ACC      ; XAR5=br(dst+size)
      78 0000001d 000F              BANZ    next_data2,AR7--                 
         0000001e FFFC 
      79 0000001f 0006              LRETR
      80              

No Assembly Errors, No Assembly Warnings