cic1s2_map.nlf

来自「单级CIC2倍内插滤波器」· NLF 代码 · 共 28 行

NLF

28 行

Release 9.2.04i - netgen J.40Copyright (c) 1995-2007 Xilinx, Inc.  All rights reserved.Command Line: netgen -intstyle ise -s 5 -pcf cic1s2.pcf -sdf_anno true
-sdf_path netgen/map -insert_glbl true -w -dir netgen/map -ofmt verilog -sim
cic1s2_map.ncd cic1s2_map.v  Read and Annotate design 'cic1s2_map.ncd' ...Loading device for application Rf_Device from file 'v100.nph' in environment
D:\Xilinx92i.   "cic1s2" is an NCD, version 3.1, device xcv100, package bg256, speed -5Loading constraints from 'cic1s2.pcf'...The speed grade (-5) differs from the speed grade specified in the .ncd file
(-5).The number of routable networks is 9Flattening design ...Processing design ...   Preping design's networks ...  Preping design's macros ...Writing Verilog SDF file 'netgen\map\cic1s2_map.sdf' ...Writing Verilog netlist file 'D:\zym\cic1s2\netgen\map\cic1s2_map.v' ...INFO:NetListWriters:633 - The generated Verilog netlist contains Xilinx SIMPRIM
   simulation primitives and has to be used with SIMPRIM simulation library for
   correct compilation and simulation. Number of warnings: 0Number of info messages: 1Total memory usage is 74296 kilobytes

cic1s2_map.nlf - 源码说明

本页面展示了「单级CIC2倍内插滤波器」中的 cic1s2_map.nlf 源码文件，采用 NLF 编程语言编写，共 28 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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