📄 syslib.c
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}#if defined(CPU_720T) || defined(CPU_720T_T) || \ defined(CPU_740T) || defined(CPU_740T_T) || \ defined(CPU_920T) || defined(CPU_920T_T) || \ defined(CPU_940T) || defined(CPU_940T_T) || \ defined(CPU_946ES) || defined(CPU_946ES_T)/********************************************************************************* sysHwInit0 - perform early BSP-specific initialisation** This routine performs such BSP-specific initialisation as is necessary before* the architecture-independent cacheLibInit can be called. It is called* from usrInit() before cacheLibInit(), before sysHwInit() and before BSS* has been cleared.** RETURNS: N/A*/void sysHwInit0 (void){ cacheArm920tLibInstall (NULL, NULL); /* Install the appropriate MMU library and translation routines */ mmuArm920tLibInstall (NULL, NULL); return;}#endif /* defined(720T/740T/920T/940T/946ES) *//********************************************************************************* sysHwInit - initialize the CPU board hardware** This routine initializes various features of the hardware.* Normally, it is called from usrInit() in usrConfig.c.** NOTE: This routine should not be called directly by the user.** RETURNS: N/A*/void sysHwInit (void){ /* install the IRQ/SVC interrupt stack splitting routine */ s3cExcVecSet(); _func_armIntStackSplit = sysIntStackSplit; /* initialise the serial devices */ sysSerialHwInit (); /* initialise serial data structure */}void s3cExcVecSet(void){ int i; i = (int)&excEnterUndef; *((volatile int*)(S3C_EXC_BASE + 0x0)) = i; i = (int)&excEnterSwi; *((volatile int*)(S3C_EXC_BASE + 0x4)) = i; i = (int)&excEnterPrefetchAbort; *((volatile int*)(S3C_EXC_BASE + 0x8)) = i; i = (int)&excEnterDataAbort; *((volatile int*)(S3C_EXC_BASE + 0xc)) = i; i = (int)&intEnt; *((volatile int*)(S3C_EXC_BASE + 0x14)) = i;}/********************************************************************************* sysHwInit2 - additional system configuration and initialization** This routine connects system interrupts and does any additional* configuration necessary. Note that this is called from* sysClkConnect() in the timer driver.** RETURNS: N/A**/void sysHwInit2 (void){ static BOOL initialised = FALSE; if (initialised) return; /* initialise the interrupt library and interrupt driver */ intLibInit (AMBA_INT_NUM_LEVELS, AMBA_INT_NUM_LEVELS, INT_MODE); s3c2410IntDevInit(); /* connect sys clock interrupt and auxiliary clock interrupt */ (void)intConnect (INUM_TO_IVEC (SYS_TIMER_INT_VEC), sysClkInt, 0); (void)intConnect (INUM_TO_IVEC (AUX_TIMER_INT_VEC), sysAuxClkInt, 0); /* connect serial interrupt */ sysSerialHwInit2(); initialised = TRUE;}/********************************************************************************* sysPhysMemTop - get the address of the top of physical memory** This routine returns the address of the first missing byte of memory,* which indicates the top of memory.** Normally, the user specifies the amount of physical memory with the* macro LOCAL_MEM_SIZE in config.h. BSPs that support run-time* memory sizing do so only if the macro LOCAL_MEM_AUTOSIZE is defined.* If not defined, then LOCAL_MEM_SIZE is assumed to be, and must be, the* true size of physical memory.** NOTE: Do no adjust LOCAL_MEM_SIZE to reserve memory for application* use. See sysMemTop() for more information on reserving memory.** RETURNS: The address of the top of physical memory.** SEE ALSO: sysMemTop()*/char * sysPhysMemTop (void){ static char * physTop = NULL; if (physTop == NULL) { /* Don't do autosizing, if size is given */ physTop = (char *)(LOCAL_MEM_LOCAL_ADRS + LOCAL_MEM_SIZE); } return physTop;}/********************************************************************************* sysMemTop - get the address of the top of VxWorks memory** This routine returns a pointer to the first byte of memory not* controlled or used by VxWorks.** The user can reserve memory space by defining the macro USER_RESERVED_MEM* in config.h. This routine returns the address of the reserved memory* area. The value of USER_RESERVED_MEM is in bytes.** RETURNS: The address of the top of VxWorks memory.*/char * sysMemTop(void){ static char * memTop = NULL; if (memTop == NULL) { memTop = sysPhysMemTop() - USER_RESERVED_MEM; } return memTop;}/********************************************************************************* sysToMonitor - transfer control to the ROM monitor** This routine transfers control to the ROM monitor. It is usually called* only by reboot() -- which services ^X -- and bus errors at interrupt* level. However, in some circumstances, the user may wish to introduce a* new <startType> to enable special boot ROM facilities.** RETURNS: Does not return.*/STATUS sysToMonitor(int startType /* passed to ROM to tell it how to boot */){ FUNCPTR pRom; UINT32 * p = (UINT32 *)(ROM_TEXT_ADRS+0x20);/*#ifdef INCLUDE_SERIAL*/ sysSerialReset (); /* put serial devices into quiet state *//*#endif*/ /* * Examine ROM - if it's a VxWorks boot ROM, jump to the warm boot entry * point; otherwise jump to the start of the ROM. * A VxWorks boot ROM begins * MOV R0,#BOOT_COLD * B ... * DCB "Copyright" * We check the first and third words only. This could be tightened up * if required (see romInit.s). */ if (p[0] == 0xE3A00002 && p[2] == 0x79706F43) pRom = (FUNCPTR)(ROM_TEXT_ADRS + 0x24); /* warm boot address */ else pRom = (FUNCPTR)(ROM_TEXT_ADRS + 0x20); /* start of ROM */#if defined(CPU_720T) || defined(CPU_720T_T) || \ defined(CPU_740T) || defined(CPU_740T_T) || \ defined(CPU_920T) || defined(CPU_920T_T) || \ defined(CPU_940T) || defined(CPU_940T_T) || \ defined(CPU_946ES) || defined(CPU_946ES_T) VM_ENABLE(FALSE); /* disable the MMU, cache(s) and write-buffer */#endif#if defined(CPU_920T) || defined(CPU_920T_T) /* * On 920T, can have the I-cache enabled once the MMU has been * disabled, so, unlike the other processors, disabling the MMU does * not disable the I-cache. This would not be a problem, as the * 920T boot ROM initialisation code disables and flushes both caches. * However, in case we are, in fact, using a 7TDMI boot ROM, * disable and flush the I-cache here, or else the boot process may * fail. */ cacheDisable (INSTRUCTION_CACHE);#endif /* defined(CPU_920T/920T_T) */ (*pRom)(startType); /* jump to boot ROM */ return OK; /* in case we ever continue from ROM monitor */}/****************************************************************************** sysProcNumGet - get the processor number** This routine returns the processor number for the CPU board, which is* set with sysProcNumSet().** RETURNS: The processor number for the CPU board.** SEE ALSO: sysProcNumSet()*/int sysProcNumGet (void){ return 0;}/****************************************************************************** sysProcNumSet - set the processor number** Set the processor number for the CPU board. Processor numbers should be* unique on a single backplane.** NOTE* By convention, only processor 0 should dual-port its memory.** RETURNS: N/A** SEE ALSO: sysProcNumGet()*/void sysProcNumSet(int procNum /* processor number */){ sysProcNum = procNum;}/******************************************************************************** sysLedsReadWrite - read/write the state of the LEDs on the board** This routine can be used to read and write the state of the four LEDs* on the board. The current state is ANDed and EORed with the supplied* parameters. Bits 0..3 control LEDs 0..3. A 1 switches the LED on; a 0 off.** RETURNS: previous state of LEDs.*/int sysLedsReadWrite ( int and, int eor ) { UINT32 previous=0; return previous; }#ifdef INCLUDE_FLASH/******************************************************************************** sysFlashWriteEnable - enable write access to the Flash memory** This routine is used by flashMem.c to enable write access to the* Flash memory.** RETURNS: N/A*/void sysFlashWriteEnable (void) { }/******************************************************************************** sysFlashWriteDisable - disable write access to the Flash memory** This routine is used by flashMem.c to disable write access to the* Flash memory.** RETURNS: N/A*/void sysFlashWriteDisable (void) { }#endif /* INCLUDE_FLASH */
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