syslib.c

ROM型的vxworksBSP包 编译测试通过

/* sysLib.c - ARM Integrator system-dependent routines */

/* Copyright 1999-2001 ARM Limited */
/* Copyright 1999-2001 Wind River Systems, Inc. */
#include "copyright_wrs.h"


/* includes */

#include "vxWorks.h"
#include "config.h"

#include "sysLib.h"
#include "string.h"
#include "intLib.h"
#include "taskLib.h"
#include "vxLib.h"
#include "muxLib.h"
#include "cacheLib.h"

#include "arch/arm/mmuArmLib.h"
#include "private/vmLibP.h"
#include "dllLib.h"

/* imports */

IMPORT char end [];			    /* end of system, created by ld */
IMPORT VOIDFUNCPTR _func_armIntStackSplit;  /* ptr to fn to split stack */
IMPORT void   s3c2410IntDevInit (void);


PHYS_MEM_DESC sysPhysMemDesc [] =
    {
    	{
    		(void *)0x40000000,
    		(void *)0x40000000,
    		0x100000,
    		VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    		VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE
    	},
    	{
    		(void *)0x08000000,
    		(void *)0x08000000,
    		0x2000000,
    		VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    		VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT
    	},
    	{
    		(void *)0x10000000,
    		(void *)0x10000000,
    		0x2000000,
    		VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    		VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT
    	},
    	{
    		(void *)0x18000000,
    		(void *)0x18000000,
    		0x2000000,
    		VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    		VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT
    	},
    	{
    		(void *)0x20000000,
    		(void *)0x20000000,
    		0x2000000,
    		VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    		VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT
    	},
    	{
    		(void *)0x28000000,
    		(void *)0x28000000,
    		0x2000000,
    		VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    		VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT
    	},
    	{
    		(void *)0x30000000,
    		(void *)0x30000000,
    		LOCAL_MEM_SIZE,
    		VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    		VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE
    	},
    	{
    		(void *)0x48000000,
    		(void *)0x48000000,
    		0x100000,
    		VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    		VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT
    	},
    	{
    		(void *)0x49000000,
    		(void *)0x49000000,
    		0x100000,
    		VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    		VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT
    	},
    	{
    		(void *)0x4A000000,
    		(void *)0x4A000000,
    		0x100000,
    		VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    		VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT
    	},
    	{
    		(void *)0x4B000000,
    		(void *)0x4B000000,
    		0x100000,
    		VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    		VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT
    	},
    	{
    		(void *)0x4C000000,
    		(void *)0x4C000000,
    		0x100000,
    		VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    		VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT
    	},
    	{
    		(void *)0x4D000000,
    		(void *)0x4D000000,
    		0x100000,
    		VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    		VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT
    	},
    	{
    		(void *)0x4E000000,
    		(void *)0x4E000000,
    		0x100000,
    		VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    		VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT
    	},
    	{
    		(void *)0x4F000000,
    		(void *)0x4F000000,
    		0x100000,
    		VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    		VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT
    	},
    	{
    		(void *)0x50000000,
    		(void *)0x50000000,
    		0x100000,
    		VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    		VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT
    	},
    	{
    		(void *)0x51000000,
    		(void *)0x51000000,
    		0x100000,
    		VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    		VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT
    	},
    	{
    		(void *)0x52000000,
    		(void *)0x52000000,
    		0x100000,
    		VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    		VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT
    	},
    	{
    		(void *)0x53000000,
    		(void *)0x53000000,
    		0x100000,
    		VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    		VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT
    	},
    	{
    		(void *)0x54000000,
    		(void *)0x54000000,
    		0x100000,
    		VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    		VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT
    	},
    	{
    		(void *)0x55000000,
    		(void *)0x55000000,
    		0x100000,
    		VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    		VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT
    	},
    	{
    		(void *)0x56000000,
    		(void *)0x56000000,
    		0x100000,
    		VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    		VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT
    	},
    	{
    		(void *)0x57000000,
    		(void *)0x57000000,
    		0x100000,
    		VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    		VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT
    	},
    	{
    		(void *)0x58000000,
    		(void *)0x58000000,
    		0x100000,
    		VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    		VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT
    	},
    	{
    		(void *)0x59000000,
    		(void *)0x59000000,
    		0x100000,
    		VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    		VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT
    	},
    	{
    		(void *)0x5A000000,
    		(void *)0x5A000000,
    		0x100000,
    		VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    		VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT
    	},
    	{
    		(void *)0x00000000,
    		(void *)0x00000000,
    		0x01000000,
    		VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    		VM_STATE_VALID	| VM_STATE_WRITABLE_NOT	 | VM_STATE_CACHEABLE_NOT
    	}
};
    	
    		
int sysPhysMemDescNumEnt = NELEMENTS (sysPhysMemDesc);


#if !defined(INCLUDE_MMU) && \
    (defined(INCLUDE_CACHE_SUPPORT) || defined(INCLUDE_MMU_BASIC) || \
     defined(INCLUDE_MMU_FULL) || defined(INCLUDE_MMU_MPU))
#define INCLUDE_MMU
#endif



/* globals */


int	sysCpu	    = CPU;		/* system CPU type (e.g. ARMARCH4/4_T)*/
char *	sysBootLine = BOOT_LINE_ADRS; 	/* address of boot line */
char *	sysExcMsg   = EXC_MSG_ADRS;	/* catastrophic message area */
int	sysProcNum;			/* processor number of this CPU */
int	sysFlags;			/* boot flags */
char	sysBootHost [BOOT_FIELD_LEN];	/* name of host from which we booted */
char	sysBootFile [BOOT_FIELD_LEN];	/* name of file from which we booted */



/* externals */

/*IMPORT int  ambaIntDevInit (void);*/
IMPORT void sysIntStackSplit (char *, long);


/* globals */


/* forward LOCAL functions declarations */


/* forward declarations */

char *	sysPhysMemTop (void);

/* included source files */

#ifdef INCLUDE_FLASH
#include "mem/nvRamToFlash.c"
#include "mem/flashMem.c"
#else
#include "mem/nullNvRam.c"
#endif

#include "vme/nullVme.c"
#include "sysSerial.c"

#include "s3c2410Timer.c"

#include "primeCellSio.c"
#include "s3c2410IntCtrl.c"


#ifdef INCLUDE_WINDML
#include "ambaKbd.c"
#include "ambaMse.c"
#include "sysWindML.c"
#endif /* INCLUDE_WINDML */


#ifdef INCLUDE_END
#include "csEnd.c"
#endif /* INCLUDE_END */

void s3cExcVecSet(void);
IMPORT VOIDFUNCPTR excEnterUndef;
IMPORT VOIDFUNCPTR excEnterPrefetchAbort;
IMPORT VOIDFUNCPTR excEnterDataAbort;
IMPORT VOIDFUNCPTR excEnterSwi;
IMPORT VOIDFUNCPTR intEnt;

/*******************************************************************************
*
* sysModel - return the model name of the CPU board
*
* This routine returns the model name of the CPU board.
*
* NOTE
* This routine does not include all of the possible variants, and the
* inclusion of a variant in here does not mean that it is supported.
*
* RETURNS: A pointer to a string identifying the board and CPU.
*/

char *sysModel (void)
{
     return "S3C2410X";
}

/*******************************************************************************
*
* sysBspRev - return the BSP version with the revision eg 1.2/<x>
*
* This function returns a pointer to a BSP version with the revision.
* e.g. 1.2/<x>. BSP_REV is concatenated to BSP_VERSION to form the
* BSP identification string.
*
* RETURNS: A pointer to the BSP version/revision string.
*/

char * sysBspRev (void)
{
    return (BSP_VERSION BSP_REV);