📄 primecellsio.h
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/* ambaSio.h - ARM AMBA UART header file *//* Copyright 1997 Wind River Systems, Inc. *//*modification history--------------------01b,21feb00,jpd renamed primecell... symbols to primeCell...01a,10nov99,ajb Modified from ambaSio.h, version 01b. Added support for enabling interrupts in UART_CR.*/#ifndef __INCprimeCellSioh #define __INCprimeCellSioh #ifdef __cplusplusextern "C" {#endif/* Register description OF ARM AMBA UART */#ifndef _ASMLANGUAGE#include "s3c2410.h"#define CC_NONE (0X0<<3)#define CC_EVEN (0X5<<3)#define CC_ODD (0X4<<3)#define CC_PARITY_ONE (0X6<<3)#define CC_PARITY_ZERO (0X7<<3)#define CC_STOP_1BIT (0X0<<2)#define CC_STOP_2BIT (0X1<<2)#define CC_DATA_5BIT (0x0)#define CC_DATA_6BIT (0x1)#define CC_DATA_7BIT (0x2)#define CC_DATA_8BIT (0x3)#define COMM_CTRL (0X0000|CC_NONE|CC_STOP_1BIT|CC_DATA_8BIT)#define RxTIMEOUT_ENABLE (0X1)#define RxTIMEOUT_DISENABLE (0X0)#define FIFO_ENABLE (0X1)#define FIFO_DISENABLE (0X0)#define FIFO_TX_LEVEL (0X0) #define FIFO_RX_LEVEL (0X10) /* fields of UFSTAT0 */#define UFS_TXFIFO_FULL (1<<9)#define UFS_RXFIFO_FULL (1<<8)#define UFS_RXFIFO_NRDATA 0x0f#define UFS_TXFIFO_NRDATA 0xf0/* hardware operation macros */#define UART0_TXFIFO_FULL() (rUFSTAT0 & UFS_TXFIFO_FULL )#define UART1_TXFIFO_FULL() (rUFSTAT1 & UFS_TXFIFO_FULL )#define UART2_TXFIFO_FULL() (rUFSTAT2 & UFS_TXFIFO_FULL )#define UST_RXFIFO_DATA (1<<0)#define UART0_RXFIFO_EMPTY() ( ! (rUTRSTAT0 & UST_RXFIFO_DATA ) )#define UART1_RXFIFO_EMPTY() ( ! (rUTRSTAT1 & UST_RXFIFO_DATA ) )#define UART2_RXFIFO_EMPTY() ( ! (rUTRSTAT2 & UST_RXFIFO_DATA ) )#define UART0_RXDATA_ERROR() ( (void *)rUERSTAT0 & 0xf )#define UART1_RXDATA_ERROR() ( (void *)rUERSTAT1 & 0xf )#define UART2_RXDATA_ERROR() ( (void *)rUERSTAT2 & 0xf )#define UART0_SEND_DATA(c) ( (void *)rUTXH0=(unsigned char)(c) )#define UART1_SEND_DATA(c) ( (void *)rUTXH1=(unsigned char)(c) )#define UART2_SEND_DATA(c) ( (void *)rUTXH2=(unsigned char)(c) )#define TX_INTTYPE 1 /*0:Tx interrupt type is pulse, 1:Tx interrupt type is level*/#define RX_INTTYPE 0 /*0:Rx interrupt type is pulse, 1:Rx interrupt type is level*//* offests address */#define OFFULCON0 (0x00) /*UART 0 Line control*/#define OFFUCON0 (0x04) /*UART 0 Control*/#define OFFUFCON0 (0x08) /*UART 0 FIFO control*/#define OFFUMCON0 (0x0c) /*UART 0 Modem control*/#define OFFUTRSTAT0 (0x10) /*UART 0 Tx/Rx status*/#define OFFUERSTAT0 (0x14) /*UART 0 Rx error status*/#define OFFUFSTAT0 (0x18) /*UART 0 FIFO status*/#define OFFUMSTAT0 (0x1c) /*UART 0 Modem status*/#define OFFUTXH0 (0X20) /*UART 0 Transmission Hold*/#define OFFURXH0 (0x24) /*UART 0 Receive buffer*/#define OFFUBRDIV0 (0x28) /*UART 0 Baud ate divisor*/typedef struct AMBA_CHAN { /* must be first */ SIO_CHAN sio; /* standard SIO_CHAN element */ /* callbacks */ STATUS (*getTxChar) (); /* installed Tx callback routine */ STATUS (*putRcvChar) (); /* installed Rx callback routine */ void * getTxArg; /* argument to Tx callback routine */ void * putRcvArg; /* argument to Rx callback routine */ UINT32 * regs; /* AMBA registers */ UINT8 levelRx; /* Rx Interrupt level for this device */ UINT8 levelTx; /* Tx Interrupt level for this device */ UINT32 channelMode; /* such as INT, POLL modes */ int baudRate; /* the current baud rate */ } AMBA_CHAN;/* function declarations */extern void primeCellSioInt (AMBA_CHAN *pChan);extern void primeCellSioIntTx (AMBA_CHAN *pChan);extern void primeCellSioIntRx (AMBA_CHAN *pChan);extern void primeCellSioDevInit (AMBA_CHAN *pChan);#endif /* _ASMLANGUAGE */#ifdef __cplusplus}#endif #endif /* __INCprimeCellSioh */
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