fmd.cpp

这是一个有关于windows ce 嵌入式的移动闪存驱动程序

/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF
ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A
PARTICULAR PURPOSE.
Copyright (c) 2002  Microsoft Corporation

Module Name:	FMD.CPP

Abstract:		FLASH Media Driver Interface Samsung K9F2808UOB NAND Flash Chip
                on AT-Rise development board.

Notes:			Currently, *only* the CE 3.0 (and earlier) power management logic
				is implemented (i.e. the PowerUp() and PowerDown() APIs).

Environment:	As noted, this media driver works on behalf of the FAL to directly
				access the underlying FLASH hardware.  Consquently, this module
				needs to be linked with FAL.LIB to produce the device driver
				named FLASHDRV.DLL.

-----------------------------------------------------------------------------*/
#include <fmd.h>


#ifdef CEDAR_ONLY
#include "utldrv.h"
#include <nkintr.h>
#include "oalintr.h"

#endif // CEDAR_ONLY
#ifdef NOBINFS
#include "utldrv.h"			// Still needed for driver->driver fast method calling in 4.x
#endif

#include <s2410.h>
#include "cfnand.h"
#include "loader.h"

#ifdef NOBINFS
//#ifdef CEDAR_ONLY			// Still needed in 4.x
//  Globals
HANDLE          g_hUTLObject = NULL;
UTL_FASTCALL    g_tblFastCall;
//#endif // CEDAR_ONLY
#endif 

// Globals needed for updatexip
HANDLE g_hMutex = NULL;

// BUGBUG: For now, we always will take the mutex
BOOL g_bTakeMutex = TRUE;

void GRABMUTEX();
void RELEASEMUTEX();

#ifdef NOSYSCALL
#ifndef BOOT_LOADER
// function prototypes for kernel functions
extern "C"
{
HANDLE SC_CreateMutex(LPSECURITY_ATTRIBUTES lpsa, BOOL bInitialOwner, LPCTSTR lpName);
DWORD SC_WaitForMultiple(DWORD cObjects, CONST HANDLE *lphObjects, BOOL fWaitAll, DWORD dwTimeout);
BOOL SC_ReleaseMutex(HANDLE hMutex);
BOOL SC_CloseHandle(HANDLE hObj);
}
#endif
#endif

//  Use Macros here to avoid extra over head for c function calls
#define READ_REGISTER_USHORT(p) (*(volatile PUSHORT) (p))
#define WRITE_REGISTER_USHORT(p, v) (*(volatile PUSHORT)(p)) = (v)
#define READ_REGISTER_ULONG(p)  (*(volatile PULONG) (p))

//  Registers
volatile PUSHORT pNFReg;
volatile PUSHORT pNFCONF;
volatile PUSHORT pNFCMD;
volatile PUSHORT pNFADDR;
volatile PUSHORT pNFDATA;
volatile PUSHORT pNFSTAT;
volatile PULONG  pNFECC;
volatile CLKPWRreg *v_s2410CLKPWR;

//  Status bit pattern
#define STATUS_READY                0x40
#define STATUS_ERROR                0x01

//  MACROS
#define NF_CE_L()       WRITE_REGISTER_USHORT(pNFCONF, (USHORT) (READ_REGISTER_USHORT(pNFCONF) & ~(1<<11)))
#define NF_CE_H()       WRITE_REGISTER_USHORT(pNFCONF, (USHORT) (READ_REGISTER_USHORT(pNFCONF) | (1<<11)))
#define NF_CMD(cmd)     WRITE_REGISTER_USHORT(pNFCMD, (USHORT) (cmd))
#define NF_ADDR(addr)   WRITE_REGISTER_USHORT(pNFADDR, (USHORT) (addr))
#define NF_DATA_R()     READ_REGISTER_USHORT(pNFDATA)
#define NF_DATA_W(val)  WRITE_REGISTER_USHORT(pNFDATA, (USHORT) (val))
#define NF_STAT()       READ_REGISTER_USHORT(pNFSTAT)
#define NF_RSTECC()		WRITE_REGISTER_USHORT(pNFCONF, (USHORT) (READ_REGISTER_USHORT(pNFCONF) | (1<<12)))
#define NF_WAITRB()     {while(!(NF_STAT() & 0x01)) ;}
#define NF_ECC()        READ_REGISTER_ULONG(pNFECC)

//  External function
extern "C" {
BOOL ECC_CorrectData(LPBYTE pData, LPBYTE pExistingECC, LPBYTE pNewECC);
}

//  Flags and pointers
#define BADBLOCKMARK                0x00
//  VALIDADDR is 5 << 8
//
//  Explain:    5 means the 6th byte in spare area (517 byte in the sector)
//              Shift 8 bit to the left to form the correct address for 16bit port
//
#define VALIDADDR   0x05

#define OEMADDR		0x04					// 5th byte in spare area

#ifdef CEDAR_ONLY
void PowerOnCallback()
{
    DEBUGMSG(1, (TEXT("FlashDrv::FMD:: Come back form Power Off!\n")));
}
#endif // CEDAR_ONLY

//  Reset the chip
//
void NF_Reset()
{
    GRABMUTEX();
    NF_CE_L();

    NF_CMD(CMD_RESET);
    NF_WAITRB();

    NF_CE_H();
    RELEASEMUTEX();
}

/*
 Here is the statement from SamSung's K9F2808U0B datasheet:

 All device locations are erased (FFh) except location where the invalid block(s)
 information is written prior to shipping. The invalid block(s) status is defined
 by the 6th byte in the spare area. Samsung makes sure that either the 1st or 2nd
 page of every invalid block has non-FFh data at the column address of 517. Since
 the invalid block information is also erasable in most cases, it is impossible to
 recover the information once it has been erased.

 Here is the logic we are taking:

 If the block is invalid, non-FFh value in column address of 517, we don't use that
 block anyway. Otherwise, the whole spare area is subject to use by our program. If
 we found additional bad block later on, we don't necessary have to use column 517
 to represent invalid block. We could use any of the 16 byte spare area.

 But for simplicity, in our current implementation, we avoid to touch column 517. So
 the we allocate SectorInfo as following:

  - - - - - - - - - - - - - - - -
 |R|R|R|R|O|V|R|R|E|E|E|E|E|E|E|E|
  - - - - - - - - - - - - - - - -

 Where  Rs are reserved bytes used by the FAL
        O is a byte for use by the OEM
        V is a byte indicating if the block is valid (a.k.a. bad)
        Es are bytes used for ECC

 */

/*
 *  NAND_ReadSectorInfo
 *
 *  Read SectorInfo out of the spare area. The current implementation only handles
 *  one sector at a time.
 */
void NAND_ReadSectorInfo(SECTOR_ADDR sectorAddr, PSectorInfo pInfo)
{
    GRABMUTEX();
    
    //  Chip enable
    NF_CE_L();

    //  Write the command
    NF_CMD(CMD_READ2);

    //  Write the address
    NF_ADDR(0x00);
    NF_ADDR(sectorAddr & 0xff);
    NF_ADDR((sectorAddr >> 8) & 0xff);

    if (NEED_EXT_ADDR) {
        NF_ADDR((sectorAddr >> 16) & 0xff);
    }

    //  Wait for the Ready bit
    NF_WAITRB();

    //  Read the SectorInfo data (we only need to read first 8 bytes)
    pInfo->dwReserved1  = (DWORD) ((BYTE) NF_DATA_R()) << 24;
    pInfo->dwReserved1 |= (DWORD) ((BYTE) NF_DATA_R()) << 16;
    pInfo->dwReserved1 |= (DWORD) ((BYTE) NF_DATA_R()) << 8;
    pInfo->dwReserved1 |= (DWORD) ((BYTE) NF_DATA_R());

    //  OEM byte
    pInfo->bOEMReserved = (BYTE) NF_DATA_R();

    //  Read the bad block mark
    pInfo->bBadBlock = (BYTE) NF_DATA_R();

    //  Second reserved field (WORD)
    pInfo->wReserved2 = ((BYTE) NF_DATA_R() << 8);
    pInfo->wReserved2 |= ((BYTE) NF_DATA_R());

    NF_CE_H();

    RELEASEMUTEX();
}

/*
 *  NAND_WriteSectorInfo
 *
 *  Write SectorInfo out to the spare area. The current implementation only handles
 *  one sector at a time.
 */
BOOL NAND_WriteSectorInfo(SECTOR_ADDR sectorAddr, PSectorInfo pInfo)
{
    BOOL    bRet = TRUE;

    GRABMUTEX();

    //  Chip enable
    NF_CE_L();

    //  Write the command
    //  First, let's point to the spare area
    NF_CMD(CMD_READ2);
    NF_CMD(CMD_WRITE);

    //  Write the address
    NF_ADDR(0x00);
    NF_ADDR(sectorAddr & 0xff);
    NF_ADDR((sectorAddr >> 8) & 0xff);

    if (NEED_EXT_ADDR) {
        NF_ADDR((sectorAddr >> 16) & 0xff);
    }

    //  Now let's write the SectorInfo data
    //
    //  Write the first reserved field (DWORD)
    NF_DATA_W( (pInfo->dwReserved1 >> 24) & 0xff );
    NF_DATA_W( (pInfo->dwReserved1 >> 16) & 0xff );
    NF_DATA_W( (pInfo->dwReserved1 >> 8 ) & 0xff );
    NF_DATA_W( (pInfo->dwReserved1) & 0xff );

    //  Write OEM reserved flag
    NF_DATA_W( (pInfo->bOEMReserved) );

    //  Write the bad block flag
    NF_DATA_W( (pInfo->bBadBlock) );

    //  Write the second reserved field
    NF_DATA_W( (pInfo->wReserved2 >> 8) & 0xff );
    NF_DATA_W( (pInfo->wReserved2) );

    //  Issue the write complete command
    NF_CMD(CMD_WRITE2);

    //  Check ready bit
    NF_WAITRB();

    //  Check the status of program
    NF_CMD(CMD_STATUS);

    if(NF_DATA_R() & STATUS_ERROR) {
        RETAILMSG(1, (TEXT("NAND_WriteSectorInfo() ######## Error Programming page %d!\n"), sectorAddr));
        bRet = FALSE;
    }

    NF_CE_H();

    RELEASEMUTEX();
    return bRet;
}

/*-----------------------------------------------------------------------------
 *  FMD Interface functions
 *
 *----------------------------------------------------------------------------*/
//  FMD_Init
//
//  Initialize the flash chip
//
//  Note: Presently, the Flash size characteristics are hardcoded in CFNAND.H
//		  and are NOT stored in the registry.  Refer to the StratFlash FMD in
//		  %WINCEROOT%\PUBLIC\COMMON\OAK\DRIVERS\BLOCK\... for an example of how
//		  to use the registry for storing this information.
//
PVOID FMD_Init(LPCTSTR lpActiveReg, PPCI_REG_INFO pRegIn, PPCI_REG_INFO pRegOut)
{
	RETAILMSG(1, (TEXT("FMD::FMD_Init\r\n")));
    //  0. Create the Mutex for shared access between the kernel and MSFLASH
#ifndef BOOT_LOADER
    if (g_hMutex == NULL)
    {
#ifdef NOSYSCALL
#ifndef BOOT_LOADER
        g_hMutex = SC_CreateMutex(NULL, FALSE, TEXT("_FLASH_MUTEX_"));
#endif
#else
        g_hMutex = CreateMutex(NULL, FALSE, TEXT("_FLASH_MUTEX_"));
#endif
        // was mutex creation successful?
        if (g_hMutex == NULL) 
        {
            RETAILMSG(1,(TEXT("FlashDrv!FMD!FMD_Init: Unable to create mutex\r\n")));
            goto ErrExit;
        }
    }
#endif
    
#ifndef NOSYSCALL
#ifdef NOBINFS
    DWORD dwBytes;

    //  Initialize the FASTCALL structure to 0
    memset(&g_tblFastCall, 0, sizeof(UTL_FASTCALL));

    //  1. CreateFile to get the access to UTLDRV.
    //
    g_hUTLObject = CreateFile(TEXT("UTL0:"), GENERIC_READ|GENERIC_WRITE,
                                FILE_SHARE_READ|FILE_SHARE_WRITE,
                                NULL, OPEN_EXISTING, 0, 0);

    if(INVALID_HANDLE_VALUE == g_hUTLObject) {
        RETAILMSG(1, (TEXT("Failed CreateFile -- error = 0x%x\n"), GetLastError()));
        goto ErrExit;
    }

    //  2. Call IOCTL to get the FAST CALL function pointer.
    //
    if(!DeviceIoControl(g_hUTLObject,
                        IOCTL_UTL_GET_FASTCALL,
                        NULL, 0,
                        &g_tblFastCall, sizeof(g_tblFastCall),
                        &dwBytes, NULL)) {
        RETAILMSG(1, (TEXT("Failed DeviceIoControl -- error = 0x%x\n"), GetLastError()));
        goto ErrExit;
    }

    //  3. Call the fast call to get the PVA for the registers
    //
    //  3.1 Get the register for NAND controller
    if (ERROR_SUCCESS != g_tblFastCall.GetRegisterVA(g_tblFastCall.pContext, NFC_BASE,
                                     32, FALSE, (DWORD *)&pNFReg) ) {
        RETAILMSG(1, (TEXT("FlashDrv!FMD!FMD_Init: Failed GetRegisterVA(NFC_BASE) call!\n")));
        goto ErrExit;
    }

    //  3.2 Get the register for the CLKPWR register
    if (ERROR_SUCCESS != g_tblFastCall.GetRegisterVA(g_tblFastCall.pContext, CLKPWR_BASE,
                                     32, FALSE, (DWORD *)&v_s2410CLKPWR) ) {
        RETAILMSG(1, (TEXT("FlashDrv!FMD!FMD_Init: Failed GetRegisterVA(CLKPWR_BASE) call!\n")));
        goto ErrExit;
    }
#ifdef CEDAR_ONLY
    // ++ CE 3.0 Specific Code. Not needed for 4.x +

    //  4. Register the Block driver to the Power On Monitor
    //
    if (ERROR_SUCCESS != g_tblFastCall.RegisterBlockDrv(g_tblFastCall.pContext,
                                                        PowerOnCallback)) {
        RETAILMSG(1, (TEXT("Failed RegisterStorageDrv -- error = 0x%x\n"), GetLastError()));
        goto ErrExit;
    }

    // -- CE 3.0 Specific Code. Not needed for 4.x +
#endif // CEDAR_ONLY
#else
    pNFReg = (PUSHORT) VirtualAlloc(0, 0x1000, MEM_RESERVE, PAGE_NOACCESS);

    if(!pNFReg) {
        RETAILMSG(1, (TEXT("FlashDrv!FMD!FMD_Init: Failed VirtualAlloc ... Bailing out!\n")));
        goto ErrExit;
    }

    if(!VirtualCopy(pNFReg, (LPVOID) NFC_BASE, 0x1000, 
                    PAGE_READWRITE|PAGE_NOCACHE)) {
        RETAILMSG(1, (TEXT("FlashDrv!FMD!FMD_Init: Failed VirtualCopy for MemCtrl!\n")));
        goto ErrExit;
    }

    //  Allocate for the clock control register

    //  Clock control register
    v_s2410CLKPWR = (CLKPWRreg *)VirtualAlloc(NULL, 0x1000, MEM_RESERVE, PAGE_NOACCESS);
    ASSERT(v_s2410CLKPWR);

    if (!VirtualCopy((LPVOID) v_s2410CLKPWR, (LPVOID) CLKPWR_BASE, 0x1000,
                     PAGE_READWRITE | PAGE_NOCACHE)) {
        RETAILMSG(1, (TEXT("FlashDrv!FMD!FMD_Init: VirtualCopy (v_s2410CLKPWR) failed!\r\n")));
        goto ErrExit;
    }
#endif // NOBINFS

#else
    pNFReg = (PUSHORT) (NFC_BASE | 0x20000000);
    v_s2410CLKPWR = (CLKPWRreg *) ( CLKPWR_BASE | 0x20000000 );
#endif

    //  Enable the clock to NAND controller
    v_s2410CLKPWR->rCLKCON |= (1<<4);

    pNFCONF = pNFReg;
    pNFCMD  = (PUSHORT) ((PBYTE) pNFReg + 0x04);
    pNFADDR = (PUSHORT) ((PBYTE) pNFReg + 0x08);
    pNFDATA = (PUSHORT) ((PBYTE) pNFReg + 0x0C);
    pNFSTAT = (PUSHORT) ((PBYTE) pNFReg + 0x10);
    pNFECC  = (PULONG)  ((PBYTE) pNFReg + 0x14);

    //  Now we need enable the NAND Flash controller
    GRABMUTEX();
    WRITE_REGISTER_USHORT(pNFCONF, NFCONF_INIT);
    RELEASEMUTEX();