📄 cmx_dio_chan.lis
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ENDIF ; RAM_USE_CLASS_1
IF ( RAM_USE_CLASS_2 & RAM_USE_CLASS_2 )
IF ( SYSTEM_IDXPG_TRACKS_IDX_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
or F, FLAG_PGMODE_01b
ENDIF ; SYSTEM_LARGE_MEMORY_MODEL
ENDIF
ENDIF ; RAM_USE_CLASS_2
IF ( RAM_USE_CLASS_2 & RAM_USE_CLASS_3 )
IF ( SYSTEM_IDXPG_TRACKS_STK_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
and F, ~FLAG_PGMODE_01b
ENDIF ; SYSTEM_LARGE_MEMORY_MODEL
ENDIF
ENDIF ; RAM_USE_CLASS_3
IF ( RAM_USE_CLASS_2 & RAM_USE_CLASS_4 )
; Nothing to do
ENDIF ; RAM_USE_CLASS_4
;Clears PRTxGS bit in pin position
0030 10 push X
0031 4F mov X,SP
0032 73 cpl A
0033 3801 add SP,1 ; complement A to set up mask
0035 5400 mov [X + GSpin],A
0037 52FF mov A,[X + GSport]
0039 4B swap X,A
003A 5E02 mov A,reg[X+GLOBAL_SELECT_OFFSET] ; mov GS pin into A
003C 4F mov X,SP
003D 79 dec X
003E 2300 and A,[X + GSpin] ; and with mask
0040 08 push A
0041 52FF mov A,[X + GSport]
0043 4B swap A,X
0044 18 pop A
0045 6102 mov reg[X+GLOBAL_SELECT_OFFSET],A ; write back to GS pin
0047 38FE add SP,-2
IF ( RAM_USE_CLASS_2 & RAM_USE_CLASS_1 )
; Nothing to do
ENDIF ; RAM_USE_CLASS_1
IF ( RAM_USE_CLASS_2 & RAM_USE_CLASS_2 )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
IF ( SYSTEM_IDXPG_TRACKS_STK_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
0049 703F and F, ~FLAG_PGMODE_MASK ; NOTE: transition thru 00b state
004B 71C0 or F, FLAG_PGMODE_MASK & FLAG_PGMODE_11b
ENDIF
ENDIF ; PGMODE LOCKED
IF ( SYSTEM_IDXPG_TRACKS_IDX_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
and F, ~FLAG_PGMODE_MASK ; NOTE: transition thru 00b state
or F, FLAG_PGMODE_MASK & FLAG_PGMODE_10b
ENDIF
ENDIF ; PGMODE FREE
ENDIF ; SYSTEM_LARGE_MEMORY_MODEL
ENDIF ; RAM_USE_CLASS_2
IF ( RAM_USE_CLASS_2 & RAM_USE_CLASS_3 )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
IF ( SYSTEM_IDXPG_TRACKS_STK_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
and F, ~FLAG_PGMODE_MASK ; NOTE: transition thru 00b state
or F, FLAG_PGMODE_MASK & FLAG_PGMODE_11b
ENDIF
ENDIF ; PGMODE LOCKED
IF ( SYSTEM_IDXPG_TRACKS_IDX_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
and F, ~FLAG_PGMODE_MASK ; NOTE: transition thru 00b state
or F, FLAG_PGMODE_MASK & FLAG_PGMODE_10b
ENDIF
ENDIF ; PGMODE FREE
ENDIF ; SYSTEM_LARGE_MEMORY_MODEL
ENDIF ; RAM_USE_CLASS_3
IF ( RAM_USE_CLASS_2 & RAM_USE_CLASS_4 )
; Nothing to do
ENDIF ; RAM_USE_CLASS_4
004D 7F ret
004E
004E ;-----------------------------------------------------------------------------
004E ; FUNCTION NAME: DiscreteDriveMode
004E ;
004E ; DESCRIPTION:
004E ; Sets the drive mode for the pin
004E ;
004E ;-----------------------------------------------------------------------------
004E ;
004E ; ARGUMENTS: ( FASTCALL16 format)
004E ; [SP-3] => pin (ie 0 => 0x01, 1 => 0x02, 2 => 0x04, etc)
004E ; [SP-4] => Actual port address
004E ; [SP-5] => drive mode
004E ;
004E ;
004E ; RETURNS:
004E ;
004E ; SIDE EFFECTS: REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED!
004E ;
004E ; THEORY of OPERATION or PROCEDURE:
004E ;
004E ;------------------------------------------------------------------------------
004E ; Stack offset constants
FFFFFFFD DMpin: equ -3
FFFFFFFC DMport: equ -4
FFFFFFFB DriveMode: equ -5
004E
004E
004E _DiscreteDriveMode:
004E DiscreteDriveMode:
IF ( RAM_USE_CLASS_2 & RAM_USE_CLASS_1 )
; Nothing to do
ENDIF ; RAM_USE_CLASS_1
IF ( RAM_USE_CLASS_2 & RAM_USE_CLASS_2 )
IF ( SYSTEM_IDXPG_TRACKS_IDX_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
or F, FLAG_PGMODE_01b
ENDIF ; SYSTEM_LARGE_MEMORY_MODEL
ENDIF
ENDIF ; RAM_USE_CLASS_2
IF ( RAM_USE_CLASS_2 & RAM_USE_CLASS_3 )
IF ( SYSTEM_IDXPG_TRACKS_STK_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
and F, ~FLAG_PGMODE_01b
ENDIF ; SYSTEM_LARGE_MEMORY_MODEL
ENDIF
ENDIF ; RAM_USE_CLASS_3
IF ( RAM_USE_CLASS_2 & RAM_USE_CLASS_4 )
; Nothing to do
ENDIF ; RAM_USE_CLASS_4
004E 7110 or F, FLAG_XIO_MASK
0050 4F mov X,SP
0051 52FB mov A,[X + DriveMode] ;move drivemode to A
0053 2101 and A,0x01
0055 B01E jnz SetOne ; jmp if bit 0 set to 1
0057 52FD mov A,[X + DMpin] ; load pin to A
0059 73 cpl A ; set up as mask
005A 54FD mov [X + DMpin],A ; move back
005C 52FC mov A,[X + DMport] ; load port
005E 4B swap X,A ; X now points to port, A contains SP
005F 08 push A ; save on stack
0060 5E00 mov A,reg[X+DRIVE_MODE_ZERO_OFFSET] ; load contents of PRTxDM0 into A
0062 20 pop X ; restore SP
0063 23FD and A,[X + DMpin] ; set bit to zero
0065 08 push A ; push result on stack
0066 52FC mov A,[X + DMport] ; move port to A
0068 4B swap X,A ; X now points to port
0069 18 pop A ; restore from stack
006A 6100 mov reg[X+DRIVE_MODE_ZERO_OFFSET],A ; move to PRTxDM0
006C 4F mov X,SP ; restore SP
006D 52FD mov A,[X + DMpin] ; restore pin to unmasked value
006F 73 cpl A
0070 54FD mov [X + DMpin],A
0072 8012 jmp Done
0074
0074 SetOne:
0074 52FC mov A,[ X + DMport] ; load port to A
0076 4B swap X, A ; X now points to port, A contains SP
0077 08 push A ; save the SP
0078 5E00 mov A,reg[X+DRIVE_MODE_ZERO_OFFSET] ; load contents of PRTxDM0 into A
007A 20 pop X ; restore SP
007B 2BFD or A,[X + DMpin] ; set to 1
007D 08 push A ; save on stack
007E 52FC mov A,[X + DMport] ; load port to A
0080 4B swap X,A ; X now points to port
0081 18 pop A ; restore from stack
0082 6100 mov reg[X+DRIVE_MODE_ZERO_OFFSET],A ; move to PRTxDM0
0084 4F mov X,SP ; restore SP
0085
0085 Done:
0085 ; Set PRTxDM1 bit
0085 52FB mov A,[X + DriveMode] ; load drive mode to A
0087 2102 and A, 0x02
0089 67 asr A
008A B01E jnz SetOne1 ;jmp if bit 2 set to 1
008C 52FD mov A,[X + DMpin] ; load pin to A
008E 73 cpl A ; set up as mask
008F 54FD mov [X + DMpin], A ; move back
0091 52FC mov A,[X + DMport] ; load port
0093 4B swap X,A ; X now points to port, A contains SP
0094 08 push A ; save on stack
0095 5E01 mov A,reg[X+DRIVE_MODE_ONE_OFFSET] ; load contents of PRTxDM1 into A
0097 20 pop X ; restore SP
0098 23FD and A,[X + DMpin] ; set bit to zero
009A 08 push A ; push result on stack
009B 52FC mov A,[X + DMport] ; move port to A
009D 4B swap X,A ; X now points to port
009E 18 pop A ; restore from stack
009F 6101 mov reg[X+DRIVE_MODE_ONE_OFFSET],A ; Set PRTxDM1 bit to zero
00A1 4F mov X,SP ; restore SP
00A2 52FD mov A,[X + DMpin] ; restore pin to unmasked value
00A4 73 cpl A
00A5 54FD mov [X + DMpin],A
00A7 8012 jmp Done1
00A9
00A9 SetOne1:
00A9 52FC mov A,[X + DMport] ; load port to A
00AB 4B swap X,A ; X now points to port, A contains SP
00AC 08 push A ; save the SP
00AD 5E01 mov A,reg[X+DRIVE_MODE_ONE_OFFSET] ; load contents of PRTxDM1 into A
00AF 20 pop X ; restore SP
00B0 2BFD or A,[X + DMpin] ; set to 1
00B2 08 push A ; save on stack
00B3 52FC mov A,[X + DMport] ; load port to A
00B5 4B swap X,A ; X now points to port
00B6 18 pop A ; restore from stack
00B7 6101 mov reg[X+DRIVE_MODE_ONE_OFFSET],A ; move to PRTxDM1
00B9 4F mov X,SP ; restore SP
00BA
00BA Done1:
00BA 70EF and F, ~FLAG_XIO_MAS⌨️ 快捷键说明
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