📄 cy3270mfproximity.lst
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(0098) ; Global Register values
023A: 62 61 00 MOV REG[97],0 (0099) mov reg[61h], 00h ; AnalogClockSelect1 register (CLK_CR1)
023D: 62 60 00 MOV REG[96],0 (0100) mov reg[60h], 00h ; AnalogColumnClockSelect register (CLK_CR0)
0240: 62 62 00 MOV REG[98],0 (0101) mov reg[62h], 00h ; AnalogIOControl_0 register (ABF_CR0)
0243: 62 67 C5 MOV REG[103],197 (0102) mov reg[67h], c5h ; AnalogLUTControl0 register (ALT_CR0)
0246: 62 64 00 MOV REG[100],0 (0103) mov reg[64h], 00h ; ComparatorGlobalOutEn register (CMP_GO_EN)
0249: 62 FD 00 MOV REG[253],0 (0104) mov reg[fdh], 00h ; DAC_Control register (DAC_CR)
024C: 62 D1 00 MOV REG[209],0 (0105) mov reg[d1h], 00h ; GlobalDigitalInterconnect_Drive_Even_Input register (GDI_E_IN)
024F: 62 D3 00 MOV REG[211],0 (0106) mov reg[d3h], 00h ; GlobalDigitalInterconnect_Drive_Even_Output register (GDI_E_OU)
0252: 62 D0 00 MOV REG[208],0 (0107) mov reg[d0h], 00h ; GlobalDigitalInterconnect_Drive_Odd_Input register (GDI_O_IN)
0255: 62 D2 00 MOV REG[210],0 (0108) mov reg[d2h], 00h ; GlobalDigitalInterconnect_Drive_Odd_Output register (GDI_O_OU)
0258: 62 E1 B0 MOV REG[225],176 (0109) mov reg[e1h], b0h ; OscillatorControl_1 register (OSC_CR1)
025B: 62 E2 00 MOV REG[226],0 (0110) mov reg[e2h], 00h ; OscillatorControl_2 register (OSC_CR2)
025E: 62 DF D4 MOV REG[223],212 (0111) mov reg[dfh], d4h ; OscillatorControl_3 register (OSC_CR3)
0261: 62 DE 01 MOV REG[222],1 (0112) mov reg[deh], 01h ; OscillatorControl_4 register (OSC_CR4)
0264: 62 DD 00 MOV REG[221],0 (0113) mov reg[ddh], 00h ; OscillatorGlobalBusEnableControl register (OSC_GO_EN)
0267: 62 D8 02 MOV REG[216],2 (0114) mov reg[d8h], 02h ; Port_0_MUXBusCtrl register (MUX_CR0)
026A: 62 D9 00 MOV REG[217],0 (0115) mov reg[d9h], 00h ; Port_1_MUXBusCtrl register (MUX_CR1)
026D: 62 DA 00 MOV REG[218],0 (0116) mov reg[dah], 00h ; Port_2_MUXBusCtrl register (MUX_CR2)
0270: 62 DB 00 MOV REG[219],0 (0117) mov reg[dbh], 00h ; Port_3_MUXBusCtrl register (MUX_CR3)
(0118) ; Instance name CSD, User Module CSD
(0119) ; Instance name CSD, Block Name CMP(ACE01)
(0120) ; Instance name CSD, Block Name CMP0(ACE00)
(0121) ; Instance name CSD, Block Name CMP_REF(ASE11)
0273: 62 E6 00 MOV REG[230],0 (0122) mov reg[e6h], 00h ;CSD_ADC_TRIM_REG(ADC1_TR)
0276: 62 66 00 MOV REG[102],0 (0123) mov reg[66h], 00h ;CSD_(AMD_CR1)
(0124) ; Instance name CSD, Block Name CNT(DBB00)
0279: 62 20 21 MOV REG[32],33 (0125) mov reg[20h], 21h ;CSD_CNT_FUNC_REG(DBB00FN)
027C: 62 21 45 MOV REG[33],69 (0126) mov reg[21h], 45h ;CSD_CNT_IN_REG(DBB00IN)
027F: 62 22 40 MOV REG[34],64 (0127) mov reg[22h], 40h ;CSD_CNT_OUT_REG(DBB00OU)
(0128) ; Instance name CSD, Block Name PRS16_LSB(DBB01)
0282: 62 24 0A MOV REG[36],10 (0129) mov reg[24h], 0ah ;CSD_PRS_FUNC_LSB_REG(DBB01FN)
0285: 62 25 00 MOV REG[37],0 (0130) mov reg[25h], 00h ;CSD_PRS_IN_LSB_REG(DBB01IN)
0288: 62 26 C0 MOV REG[38],192 (0131) mov reg[26h], c0h ;CSD_PRS_OUT_LSB_REG(DBB01OU)
(0132) ; Instance name CSD, Block Name PRS16_MSB(DCB02)
028B: 62 28 6A MOV REG[40],106 (0133) mov reg[28h], 6ah ;CSD_PRS_FUNC_MSB_REG(DCB02FN)
028E: 62 29 30 MOV REG[41],48 (0134) mov reg[29h], 30h ;CSD_PRS_IN_MSB_REG(DCB02IN)
0291: 62 2A E0 MOV REG[42],224 (0135) mov reg[2ah], e0h ;CSD_PRS_OUT_MSB_REG(DCB02OU)
(0136) ; Instance name SHADOWREGS_0, User Module SHADOWREGS
(0137) ; Instance name SHADOWREGS_1, User Module SHADOWREGS
(0138) ; Instance name SHADOWREGS_2, User Module SHADOWREGS
(0139) ; Instance name SHADOWREGS_3, User Module SHADOWREGS
(0140) ; Instance name SystemTimer, User Module SleepTimer
0294: 70 EF AND F,239 (0141) M8C_SetBank0
0296: 7F RET (0142) ret
FILE: lib\psocconfig.asm
(0001) ; Generated by PSoC Designer ???
(0002) ;
(0003) ;==========================================================================
(0004) ; PSoCConfig.asm
(0005) ; @PSOC_VERSION
(0006) ;
(0007) ; Version: 0.85
(0008) ; Revised: June 22, 2004
(0009) ; Copyright Cypress MicroSystems 2000-2004. All Rights Reserved.
(0010) ;
(0011) ; This file is generated by the Device Editor on Application Generation.
(0012) ; It contains code which loads the configuration data table generated in
(0013) ; the file PSoCConfigTBL.asm
(0014) ;
(0015) ; DO NOT EDIT THIS FILE MANUALLY, AS IT IS OVERWRITTEN!!!
(0016) ; Edits to this file will not be preserved.
(0017) ;==========================================================================
(0018) ;
(0019) include "m8c.inc"
(0020) include "memory.inc"
(0021) include "GlobalParams.inc"
(0022)
(0023) export LoadConfigInit
(0024) export _LoadConfigInit
(0025) export LoadConfig_cy3270mfproximity
(0026) export _LoadConfig_cy3270mfproximity
(0027) export Port_0_Data_SHADE
(0028) export _Port_0_Data_SHADE
(0029) export Port_1_Data_SHADE
(0030) export _Port_1_Data_SHADE
(0031) export Port_2_Data_SHADE
(0032) export _Port_2_Data_SHADE
(0033) export Port_3_Data_SHADE
(0034) export _Port_3_Data_SHADE
(0035)
(0036)
(0037) export NO_SHADOW
(0038) export _NO_SHADOW
(0039)
(0040) FLAG_CFG_MASK: equ 10h ;M8C flag register REG address bit mask
(0041) END_CONFIG_TABLE: equ ffh ;end of config table indicator
(0042)
(0043) AREA psoc_config(rom, rel)
(0044)
(0045)
(0046) ;---------------------------------------------------------------------------
(0047) ; LoadConfigInit - Establish the start-up configuration (except for a few
(0048) ; parameters handled by boot code, like CPU speed). This
(0049) ; function can be called from user code, but typically it
(0050) ; is only called from boot.
(0051) ;
(0052) ; INPUTS: None.
(0053) ; RETURNS: Nothing.
(0054) ; SIDE EFFECTS: Registers are volatile: the A and X registers can be modified!
(0055) ; In the large memory model currently only the page
(0056) ; pointer registers listed below are modified. This does
(0057) ; not guarantee that in future implementations of this
(0058) ; function other page pointer registers will not be
(0059) ; modified.
(0060) ;
(0061) ; Page Pointer Registers Modified:
(0062) ; CUR_PP
(0063) ;
(0064) _LoadConfigInit:
(0065) LoadConfigInit:
(0066) RAM_PROLOGUE RAM_USE_CLASS_4
(0067)
0297: 55 05 00 MOV [5],0 (0068) mov [Port_0_Data_SHADE], 0h
029A: 55 06 00 MOV [6],0 (0069) mov [Port_1_Data_SHADE], 0h
029D: 55 07 00 MOV [7],0 (0070) mov [Port_2_Data_SHADE], 0h
02A0: 55 08 00 MOV [8],0 (0071) mov [Port_3_Data_SHADE], 0h
(0072)
02A3: 7C 02 A7 LCALL 0x02A7 (0073) lcall LoadConfig_cy3270mfproximity
(0074)
(0075) RAM_EPILOGUE RAM_USE_CLASS_4
02A6: 7F RET (0076) ret
(0077)
(0078) ;---------------------------------------------------------------------------
(0079) ; Load Configuration cy3270mfproximity
(0080) ;
(0081) ; Load configuration registers for cy3270mfproximity.
(0082) ; IO Bank 0 registers a loaded first,then those in IO Bank 1.
(0083) ;
(0084) ; INPUTS: None.
(0085) ; RETURNS: Nothing.
(0086) ; SIDE EFFECTS: Registers are volatile: the CPU A and X registers may be
(0087) ; modified as may the Page Pointer registers!
(0088) ; In the large memory model currently only the page
(0089) ; pointer registers listed below are modified. This does
(0090) ; not guarantee that in future implementations of this
(0091) ; function other page pointer registers will not be
(0092) ; modified.
(0093) ;
(0094) ; Page Pointer Registers Modified:
(0095) ; CUR_PP
(0096) ;
(0097) _LoadConfig_cy3270mfproximity:
(0098) LoadConfig_cy3270mfproximity:
(0099) RAM_PROLOGUE RAM_USE_CLASS_4
02A7: 7C 01 68 LCALL 0x0168 (0100) lcall LoadConfigTBL_cy3270mfproximity ; Call load config table routine
(0101)
(0102)
(0103) RAM_EPILOGUE RAM_USE_CLASS_4
02AA: 7F RET (0104) ret
FILE: .\cmx_csd_chan.asm
(0001) ;;*****************************************************************************
(0002) ;; FILENAME: CMX_CSD_CHAN.asm
(0003) ;; @Versions@
(0004) ;;
(0005) ;;
(0006) ;; DESCRIPTION: Asm source file for CMX_CSD_CHAN.
(0007) ;;
(0008) ;;-----------------------------------------------------------------------------
(0009) ;; Copyright (c) Cypress Semiconductor 2000-2006. All Rights Reserved.
(0010) ;;*****************************************************************************
(0011) ;;*****************************************************************************
(0012)
(0013) include "m8c.inc"
(0014) include "memory.inc"
(0015) include "CSD.inc"
(0016)
(0017) export _CSD_UpdateGroupBaselines
(0018) export CSD_UpdateGroupBaselines
(0019) export _CSD_InitializeGroupBaselines
(0020) export CSD_InitializeGroupBaselines
(0021) export _CSD_ScanSensorGroup
(0022) export CSD_ScanSensorGroup
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