📄 cmx_dio_chan.lis
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IF ( RAM_USE_CLASS_2 & RAM_USE_CLASS_2 )
IF ( SYSTEM_IDXPG_TRACKS_IDX_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
or F, FLAG_PGMODE_01b
ENDIF ; SYSTEM_LARGE_MEMORY_MODEL
ENDIF
ENDIF ; RAM_USE_CLASS_2
IF ( RAM_USE_CLASS_2 & RAM_USE_CLASS_3 )
IF ( SYSTEM_IDXPG_TRACKS_STK_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
and F, ~FLAG_PGMODE_01b
ENDIF ; SYSTEM_LARGE_MEMORY_MODEL
ENDIF
ENDIF ; RAM_USE_CLASS_3
IF ( RAM_USE_CLASS_2 & RAM_USE_CLASS_4 )
; Nothing to do
ENDIF ; RAM_USE_CLASS_4
;Clears PRTxGS bit in pin position
002F 10 push X
0030 4F mov X,SP
0031 73 cpl A
0032 3801 add SP,1 ; complement A to set up mask
0034 5400 mov [X + GSpin],A
0036 52FF mov A,[X + GSport]
0038 4B swap X,A
0039 5E02 mov A,reg[X+GLOBAL_SELECT_OFFSET] ; mov GS pin into A
003B 4F mov X,SP
003C 79 dec X
003D 2300 and A,[X + GSpin] ; and with mask
003F 08 push A
0040 52FF mov A,[X + GSport]
0042 4B swap A,X
0043 18 pop A
0044 6102 mov reg[X+GLOBAL_SELECT_OFFSET],A ; write back to GS pin
0046 38FE add SP,-2
IF ( RAM_USE_CLASS_2 & RAM_USE_CLASS_1 )
; Nothing to do
ENDIF ; RAM_USE_CLASS_1
IF ( RAM_USE_CLASS_2 & RAM_USE_CLASS_2 )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
IF ( SYSTEM_IDXPG_TRACKS_STK_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
0048 703F and F, ~FLAG_PGMODE_MASK ; NOTE: transition thru 00b state
004A 71C0 or F, FLAG_PGMODE_MASK & FLAG_PGMODE_11b
ENDIF
ENDIF ; PGMODE LOCKED
IF ( SYSTEM_IDXPG_TRACKS_IDX_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
and F, ~FLAG_PGMODE_MASK ; NOTE: transition thru 00b state
or F, FLAG_PGMODE_MASK & FLAG_PGMODE_10b
ENDIF
ENDIF ; PGMODE FREE
ENDIF ; SYSTEM_LARGE_MEMORY_MODEL
ENDIF ; RAM_USE_CLASS_2
IF ( RAM_USE_CLASS_2 & RAM_USE_CLASS_3 )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
IF ( SYSTEM_IDXPG_TRACKS_STK_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
and F, ~FLAG_PGMODE_MASK ; NOTE: transition thru 00b state
or F, FLAG_PGMODE_MASK & FLAG_PGMODE_11b
ENDIF
ENDIF ; PGMODE LOCKED
IF ( SYSTEM_IDXPG_TRACKS_IDX_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
and F, ~FLAG_PGMODE_MASK ; NOTE: transition thru 00b state
or F, FLAG_PGMODE_MASK & FLAG_PGMODE_10b
ENDIF
ENDIF ; PGMODE FREE
ENDIF ; SYSTEM_LARGE_MEMORY_MODEL
ENDIF ; RAM_USE_CLASS_3
IF ( RAM_USE_CLASS_2 & RAM_USE_CLASS_4 )
; Nothing to do
ENDIF ; RAM_USE_CLASS_4
004C 7F ret
004D
004D ;-----------------------------------------------------------------------------
004D ; FUNCTION NAME: DiscreteDriveMode
004D ;
004D ; DESCRIPTION:
004D ; Sets the drive mode for the pin
004D ;
004D ;-----------------------------------------------------------------------------
004D ;
004D ; ARGUMENTS: ( FASTCALL16 format)
004D ; [SP-3] => pin (ie 0 => 0x01, 1 => 0x02, 2 => 0x04, etc)
004D ; [SP-4] => Actual port address
004D ; [SP-5] => drive mode
004D ;
004D ;
004D ; RETURNS:
004D ;
004D ; SIDE EFFECTS: REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED!
004D ;
004D ; THEORY of OPERATION or PROCEDURE:
004D ;
004D ;------------------------------------------------------------------------------
004D ; Stack offset constants
FFFFFFFD DMpin: equ -3
FFFFFFFC DMport: equ -4
FFFFFFFB DriveMode: equ -5
004D
004D
004D _DiscreteDriveMode:
004D DiscreteDriveMode:
IF ( RAM_USE_CLASS_2 & RAM_USE_CLASS_1 )
; Nothing to do
ENDIF ; RAM_USE_CLASS_1
IF ( RAM_USE_CLASS_2 & RAM_USE_CLASS_2 )
IF ( SYSTEM_IDXPG_TRACKS_IDX_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
or F, FLAG_PGMODE_01b
ENDIF ; SYSTEM_LARGE_MEMORY_MODEL
ENDIF
ENDIF ; RAM_USE_CLASS_2
IF ( RAM_USE_CLASS_2 & RAM_USE_CLASS_3 )
IF ( SYSTEM_IDXPG_TRACKS_STK_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
and F, ~FLAG_PGMODE_01b
ENDIF ; SYSTEM_LARGE_MEMORY_MODEL
ENDIF
ENDIF ; RAM_USE_CLASS_3
IF ( RAM_USE_CLASS_2 & RAM_USE_CLASS_4 )
; Nothing to do
ENDIF ; RAM_USE_CLASS_4
004D 7110 or F, FLAG_XIO_MASK
004F 4F mov X,SP
0050 52FB mov A,[X + DriveMode] ;move drivemode to A
0052 2101 and A,0x01
0054 B01E jnz SetOne ; jmp if bit 0 set to 1
0056 52FD mov A,[X + DMpin] ; load pin to A
0058 73 cpl A ; set up as mask
0059 54FD mov [X + DMpin],A ; move back
005B 52FC mov A,[X + DMport] ; load port
005D 4B swap X,A ; X now points to port, A contains SP
005E 08 push A ; save on stack
005F 5E00 mov A,reg[X+DRIVE_MODE_ZERO_OFFSET] ; load contents of PRTxDM0 into A
0061 20 pop X ; restore SP
0062 23FD and A,[X + DMpin] ; set bit to zero
0064 08 push A ; push result on stack
0065 52FC mov A,[X + DMport] ; move port to A
0067 4B swap X,A ; X now points to port
0068 18 pop A ; restore from stack
0069 6100 mov reg[X+DRIVE_MODE_ZERO_OFFSET],A ; move to PRTxDM0
006B 4F mov X,SP ; restore SP
006C 52FD mov A,[X + DMpin] ; restore pin to unmasked value
006E 73 cpl A
006F 54FD mov [X + DMpin],A
0071 8012 jmp Done
0073
0073 SetOne:
0073 52FC mov A,[ X + DMport] ; load port to A
0075 4B swap X, A ; X now points to port, A contains SP
0076 08 push A ; save the SP
0077 5E00 mov A,reg[X+DRIVE_MODE_ZERO_OFFSET] ; load contents of PRTxDM0 into A
0079 20 pop X ; restore SP
007A 2BFD or A,[X + DMpin] ; set to 1
007C 08 push A ; save on stack
007D 52FC mov A,[X + DMport] ; load port to A
007F 4B swap X,A ; X now points to port
0080 18 pop A ; restore from stack
0081 6100 mov reg[X+DRIVE_MODE_ZERO_OFFSET],A ; move to PRTxDM0
0083 4F mov X,SP ; restore SP
0084
0084 Done:
0084 ; Set PRTxDM1 bit
0084 52FB mov A,[X + DriveMode] ; load drive mode to A
0086 2102 and A, 0x02
0088 67 asr A
0089 B01E jnz SetOne1 ;jmp if bit 2 set to 1
008B 52FD mov A,[X + DMpin] ; load pin to A
008D 73 cpl A ; set up as mask
008E 54FD mov [X + DMpin], A ; move back
0090 52FC mov A,[X + DMport] ; load port
0092 4B swap X,A ; X now points to port, A contains SP
0093 08 push A ; save on stack
0094 5E01 mov A,reg[X+DRIVE_MODE_ONE_OFFSET] ; load contents of PRTxDM1 into A
0096 20 pop X ; restore SP
0097 23FD and A,[X + DMpin] ; set bit to zero
0099 08 push A ; push result on stack
009A 52FC mov A,[X + DMport] ; move port to A
009C 4B swap X,A ; X now points to port
009D 18 pop A ; restore from stack
009E 6101 mov reg[X+DRIVE_MODE_ONE_OFFSET],A ; Set PRTxDM1 bit to zero
00A0 4F mov X,SP ; restore SP
00A1 52FD mov A,[X + DMpin] ; restore pin to unmasked value
00A3 73 cpl A
00A4 54FD mov [X + DMpin],A
00A6 8012 jmp Done1
00A8
00A8 SetOne1:
00A8 52FC mov A,[X + DMport] ; load port to A
00AA 4B swap X,A ; X now points to port, A contains SP
00AB 08 push A ; save the SP
00AC 5E01 mov A,reg[X+DRIVE_MODE_ONE_OFFSET] ; load contents of PRTxDM1 into A
00AE 20 pop X ; restore SP
00AF 2BFD or A,[X + DMpin] ; set to 1
00B1 08 push A ; save on stack
00B2 52FC mov A,[X + DMport] ; load port to A
00B4 4B swap X,A ; X now points to port
00B5 18 pop A ; restore from stack
00B6 6101 mov reg[X+DRIVE_MODE_ONE_OFFSET],A ; move to PRTxDM1
00B8 4F mov X,SP ; restore SP
00B9
00B9 Done1:
00B9 70EF and F, ~FLAG_XIO_MASK
00BB 52FB mov ⌨️ 快捷键说明
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