legiontrace.cc
来自「M5,一个功能强大的多处理器系统模拟器.很多针对处理器架构,性能的研究都使用它作」· CC 代码 · 共 600 行 · 第 1/2 页
CC
600 行
thread->readIntReg(NumIntArchRegs + 2)) diffCcr = true; if(shared_data->gl != thread->readMiscRegNoEffect(MISCREG_GL)) diffGl = true; if(shared_data->asi != thread->readMiscRegNoEffect(MISCREG_ASI)) diffAsi = true; if(shared_data->pil != thread->readMiscRegNoEffect(MISCREG_PIL)) diffPil = true; if(shared_data->cwp != thread->readMiscRegNoEffect(MISCREG_CWP)) diffCwp = true; //if(shared_data->cansave != // thread->readMiscRegNoEffect(MISCREG_CANSAVE)) if(shared_data->cansave != thread->readIntReg(NumIntArchRegs + 3)) diffCansave = true; //if(shared_data->canrestore != // thread->readMiscRegNoEffect(MISCREG_CANRESTORE)) if(shared_data->canrestore != thread->readIntReg(NumIntArchRegs + 4)) diffCanrestore = true; //if(shared_data->otherwin != // thread->readMiscRegNoEffect(MISCREG_OTHERWIN)) if(shared_data->otherwin != thread->readIntReg(NumIntArchRegs + 6)) diffOtherwin = true; //if(shared_data->cleanwin != // thread->readMiscRegNoEffect(MISCREG_CLEANWIN)) if(shared_data->cleanwin != thread->readIntReg(NumIntArchRegs + 5)) diffCleanwin = true; for (int i = 0; i < 64; i++) { if (shared_data->itb[i] != thread->getITBPtr()->TteRead(i)) diffTlb = true; if (shared_data->dtb[i] != thread->getDTBPtr()->TteRead(i)) diffTlb = true; } if (diffPC || diffCC || diffInst || diffIntRegs || diffFpRegs || diffTpc || diffTnpc || diffTstate || diffTt || diffHpstate || diffHtstate || diffHtba || diffPstate || diffY || diffCcr || diffTl || diffFsr || diffGl || diffAsi || diffPil || diffCwp || diffCansave || diffCanrestore || diffOtherwin || diffCleanwin || diffTlb) { outs << "Differences found between M5 and Legion:"; if (diffPC) outs << " [PC]"; if (diffCC) outs << " [CC]"; if (diffInst) outs << " [Instruction]"; if (diffIntRegs) outs << " [IntRegs]"; if (diffFpRegs) outs << " [FpRegs]"; if (diffTpc) outs << " [Tpc]"; if (diffTnpc) outs << " [Tnpc]"; if (diffTstate) outs << " [Tstate]"; if (diffTt) outs << " [Tt]"; if (diffHpstate) outs << " [Hpstate]"; if (diffHtstate) outs << " [Htstate]"; if (diffHtba) outs << " [Htba]"; if (diffPstate) outs << " [Pstate]"; if (diffY) outs << " [Y]"; if (diffFsr) outs << " [FSR]"; if (diffCcr) outs << " [Ccr]"; if (diffTl) outs << " [Tl]"; if (diffGl) outs << " [Gl]"; if (diffAsi) outs << " [Asi]"; if (diffPil) outs << " [Pil]"; if (diffCwp) outs << " [Cwp]"; if (diffCansave) outs << " [Cansave]"; if (diffCanrestore) outs << " [Canrestore]"; if (diffOtherwin) outs << " [Otherwin]"; if (diffCleanwin) outs << " [Cleanwin]"; if (diffTlb) outs << " [Tlb]"; outs << endl << endl; outs << right << setfill(' ') << setw(15) << "M5 PC: " << "0x"<< setw(16) << setfill('0') << hex << m5Pc << endl; outs << setfill(' ') << setw(15) << "Legion PC: " << "0x" << setw(16) << setfill('0') << hex << lgnPc << endl << endl; outs << right << setfill(' ') << setw(15) << "M5 CC: " << "0x" << setw(16) << setfill('0') << hex << thread->getCpuPtr()->instCount() << endl; outs << setfill(' ') << setw(15) << "Legion CC: " << "0x" << setw(16) << setfill('0') << hex << shared_data->cycle_count << endl << endl; outs << setfill(' ') << setw(15) << "M5 Inst: " << "0x" << setw(8) << setfill('0') << hex << staticInst->machInst << staticInst->disassemble(m5Pc, debugSymbolTable) << endl; predecoder.setTC(thread); predecoder.moreBytes(m5Pc, m5Pc, shared_data->instruction); assert(predecoder.extMachInstReady()); StaticInstPtr legionInst = StaticInst::decode(predecoder.getExtMachInst(), lgnPc); outs << setfill(' ') << setw(15) << " Legion Inst: " << "0x" << setw(8) << setfill('0') << hex << shared_data->instruction << legionInst->disassemble(lgnPc, debugSymbolTable) << endl << endl; printSectionHeader(outs, "General State"); printColumnLabels(outs); printRegPair(outs, "HPstate", thread->readMiscRegNoEffect(MISCREG_HPSTATE), shared_data->hpstate | (1 << 11)); printRegPair(outs, "Htba", thread->readMiscRegNoEffect(MISCREG_HTBA), shared_data->htba); printRegPair(outs, "Pstate", thread->readMiscRegNoEffect(MISCREG_PSTATE), shared_data->pstate); printRegPair(outs, "Y", //thread->readMiscRegNoEffect(MISCREG_Y), thread->readIntReg(NumIntArchRegs + 1), shared_data->y); printRegPair(outs, "FSR", thread->readMiscRegNoEffect(MISCREG_FSR), shared_data->fsr); printRegPair(outs, "Ccr", //thread->readMiscRegNoEffect(MISCREG_CCR), thread->readIntReg(NumIntArchRegs + 2), shared_data->ccr); printRegPair(outs, "Tl", thread->readMiscRegNoEffect(MISCREG_TL), shared_data->tl); printRegPair(outs, "Gl", thread->readMiscRegNoEffect(MISCREG_GL), shared_data->gl); printRegPair(outs, "Asi", thread->readMiscRegNoEffect(MISCREG_ASI), shared_data->asi); printRegPair(outs, "Pil", thread->readMiscRegNoEffect(MISCREG_PIL), shared_data->pil); printRegPair(outs, "Cwp", thread->readMiscRegNoEffect(MISCREG_CWP), shared_data->cwp); printRegPair(outs, "Cansave", //thread->readMiscRegNoEffect(MISCREG_CANSAVE), thread->readIntReg(NumIntArchRegs + 3), shared_data->cansave); printRegPair(outs, "Canrestore", //thread->readMiscRegNoEffect(MISCREG_CANRESTORE), thread->readIntReg(NumIntArchRegs + 4), shared_data->canrestore); printRegPair(outs, "Otherwin", //thread->readMiscRegNoEffect(MISCREG_OTHERWIN), thread->readIntReg(NumIntArchRegs + 6), shared_data->otherwin); printRegPair(outs, "Cleanwin", //thread->readMiscRegNoEffect(MISCREG_CLEANWIN), thread->readIntReg(NumIntArchRegs + 5), shared_data->cleanwin); outs << endl; for (int i = 1; i <= MaxTL; i++) { printLevelHeader(outs, i); printColumnLabels(outs); thread->setMiscRegNoEffect(MISCREG_TL, i); printRegPair(outs, "Tpc", thread->readMiscRegNoEffect(MISCREG_TPC), shared_data->tpc[i-1]); printRegPair(outs, "Tnpc", thread->readMiscRegNoEffect(MISCREG_TNPC), shared_data->tnpc[i-1]); printRegPair(outs, "Tstate", thread->readMiscRegNoEffect(MISCREG_TSTATE), shared_data->tstate[i-1]); printRegPair(outs, "Tt", thread->readMiscRegNoEffect(MISCREG_TT), shared_data->tt[i-1]); printRegPair(outs, "Htstate", thread->readMiscRegNoEffect(MISCREG_HTSTATE), shared_data->htstate[i-1]); } thread->setMiscRegNoEffect(MISCREG_TL, oldTl); outs << endl; printSectionHeader(outs, "General Purpose Registers"); static const char * regtypes[4] = {"%g", "%o", "%l", "%i"}; for(int y = 0; y < 4; y++) { for(int x = 0; x < 8; x++) { char label[8]; sprintf(label, "%s%d", regtypes[y], x); printRegPair(outs, label, thread->readIntReg(y*8+x), shared_data->intregs[y*8+x]); } } if (diffFpRegs) { for (int x = 0; x < 32; x++) { char label[8]; sprintf(label, "%%f%d", x); printRegPair(outs, label, thread->readFloatRegBits(x*2, FloatRegFile::DoubleWidth), shared_data->fpregs[x]); } } if (diffTlb) { printColumnLabels(outs); char label[8]; for (int x = 0; x < 64; x++) { if (shared_data->itb[x] != ULL(0xFFFFFFFFFFFFFFFF) || thread->getITBPtr()->TteRead(x) != ULL(0xFFFFFFFFFFFFFFFF)) { sprintf(label, "I-TLB:%02d", x); printRegPair(outs, label, thread->getITBPtr()->TteRead(x), shared_data->itb[x]); } } for (int x = 0; x < 64; x++) { if (shared_data->dtb[x] != ULL(0xFFFFFFFFFFFFFFFF) || thread->getDTBPtr()->TteRead(x) != ULL(0xFFFFFFFFFFFFFFFF)) { sprintf(label, "D-TLB:%02d", x); printRegPair(outs, label, thread->getDTBPtr()->TteRead(x), shared_data->dtb[x]); } } thread->getITBPtr()->dumpAll(); thread->getDTBPtr()->dumpAll(); } diffcount++; if (diffcount > 3) fatal("Differences found between Legion and M5\n"); } else diffcount = 0; compared = true; shared_data->flags = OWN_LEGION; } } // while } // if not microop}/* namespace Trace */ }//////////////////////////////////////////////////////////////////////////// ExeTracer Simulation Object//Trace::LegionTrace *LegionTraceParams::create(){ return new Trace::LegionTrace(this);};
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