sconscript

来自「M5,一个功能强大的多处理器系统模拟器.很多针对处理器架构,性能的研究都使用它作」· 代码 · 共 101 行

# -*- mode:python -*-

# Copyright (c) 2006
# The Regents of The University of Michigan
# All Rights Reserved
#
# This code is part of the M5 simulator.
#
# Permission is granted to use, copy, create derivative works and
# redistribute this software and such derivative works for any
# purpose, so long as the copyright notice above, this grant of
# permission, and the disclaimer below appear in all copies made; and
# so long as the name of The University of Michigan is not used in any
# advertising or publicity pertaining to the use or distribution of
# this software without specific, written prior authorization.
#
# THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE
# UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND
# WITHOUT WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER
# EXPRESS OR IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED
# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE. THE REGENTS OF THE UNIVERSITY OF MICHIGAN SHALL NOT BE
# LIABLE FOR ANY DAMAGES, INCLUDING DIRECT, SPECIAL, INDIRECT,
# INCIDENTAL, OR CONSEQUENTIAL DAMAGES, WITH RESPECT TO ANY CLAIM
# ARISING OUT OF OR IN CONNECTION WITH THE USE OF THE SOFTWARE, EVEN
# IF IT HAS BEEN OR IS HEREAFTER ADVISED OF THE POSSIBILITY OF SUCH
# DAMAGES.
#
# Authors: Steven K. Reinhardt
#          Gabe M. Black

Import('*')

if env['FULL_SYSTEM']:
    SimObject('BadDevice.py')
    SimObject('Device.py')
    SimObject('DiskImage.py')
    SimObject('Ethernet.py')
    SimObject('Ide.py')
    SimObject('Pci.py')
    SimObject('Platform.py')
    SimObject('SimConsole.py')
    SimObject('SimpleDisk.py')
    SimObject('Uart.py')

    Source('baddev.cc')
    Source('disk_image.cc')
    Source('etherbus.cc')
    Source('etherdump.cc')
    Source('etherint.cc')
    Source('etherlink.cc')
    Source('etherpkt.cc')
    Source('ethertap.cc')
    Source('i8254xGBe.cc')
    Source('ide_ctrl.cc')
    Source('ide_disk.cc')
    Source('io_device.cc')
    Source('isa_fake.cc')
    Source('ns_gige.cc')
    Source('pciconfigall.cc')
    Source('pcidev.cc')
    Source('pktfifo.cc')
    Source('platform.cc')
    Source('simconsole.cc')
    Source('simple_disk.cc')
    Source('sinic.cc')
    Source('uart.cc')
    Source('uart8250.cc')

    TraceFlag('Console')
    TraceFlag('ConsoleVerbose')
    TraceFlag('DiskImageRead')
    TraceFlag('DiskImageWrite')
    TraceFlag('DMA')
    TraceFlag('Ethernet')
    TraceFlag('EthernetCksum')
    TraceFlag('EthernetDMA')
    TraceFlag('EthernetData')
    TraceFlag('EthernetDesc')
    TraceFlag('EthernetEEPROM')
    TraceFlag('EthernetIntr')
    TraceFlag('EthernetPIO')
    TraceFlag('EthernetSM')
    TraceFlag('IdeCtrl')
    TraceFlag('IdeDisk')
    TraceFlag('IsaFake')
    TraceFlag('PCIDEV')
    TraceFlag('PciConfigAll')
    TraceFlag('SimpleDisk')
    TraceFlag('SimpleDiskData')
    TraceFlag('Uart')

    CompoundFlag('DiskImageAll', [ 'DiskImageRead', 'DiskImageWrite' ])
    CompoundFlag('EthernetAll', [ 'Ethernet', 'EthernetPIO', 'EthernetDMA',
        'EthernetData' , 'EthernetDesc', 'EthernetIntr', 'EthernetSM',
        'EthernetCksum' ])
    CompoundFlag('EthernetNoData', [ 'Ethernet', 'EthernetPIO', 'EthernetDesc',
        'EthernetIntr', 'EthernetSM', 'EthernetCksum' ])
    CompoundFlag('IdeAll', [ 'IdeCtrl', 'IdeDisk' ])