decoder.isa

来自「M5,一个功能强大的多处理器系统模拟器.很多针对处理器架构,性能的研究都使用它作」· ISA 代码 · 共 1,399 行 · 第 1/5 页

ISA
1,399
字号
            0x28: decode RS1 {                0x00: NoPriv::rdy({{Rd = Y<31:0>;}});                //1 should cause an illegal instruction exception                0x02: NoPriv::rdccr({{Rd = Ccr;}});                0x03: NoPriv::rdasi({{Rd = Asi;}});                0x04: Priv::rdtick({{Rd = Tick;}}, {{Tick<63:>}});                0x05: NoPriv::rdpc({{                    if(Pstate<3:>)                        Rd = (xc->readPC())<31:0>;                    else                        Rd = xc->readPC();}});                0x06: NoPriv::rdfprs({{                    //Wait for all fpops to finish.                    Rd = Fprs;                }});                //7-14 should cause an illegal instruction exception                0x0F: decode I {                    0x0: Nop::stbar({{/*stuff*/}}, IsWriteBarrier, MemWriteOp);                    0x1: Nop::membar({{/*stuff*/}}, IsMemBarrier, MemReadOp);                }                0x10: Priv::rdpcr({{Rd = Pcr;}});                0x11: Priv::rdpic({{Rd = Pic;}}, {{Pcr<0:>}});                //0x12 should cause an illegal instruction exception                0x13: NoPriv::rdgsr({{                       fault = checkFpEnableFault(xc);                       if (fault)                            return fault;                       Rd = Gsr;                }});                //0x14-0x15 should cause an illegal instruction exception                0x16: Priv::rdsoftint({{Rd = Softint;}});                0x17: Priv::rdtick_cmpr({{Rd = TickCmpr;}});                0x18: Priv::rdstick({{Rd = Stick}}, {{Stick<63:>}});                0x19: Priv::rdstick_cmpr({{Rd = StickCmpr;}});                0x1A: Priv::rdstrand_sts_reg({{                    if(Pstate<2:> && !Hpstate<2:>)                        Rd = StrandStsReg<0:>;                    else                        Rd = StrandStsReg;                }});                //0x1A is supposed to be reserved, but it reads the strand                //status register.                //0x1B-0x1F should cause an illegal instruction exception            }            0x29: decode RS1 {                0x00: HPriv::rdhprhpstate({{Rd = Hpstate;}});                0x01: HPriv::rdhprhtstate({{Rd = Htstate;}}, checkTl=true);                //0x02 should cause an illegal instruction exception                0x03: HPriv::rdhprhintp({{Rd = Hintp;}});                //0x04 should cause an illegal instruction exception                0x05: HPriv::rdhprhtba({{Rd = Htba;}});                0x06: HPriv::rdhprhver({{Rd = Hver;}});                //0x07-0x1E should cause an illegal instruction exception                0x1F: HPriv::rdhprhstick_cmpr({{Rd = HstickCmpr;}});            }            0x2A: decode RS1 {                0x00: Priv::rdprtpc({{Rd = Tpc;}}, checkTl=true);                0x01: Priv::rdprtnpc({{Rd = Tnpc;}}, checkTl=true);                0x02: Priv::rdprtstate({{Rd = Tstate;}}, checkTl=true);                0x03: Priv::rdprtt({{Rd = Tt;}}, checkTl=true);                0x04: Priv::rdprtick({{Rd = Tick;}});                0x05: Priv::rdprtba({{Rd = Tba;}});                0x06: Priv::rdprpstate({{Rd = Pstate;}});                0x07: Priv::rdprtl({{Rd = Tl;}});                0x08: Priv::rdprpil({{Rd = Pil;}});                0x09: Priv::rdprcwp({{Rd = Cwp;}});                0x0A: Priv::rdprcansave({{Rd = Cansave;}});                0x0B: Priv::rdprcanrestore({{Rd = Canrestore;}});                0x0C: Priv::rdprcleanwin({{Rd = Cleanwin;}});                0x0D: Priv::rdprotherwin({{Rd = Otherwin;}});                0x0E: Priv::rdprwstate({{Rd = Wstate;}});                //0x0F should cause an illegal instruction exception                0x10: Priv::rdprgl({{Rd = Gl;}});                //0x11-0x1F should cause an illegal instruction exception            }            0x2B: BasicOperate::flushw({{                if(NWindows - 2 - Cansave != 0)                {                    if(Otherwin)                        fault = new SpillNOther(4*Wstate<5:3>);                    else                        fault = new SpillNNormal(4*Wstate<2:0>);                }            }});            0x2C: decode MOVCC3            {                0x0: Trap::movccfcc({{fault = new FpDisabled;}});                0x1: decode CC                {                    0x0: movcci({{                        if(passesCondition(Ccr<3:0>, COND4))                            Rd = Rs2_or_imm11;                        else                            Rd = Rd;                    }});                    0x2: movccx({{                        if(passesCondition(Ccr<7:4>, COND4))                            Rd = Rs2_or_imm11;                        else                            Rd = Rd;                    }});                }            }            0x2D: sdivx({{                if(Rs2_or_imm13.sdw == 0) fault = new DivisionByZero;                else Rd.sdw = Rs1.sdw / Rs2_or_imm13.sdw;            }});            0x2E: Trap::popc({{fault = new IllegalInstruction;}});            0x2F: decode RCOND3            {                0x1: movreq({{Rd = (Rs1.sdw == 0) ? Rs2_or_imm10 : Rd;}});                0x2: movrle({{Rd = (Rs1.sdw <= 0) ? Rs2_or_imm10 : Rd;}});                0x3: movrl({{Rd = (Rs1.sdw < 0) ? Rs2_or_imm10 : Rd;}});                0x5: movrne({{Rd = (Rs1.sdw != 0) ? Rs2_or_imm10 : Rd;}});                0x6: movrg({{Rd = (Rs1.sdw > 0) ? Rs2_or_imm10 : Rd;}});                0x7: movrge({{Rd = (Rs1.sdw >= 0) ? Rs2_or_imm10 : Rd;}});            }            0x30: decode RD {                0x00: NoPriv::wry({{Y = (Rs1 ^ Rs2_or_imm13)<31:0>;}});                //0x01 should cause an illegal instruction exception                0x02: NoPriv::wrccr({{Ccr = Rs1 ^ Rs2_or_imm13;}});                0x03: NoPriv::wrasi({{Asi = Rs1 ^ Rs2_or_imm13;}});                //0x04-0x05 should cause an illegal instruction exception                0x06: NoPriv::wrfprs({{Fprs = Rs1 ^ Rs2_or_imm13;}});                //0x07-0x0E should cause an illegal instruction exception                0x0F: Trap::softreset({{fault = new SoftwareInitiatedReset;}});                0x10: Priv::wrpcr({{Pcr = Rs1 ^ Rs2_or_imm13;}});                0x11: Priv::wrpic({{Pic = Rs1 ^ Rs2_or_imm13;}}, {{Pcr<0:>}});                //0x12 should cause an illegal instruction exception                0x13: NoPriv::wrgsr({{                    if(Fprs<2:> == 0 || Pstate<4:> == 0)                        return new FpDisabled;                    Gsr = Rs1 ^ Rs2_or_imm13;                }});                0x14: Priv::wrsoftint_set({{SoftintSet = Rs1 ^ Rs2_or_imm13;}});                0x15: Priv::wrsoftint_clr({{SoftintClr = Rs1 ^ Rs2_or_imm13;}});                0x16: Priv::wrsoftint({{Softint = Rs1 ^ Rs2_or_imm13;}});                0x17: Priv::wrtick_cmpr({{TickCmpr = Rs1 ^ Rs2_or_imm13;}});                0x18: NoPriv::wrstick({{                    if(!Hpstate<2:>)                        return new IllegalInstruction;                    Stick = Rs1 ^ Rs2_or_imm13;                }});                0x19: Priv::wrstick_cmpr({{StickCmpr = Rs1 ^ Rs2_or_imm13;}});                0x1A: Priv::wrstrand_sts_reg({{                        StrandStsReg = Rs1 ^ Rs2_or_imm13;                }});                //0x1A is supposed to be reserved, but it writes the strand                //status register.                //0x1B-0x1F should cause an illegal instruction exception            }            0x31: decode FCN {                0x0: Priv::saved({{                    assert(Cansave < NWindows - 2);                    assert(Otherwin || Canrestore);                    Cansave = Cansave + 1;                    if(Otherwin == 0)                        Canrestore = Canrestore - 1;                    else                        Otherwin = Otherwin - 1;                }});                0x1: Priv::restored({{                    assert(Cansave || Otherwin);                    assert(Canrestore < NWindows - 2);                    Canrestore = Canrestore + 1;                    if(Otherwin == 0)                        Cansave = Cansave - 1;                    else                        Otherwin = Otherwin - 1;                    if(Cleanwin < NWindows - 1)                        Cleanwin = Cleanwin + 1;                }});            }            0x32: decode RD {                0x00: Priv::wrprtpc(                              {{Tpc = Rs1 ^ Rs2_or_imm13;}}, checkTl=true);                0x01: Priv::wrprtnpc(                              {{Tnpc = Rs1 ^ Rs2_or_imm13;}}, checkTl=true);                0x02: Priv::wrprtstate(                              {{Tstate = Rs1 ^ Rs2_or_imm13;}}, checkTl=true);                0x03: Priv::wrprtt(                              {{Tt = Rs1 ^ Rs2_or_imm13;}}, checkTl=true);                0x04: HPriv::wrprtick({{Tick = Rs1 ^ Rs2_or_imm13;}});                0x05: Priv::wrprtba({{Tba = Rs1 ^ Rs2_or_imm13;}});                0x06: Priv::wrprpstate({{Pstate = Rs1 ^ Rs2_or_imm13;}});                0x07: Priv::wrprtl({{                    if(Pstate<2:> && !Hpstate<2:>)                        Tl = std::min<uint64_t>(Rs1 ^ Rs2_or_imm13, MaxPTL);                    else                        Tl = std::min<uint64_t>(Rs1 ^ Rs2_or_imm13, MaxTL);                }});                0x08: Priv::wrprpil({{Pil = Rs1 ^ Rs2_or_imm13;}});                0x09: Priv::wrprcwp({{Cwp = Rs1 ^ Rs2_or_imm13;}});                0x0A: Priv::wrprcansave({{Cansave = Rs1 ^ Rs2_or_imm13;}});                0x0B: Priv::wrprcanrestore({{Canrestore = Rs1 ^ Rs2_or_imm13;}});                0x0C: Priv::wrprcleanwin({{Cleanwin = Rs1 ^ Rs2_or_imm13;}});                0x0D: Priv::wrprotherwin({{Otherwin = Rs1 ^ Rs2_or_imm13;}});                0x0E: Priv::wrprwstate({{Wstate = Rs1 ^ Rs2_or_imm13;}});                //0x0F should cause an illegal instruction exception                0x10: Priv::wrprgl({{                    if(Pstate<2:> && !Hpstate<2:>)                        Gl = std::min<uint64_t>(Rs1 ^ Rs2_or_imm13, MaxPGL);                    else                        Gl = std::min<uint64_t>(Rs1 ^ Rs2_or_imm13, MaxGL);                }});                //0x11-0x1F should cause an illegal instruction exception            }            0x33: decode RD {                0x00: HPriv::wrhprhpstate({{Hpstate = Rs1 ^ Rs2_or_imm13;}});                0x01: HPriv::wrhprhtstate(                              {{Htstate = Rs1 ^ Rs2_or_imm13;}}, checkTl=true);                //0x02 should cause an illegal instruction exception                0x03: HPriv::wrhprhintp({{Hintp = Rs1 ^ Rs2_or_imm13;}});                //0x04 should cause an illegal instruction exception                0x05: HPriv::wrhprhtba({{Htba = Rs1 ^ Rs2_or_imm13;}});                //0x06-0x01D should cause an illegal instruction exception                0x1F: HPriv::wrhprhstick_cmpr({{HstickCmpr = Rs1 ^ Rs2_or_imm13;}});            }            0x34: decode OPF{                format FpBasic{                    0x01: fmovs({{Frds.uw = Frs2s.uw;}});                    0x02: fmovd({{Frd.udw = Frs2.udw;}});                    0x03: FpUnimpl::fmovq();                    0x05: fnegs({{Frds.uw = Frs2s.uw ^ (1UL << 31);}});                    0x06: fnegd({{Frd.udw = Frs2.udw ^ (1ULL << 63);}});                    0x07: FpUnimpl::fnegq();                    0x09: fabss({{Frds.uw = ((1UL << 31) - 1) & Frs2s.uw;}});                    0x0A: fabsd({{Frd.udw = ((1ULL << 63) - 1) & Frs2.udw;}});                    0x0B: FpUnimpl::fabsq();                    0x29: fsqrts({{Frds.sf = std::sqrt(Frs2s.sf);}});                    0x2A: fsqrtd({{Frd.df = std::sqrt(Frs2.df);}});                    0x2B: FpUnimpl::fsqrtq();                    0x41: fadds({{Frds.sf = Frs1s.sf + Frs2s.sf;}});                    0x42: faddd({{Frd.df = Frs1.df + Frs2.df;}});                    0x43: FpUnimpl::faddq();                    0x45: fsubs({{Frds.sf = Frs1s.sf - Frs2s.sf;}});                    0x46: fsubd({{Frd.df = Frs1.df - Frs2.df; }});                    0x47: FpUnimpl::fsubq();                    0x49: fmuls({{Frds.sf = Frs1s.sf * Frs2s.sf;}});                    0x4A: fmuld({{Frd.df = Frs1.df * Frs2.df;}});                    0x4B: FpUnimpl::fmulq();                    0x4D: fdivs({{Frds.sf = Frs1s.sf / Frs2s.sf;}});                    0x4E: fdivd({{Frd.df = Frs1.df / Frs2.df;}});                    0x4F: FpUnimpl::fdivq();                    0x69: fsmuld({{Frd.df = Frs1s.sf * Frs2s.sf;}});                    0x6E: FpUnimpl::fdmulq();                    0x81: fstox({{Frd.sdw = static_cast<int64_t>(Frs2s.sf);}});                    0x82: fdtox({{Frd.sdw = static_cast<int64_t>(Frs2.df);}});                    0x83: FpUnimpl::fqtox();                    0x84: fxtos({{Frds.sf = static_cast<float>(Frs2.sdw);}});                    0x88: fxtod({{Frd.df = static_cast<double>(Frs2.sdw);}});                    0x8C: FpUnimpl::fxtoq();                    0xC4: fitos({{Frds.sf = static_cast<float>(Frs2s.sw);}});                    0xC6: fdtos({{Frds.sf = Frs2.df;}});                    0xC7: FpUnimpl::fqtos();                    0xC8: fitod({{Frd.df = static_cast<double>(Frs2s.sw);}});                    0xC9: fstod({{Frd.df = Frs2s.sf;}});                    0xCB: FpUnimpl::fqtod();                    0xCC: FpUnimpl::fitoq();                    0xCD: FpUnimpl::fstoq();                    0xCE: FpUnimpl::fdtoq();                    0xD1: fstoi({{                            Frds.sw = static_cast<int32_t>(Frs2s.sf);                            float t = Frds.sw;                            if (t != Frs2s.sf)                               Fsr = insertBits(Fsr, 4,0, 0x01);                    }});                    0xD2: fdtoi({{                            Frds.sw = static_cast<int32_t>(Frs2.df);                            double t = Frds.sw;                            if (t != Frs2.df)                               Fsr = insertBits(Fsr, 4,0, 0x01);                    }});                    0xD3: FpUnimpl::fqtoi();                    default: FailUnimpl::fpop1();                }            }            0x35: decode OPF{                format FpBasic{

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