int.isa
来自「M5,一个功能强大的多处理器系统模拟器.很多针对处理器架构,性能的研究都使用它作」· ISA 代码 · 共 133 行
ISA
133 行
// -*- mode:c++ -*-//Copyright (c) 2003, 2004, 2005//The Regents of The University of Michigan//All Rights Reserved//This code is part of the M5 simulator.//Permission is granted to use, copy, create derivative works and//redistribute this software and such derivative works for any purpose,//so long as the copyright notice above, this grant of permission, and//the disclaimer below appear in all copies made; and so long as the//name of The University of Michigan is not used in any advertising or//publicity pertaining to the use or distribution of this software//without specific, written prior authorization.//THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE//UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND WITHOUT//WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER EXPRESS OR//IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED WARRANTIES OF//MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE REGENTS OF//THE UNIVERSITY OF MICHIGAN SHALL NOT BE LIABLE FOR ANY DAMAGES,//INCLUDING DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL//DAMAGES, WITH RESPECT TO ANY CLAIM ARISING OUT OF OR IN CONNECTION//WITH THE USE OF THE SOFTWARE, EVEN IF IT HAS BEEN OR IS HEREAFTER//ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.//Authors: Steven K. Reinhardt//////////////////////////////////////////////////////////////////////// Integer operate instructions//output header {{ /** * Base class for integer immediate instructions. */ class IntegerImm : public AlphaStaticInst { protected: /// Immediate operand value (unsigned 8-bit int). uint8_t imm; /// Constructor IntegerImm(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : AlphaStaticInst(mnem, _machInst, __opClass), imm(INTIMM) { } std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; };}};output decoder {{ std::string IntegerImm::generateDisassembly(Addr pc, const SymbolTable *symtab) const { std::stringstream ss; ccprintf(ss, "%-10s ", mnemonic); // just print the first source reg... if there's // a second one, it's a read-modify-write dest (Rc), // e.g. for CMOVxx if (_numSrcRegs > 0) { printReg(ss, _srcRegIdx[0]); ss << ","; } ss << (int)imm; if (_numDestRegs > 0) { ss << ","; printReg(ss, _destRegIdx[0]); } return ss.str(); }}};def template RegOrImmDecode {{ { AlphaStaticInst *i = (IMM) ? (AlphaStaticInst *)new %(class_name)sImm(machInst) : (AlphaStaticInst *)new %(class_name)s(machInst); if (RC == 31) { i = makeNop(i); } return i; }}};// Primary format for integer operate instructions:// - Generates both reg-reg and reg-imm versions if Rb_or_imm is used.// - Generates NOP if RC == 31.def format IntegerOperate(code, *opt_flags) {{ # If the code block contains 'Rb_or_imm', we define two instructions, # one using 'Rb' and one using 'imm', and have the decoder select # the right one. uses_imm = (code.find('Rb_or_imm') != -1) if uses_imm: orig_code = code # base code is reg version: # rewrite by substituting 'Rb' for 'Rb_or_imm' code = re.sub(r'Rb_or_imm', 'Rb', orig_code) # generate immediate version by substituting 'imm' # note that imm takes no extenstion, so we extend # the regexp to replace any extension as well imm_code = re.sub(r'Rb_or_imm(\.\w+)?', 'imm', orig_code) # generate declaration for register version iop = InstObjParams(name, Name, 'AlphaStaticInst', code, opt_flags) header_output = BasicDeclare.subst(iop) decoder_output = BasicConstructor.subst(iop) exec_output = BasicExecute.subst(iop) if uses_imm: # append declaration for imm version imm_iop = InstObjParams(name, Name + 'Imm', 'IntegerImm', imm_code, opt_flags) header_output += BasicDeclare.subst(imm_iop) decoder_output += BasicConstructor.subst(imm_iop) exec_output += BasicExecute.subst(imm_iop) # decode checks IMM bit to pick correct version decode_block = RegOrImmDecode.subst(iop) else: # no imm version: just check for nop decode_block = OperateNopCheckDecode.subst(iop)}};
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