m5stats.txt

来自「M5,一个功能强大的多处理器系统模拟器.很多针对处理器架构,性能的研究都使用它作」· 文本 代码 · 共 574 行 · 第 1/5 页

system.cpu0.dtb.write_acv                         115                       # DTB write access violations
system.cpu0.dtb.write_hits                    6026521                       # DTB write hits
system.cpu0.dtb.write_misses                      798                       # DTB write misses
system.cpu0.icache.ReadReq_accesses          57943269                       # number of ReadReq accesses(hits+misses)
system.cpu0.icache.ReadReq_avg_miss_latency 14213.482115                       # average ReadReq miss latency
system.cpu0.icache.ReadReq_avg_mshr_miss_latency 11212.730813                       # average ReadReq mshr miss latency
system.cpu0.icache.ReadReq_hits              57028190                       # number of ReadReq hits
system.cpu0.icache.ReadReq_miss_latency   13006459000                       # number of ReadReq miss cycles
system.cpu0.icache.ReadReq_miss_rate         0.015793                       # miss rate for ReadReq accesses
system.cpu0.icache.ReadReq_misses              915079                       # number of ReadReq misses
system.cpu0.icache.ReadReq_mshr_miss_latency  10260534500                       # number of ReadReq MSHR miss cycles
system.cpu0.icache.ReadReq_mshr_miss_rate     0.015793                       # mshr miss rate for ReadReq accesses
system.cpu0.icache.ReadReq_mshr_misses         915079                       # number of ReadReq MSHR misses
system.cpu0.icache.avg_blocked_cycles_no_mshrs <err: div-0>                       # average number of cycles each access was blocked
system.cpu0.icache.avg_blocked_cycles_no_targets <err: div-0>                       # average number of cycles each access was blocked
system.cpu0.icache.avg_refs                 62.327526                       # Average number of references to valid blocks.
system.cpu0.icache.blocked_no_mshrs                 0                       # number of cycles access was blocked
system.cpu0.icache.blocked_no_targets               0                       # number of cycles access was blocked
system.cpu0.icache.blocked_cycles_no_mshrs            0                       # number of cycles access was blocked
system.cpu0.icache.blocked_cycles_no_targets            0                       # number of cycles access was blocked
system.cpu0.icache.cache_copies                     0                       # number of cache copies performed
system.cpu0.icache.demand_accesses           57943269                       # number of demand (read+write) accesses
system.cpu0.icache.demand_avg_miss_latency 14213.482115                       # average overall miss latency
system.cpu0.icache.demand_avg_mshr_miss_latency 11212.730813                       # average overall mshr miss latency
system.cpu0.icache.demand_hits               57028190                       # number of demand (read+write) hits
system.cpu0.icache.demand_miss_latency    13006459000                       # number of demand (read+write) miss cycles
system.cpu0.icache.demand_miss_rate          0.015793                       # miss rate for demand accesses
system.cpu0.icache.demand_misses               915079                       # number of demand (read+write) misses
system.cpu0.icache.demand_mshr_hits                 0                       # number of demand (read+write) MSHR hits
system.cpu0.icache.demand_mshr_miss_latency  10260534500                       # number of demand (read+write) MSHR miss cycles
system.cpu0.icache.demand_mshr_miss_rate     0.015793                       # mshr miss rate for demand accesses
system.cpu0.icache.demand_mshr_misses          915079                       # number of demand (read+write) MSHR misses
system.cpu0.icache.fast_writes                      0                       # number of fast writes performed
system.cpu0.icache.mshr_cap_events                  0                       # number of times MSHR cap was activated
system.cpu0.icache.no_allocate_misses               0                       # Number of misses that were no-allocate
system.cpu0.icache.overall_accesses          57943269                       # number of overall (read+write) accesses
system.cpu0.icache.overall_avg_miss_latency 14213.482115                       # average overall miss latency
system.cpu0.icache.overall_avg_mshr_miss_latency 11212.730813                       # average overall mshr miss latency
system.cpu0.icache.overall_avg_mshr_uncacheable_latency <err: div-0>                       # average overall mshr uncacheable latency
system.cpu0.icache.overall_hits              57028190                       # number of overall hits
system.cpu0.icache.overall_miss_latency   13006459000                       # number of overall miss cycles
system.cpu0.icache.overall_miss_rate         0.015793                       # miss rate for overall accesses
system.cpu0.icache.overall_misses              915079                       # number of overall misses
system.cpu0.icache.overall_mshr_hits                0                       # number of overall MSHR hits
system.cpu0.icache.overall_mshr_miss_latency  10260534500                       # number of overall MSHR miss cycles
system.cpu0.icache.overall_mshr_miss_rate     0.015793                       # mshr miss rate for overall accesses
system.cpu0.icache.overall_mshr_misses         915079                       # number of overall MSHR misses
system.cpu0.icache.overall_mshr_uncacheable_latency            0                       # number of overall MSHR uncacheable cycles
system.cpu0.icache.overall_mshr_uncacheable_misses            0                       # number of overall MSHR uncacheable misses
system.cpu0.icache.prefetcher.num_hwpf_already_in_cache            0                       # number of hwpf that were already in the cache
system.cpu0.icache.prefetcher.num_hwpf_already_in_mshr            0                       # number of hwpf that were already in mshr
system.cpu0.icache.prefetcher.num_hwpf_already_in_prefetcher            0                       # number of hwpf that were already in the prefetch queue
system.cpu0.icache.prefetcher.num_hwpf_evicted            0                       # number of hwpf removed due to no buffer left
system.cpu0.icache.prefetcher.num_hwpf_identified            0                       # number of hwpf identified
system.cpu0.icache.prefetcher.num_hwpf_issued            0                       # number of hwpf issued
system.cpu0.icache.prefetcher.num_hwpf_removed_MSHR_hit            0                       # number of hwpf removed because MSHR allocated
system.cpu0.icache.prefetcher.num_hwpf_span_page            0                       # number of hwpf spanning a virtual page
system.cpu0.icache.prefetcher.num_hwpf_squashed_from_miss            0                       # number of hwpf that got squashed due to a miss aborting calculation time
system.cpu0.icache.replacements                914464                       # number of replacements
system.cpu0.icache.sampled_refs                914976                       # Sample count of references to valid blocks.
system.cpu0.icache.soft_prefetch_mshr_full            0                       # number of mshr full events for SW prefetching instrutions
system.cpu0.icache.tagsinuse               507.411447                       # Cycle average of tags in use
system.cpu0.icache.total_refs                57028190                       # Total number of references to valid blocks.
system.cpu0.icache.warmup_cycle           49269353000                       # Cycle when the warmup percentage was hit.
system.cpu0.icache.writebacks                       0                       # number of writebacks
system.cpu0.idle_fraction                    0.932800                       # Percentage of idle cycles
system.cpu0.itb.accesses                      3949472                       # ITB accesses
system.cpu0.itb.acv                               143                       # ITB acv
system.cpu0.itb.hits                          3945631                       # ITB hits
system.cpu0.itb.misses                           3841                       # ITB misses
system.cpu0.kern.callpal                       187580                       # number of callpals executed
system.cpu0.kern.callpal_cserve                     1      0.00%      0.00% # number of callpals executed
system.cpu0.kern.callpal_wripir                    94      0.05%      0.05% # number of callpals executed
system.cpu0.kern.callpal_wrmces                     1      0.00%      0.05% # number of callpals executed
system.cpu0.kern.callpal_wrfen                      1      0.00%      0.05% # number of callpals executed
system.cpu0.kern.callpal_wrvptptr                   1      0.00%      0.05% # number of callpals executed
system.cpu0.kern.callpal_swpctx                  3867      2.06%      2.11% # number of callpals executed
system.cpu0.kern.callpal_tbi                       44      0.02%      2.14% # number of callpals executed
system.cpu0.kern.callpal_wrent                      7      0.00%      2.14% # number of callpals executed
system.cpu0.kern.callpal_swpipl                171680     91.52%     93.66% # number of callpals executed
system.cpu0.kern.callpal_rdps                    6661      3.55%     97.22% # number of callpals executed
system.cpu0.kern.callpal_wrkgp                      1      0.00%     97.22% # number of callpals executed
system.cpu0.kern.callpal_wrusp                      4      0.00%     97.22% # number of callpals executed
system.cpu0.kern.callpal_rdusp                      7      0.00%     97.22% # number of callpals executed
system.cpu0.kern.callpal_whami                      2      0.00%     97.22% # number of callpals executed
system.cpu0.kern.callpal_rti                     4704      2.51%     99.73% # number of callpals executed
system.cpu0.kern.callpal_callsys                  356      0.19%     99.92% # number of callpals executed
system.cpu0.kern.callpal_imb                      149      0.08%    100.00% # number of callpals executed
system.cpu0.kern.inst.arm                           0                       # number of arm instructions executed
system.cpu0.kern.inst.hwrei                    202457                       # number of hwrei instructions executed
system.cpu0.kern.inst.quiesce                    6163                       # number of quiesce instructions executed
system.cpu0.kern.ipl_count                     178500                       # number of times we switched to this ipl
system.cpu0.kern.ipl_count_0                    72488     40.61%     40.61% # number of times we switched to this ipl
system.cpu0.kern.ipl_count_21                     131      0.07%     40.68% # number of times we switched to this ipl
system.cpu0.kern.ipl_count_22                    1977      1.11%     41.79% # number of times we switched to this ipl
system.cpu0.kern.ipl_count_30                       7      0.00%     41.79% # number of times we switched to this ipl
system.cpu0.kern.ipl_count_31                  103897     58.21%    100.00% # number of times we switched to this ipl
system.cpu0.kern.ipl_good                      144346                       # number of times we switched to this ipl from a different ipl
system.cpu0.kern.ipl_good_0                     71119     49.27%     49.27% # number of times we switched to this ipl from a different ipl
system.cpu0.kern.ipl_good_21                      131      0.09%     49.36% # number of times we switched to this ipl from a different ipl
system.cpu0.kern.ipl_good_22                     1977      1.37%     50.73% # number of times we switched to this ipl from a different ipl
system.cpu0.kern.ipl_good_30                        7      0.00%     50.74% # number of times we switched to this ipl from a different ipl
system.cpu0.kern.ipl_good_31                    71112     49.26%    100.00% # number of times we switched to this ipl from a different ipl
system.cpu0.kern.ipl_ticks               1972678821000                       # number of cycles we spent at this ipl
system.cpu0.kern.ipl_ticks_0             1900126420500     96.32%     96.32% # number of cycles we spent at this ipl
system.cpu0.kern.ipl_ticks_21                86973000      0.00%     96.33% # number of cycles we spent at this ipl
system.cpu0.kern.ipl_ticks_22               568583000      0.03%     96.36% # number of cycles we spent at this ipl
system.cpu0.kern.ipl_ticks_30                 5546500      0.00%     96.36% # number of cycles we spent at this ipl
system.cpu0.kern.ipl_ticks_31             71891298000      3.64%    100.00% # number of cycles we spent at this ipl
system.cpu0.kern.ipl_used_0                  0.981114                       # fraction of swpipl calls that actually changed the ipl
system.cpu0.kern.ipl_used_21                        1                       # fraction of swpipl calls that actually changed the ipl
system.cpu0.kern.ipl_used_22                        1                       # fraction of swpipl calls that actually changed the ipl
system.cpu0.kern.ipl_used_30                        1                       # fraction of swpipl calls that actually changed the ipl
system.cpu0.kern.ipl_used_31                 0.684447                       # fraction of swpipl calls that actually changed the ipl
system.cpu0.kern.mode_good_kernel                1228