m5stats.txt

来自「M5,一个功能强大的多处理器系统模拟器.很多针对处理器架构,性能的研究都使用它作」· 文本 代码 · 共 442 行 · 第 1/4 页

system.cpu.icache.prefetcher.num_hwpf_already_in_prefetcher            0                       # number of hwpf that were already in the prefetch queue
system.cpu.icache.prefetcher.num_hwpf_evicted            0                       # number of hwpf removed due to no buffer left
system.cpu.icache.prefetcher.num_hwpf_identified            0                       # number of hwpf identified
system.cpu.icache.prefetcher.num_hwpf_issued            0                       # number of hwpf issued
system.cpu.icache.prefetcher.num_hwpf_removed_MSHR_hit            0                       # number of hwpf removed because MSHR allocated
system.cpu.icache.prefetcher.num_hwpf_span_page            0                       # number of hwpf spanning a virtual page
system.cpu.icache.prefetcher.num_hwpf_squashed_from_miss            0                       # number of hwpf that got squashed due to a miss aborting calculation time
system.cpu.icache.replacements                      0                       # number of replacements
system.cpu.icache.sampled_refs                    182                       # Sample count of references to valid blocks.
system.cpu.icache.soft_prefetch_mshr_full            0                       # number of mshr full events for SW prefetching instrutions
system.cpu.icache.tagsinuse                 91.765219                       # Cycle average of tags in use
system.cpu.icache.total_refs                      500                       # Total number of references to valid blocks.
system.cpu.icache.warmup_cycle                      0                       # Cycle when the warmup percentage was hit.
system.cpu.icache.writebacks                        0                       # number of writebacks
system.cpu.idleCycles                             244                       # Total number of cycles that the CPU has spent unscheduled due to idling
system.cpu.iew.EXEC:branches                      542                       # Number of branches executed
system.cpu.iew.EXEC:nop                           277                       # number of nop insts executed
system.cpu.iew.EXEC:rate                     0.591187                       # Inst execution rate
system.cpu.iew.EXEC:refs                          939                       # number of memory reference insts executed
system.cpu.iew.EXEC:stores                        358                       # Number of stores executed
system.cpu.iew.EXEC:swp                             0                       # number of swp insts executed
system.cpu.iew.WB:consumers                      1788                       # num instructions consuming a value
system.cpu.iew.WB:count                          3104                       # cumulative count of insts written-back
system.cpu.iew.WB:fanout                     0.790828                       # average fanout of values written-back
system.cpu.iew.WB:penalized                         0                       # number of instrctions required to write to 'other' IQ
system.cpu.iew.WB:penalized_rate                    0                       # fraction of instructions written-back that wrote to 'other' IQ
system.cpu.iew.WB:producers                      1414                       # num instructions producing a value
system.cpu.iew.WB:rate                       0.574708                       # insts written-back per cycle
system.cpu.iew.WB:sent                           3141                       # cumulative count of insts sent to commit
system.cpu.iew.branchMispredicts                  150                       # Number of branch mispredicts detected at execute
system.cpu.iew.iewBlockCycles                       0                       # Number of cycles IEW is blocking
system.cpu.iew.iewDispLoadInsts                   703                       # Number of dispatched load instructions
system.cpu.iew.iewDispNonSpecInsts                  6                       # Number of dispatched non-speculative instructions
system.cpu.iew.iewDispSquashedInsts                98                       # Number of squashed instructions skipped by dispatch
system.cpu.iew.iewDispStoreInsts                  408                       # Number of dispatched store instructions
system.cpu.iew.iewDispatchedInsts                4070                       # Number of instructions dispatched to IQ
system.cpu.iew.iewExecLoadInsts                   581                       # Number of load instructions executed
system.cpu.iew.iewExecSquashedInsts                98                       # Number of squashed instructions skipped in execute
system.cpu.iew.iewExecutedInsts                  3193                       # Number of executed instructions
system.cpu.iew.iewIQFullEvents                      0                       # Number of times the IQ has become full, causing a stall
system.cpu.iew.iewIdleCycles                        0                       # Number of cycles IEW is idle
system.cpu.iew.iewLSQFullEvents                     0                       # Number of times the LSQ has become full, causing a stall
system.cpu.iew.iewSquashCycles                    290                       # Number of cycles IEW is squashing
system.cpu.iew.iewUnblockCycles                     0                       # Number of cycles IEW is unblocking
system.cpu.iew.lsq.thread.0.blockedLoads            0                       # Number of blocked loads due to partial load-store forwarding
system.cpu.iew.lsq.thread.0.cacheBlocked            0                       # Number of times an access to memory failed due to the cache being blocked
system.cpu.iew.lsq.thread.0.forwLoads              25                       # Number of loads that had data forwarded from stores
system.cpu.iew.lsq.thread.0.ignoredResponses            1                       # Number of memory responses ignored because the instruction is squashed
system.cpu.iew.lsq.thread.0.invAddrLoads            0                       # Number of loads ignored due to an invalid address
system.cpu.iew.lsq.thread.0.invAddrSwpfs            0                       # Number of software prefetches ignored due to an invalid address
system.cpu.iew.lsq.thread.0.memOrderViolation           11                       # Number of memory ordering violations
system.cpu.iew.lsq.thread.0.rescheduledLoads            0                       # Number of loads that were rescheduled
system.cpu.iew.lsq.thread.0.squashedLoads          288                       # Number of loads squashed
system.cpu.iew.lsq.thread.0.squashedStores          114                       # Number of stores squashed
system.cpu.iew.memOrderViolationEvents             11                       # Number of memory order violations
system.cpu.iew.predictedNotTakenIncorrect           98                       # Number of branches that were predicted not taken incorrectly
system.cpu.iew.predictedTakenIncorrect             52                       # Number of branches that were predicted taken incorrectly
system.cpu.ipc                               0.441955                       # IPC: Instructions Per Cycle
system.cpu.ipc_total                         0.441955                       # IPC: Total IPC of All Threads
system.cpu.iq.ISSUE:FU_type_0                    3291                       # Type of FU issued
system.cpu.iq.ISSUE:FU_type_0.start_dist
                      No_OpClass            0      0.00%            # Type of FU issued
                          IntAlu         2327     70.71%            # Type of FU issued
                         IntMult            1      0.03%            # Type of FU issued
                          IntDiv            0      0.00%            # Type of FU issued
                        FloatAdd            0      0.00%            # Type of FU issued
                        FloatCmp            0      0.00%            # Type of FU issued
                        FloatCvt            0      0.00%            # Type of FU issued
                       FloatMult            0      0.00%            # Type of FU issued
                        FloatDiv            0      0.00%            # Type of FU issued
                       FloatSqrt            0      0.00%            # Type of FU issued
                         MemRead          599     18.20%            # Type of FU issued
                        MemWrite          364     11.06%            # Type of FU issued
                       IprAccess            0      0.00%            # Type of FU issued
                    InstPrefetch            0      0.00%            # Type of FU issued
system.cpu.iq.ISSUE:FU_type_0.end_dist
system.cpu.iq.ISSUE:fu_busy_cnt                    35                       # FU busy when requested
system.cpu.iq.ISSUE:fu_busy_rate             0.010635                       # FU busy rate (busy events/executed inst)
system.cpu.iq.ISSUE:fu_full.start_dist
                      No_OpClass            0      0.00%            # attempts to use FU when none available
                          IntAlu            1      2.86%            # attempts to use FU when none available
                         IntMult            0      0.00%            # attempts to use FU when none available
                          IntDiv            0      0.00%            # attempts to use FU when none available
                        FloatAdd            0      0.00%            # attempts to use FU when none available
                        FloatCmp            0      0.00%            # attempts to use FU when none available
                        FloatCvt            0      0.00%            # attempts to use FU when none available
                       FloatMult            0      0.00%            # attempts to use FU when none available
                        FloatDiv            0      0.00%            # attempts to use FU when none available
                       FloatSqrt            0      0.00%            # attempts to use FU when none available
                         MemRead           12     34.29%            # attempts to use FU when none available
                        MemWrite           22     62.86%            # attempts to use FU when none available
                       IprAccess            0      0.00%            # attempts to use FU when none available
                    InstPrefetch            0      0.00%            # attempts to use FU when none available
system.cpu.iq.ISSUE:fu_full.end_dist
system.cpu.iq.ISSUE:issued_per_cycle.start_dist                     # Number of insts issued each cycle
system.cpu.iq.ISSUE:issued_per_cycle.samples         5157                      
system.cpu.iq.ISSUE:issued_per_cycle.min_value            0                      
                               0         3776   7322.09%           
                               1          540   1047.12%           
                               2          304    589.49%           
                               3          226    438.24%           
                               4          166    321.89%           
                               5           89    172.58%           
                               6           40     77.56%           
                               7           12     23.27%           
                               8            4      7.76%           
system.cpu.iq.ISSUE:issued_per_cycle.max_value            8                      
system.cpu.iq.ISSUE:issued_per_cycle.end_dist

system.cpu.iq.ISSUE:rate                     0.609332                       # Inst issue rate
system.cpu.iq.iqInstsAdded                       3787                       # Number of instructions added to the IQ (excludes non-spec)