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📄 protectedmodeudecoder.java

📁 JPC: x86 PC Hardware Emulator. 牛津大学开发的一个纯JAVA的x86系统结构硬件模拟器。
💻 JAVA
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	    else		working.write(JUMP_FAR_O16);	    break;	case 0xeb: working.write(JUMP_O8); break; //JMP Jb	case 0xf4: working.write(HALT); break; //HLT	case 0xf5: working.write(CMC); break; //CMC	case 0xf6: //UNA GP3 Eb	    switch (modrm & 0x38) {	    case 0x00:		working.write(AND); break;	    case 0x10:		working.write(NOT); break;	    case 0x18:		working.write(NEG); break;	    case 0x20:		working.write(MUL_O8); break;	    case 0x28:		working.write(IMULA_O8); break;	    case 0x30:		working.write(DIV_O8); break;	    case 0x38:		working.write(IDIV_O8); break;	    default: throw new IllegalStateException("Invalid Gp 3 Instruction?");	    }	    break;	case 0xf7: //UNA GP3 Ev	    if ((prefices & PREFICES_OPERAND) != 0) {		switch (modrm & 0x38) {		case 0x00:		    working.write(AND); break;		case 0x10:		    working.write(NOT); break;		case 0x18:		    working.write(NEG); break;		case 0x20:		    working.write(MUL_O32); break;		case 0x28:		    working.write(IMULA_O32); break;		case 0x30:		    working.write(DIV_O32); break;		case 0x38:		    working.write(IDIV_O32); break;		default: throw new IllegalStateException("Invalid Gp 3 Instruction?");		}	    } else {		switch (modrm & 0x38) {		case 0x00:		    working.write(AND); break;		case 0x10:		    working.write(NOT); break;		case 0x18:		    working.write(NEG); break;		case 0x20:		    working.write(MUL_O16); break;		case 0x28:		    working.write(IMULA_O16); break;		case 0x30:		    working.write(DIV_O16); break;		case 0x38:		    working.write(IDIV_O16); break;		default: throw new IllegalStateException("Invalid Gp 3 Instruction?");		}	    }	    break;	case 0xf8: working.write(CLC); break; //CLC	case 0xf9: working.write(STC); break; //STC	case 0xfa: working.write(CLI); break; //CLI	case 0xfb: working.write(STI); break; //STI	case 0xfc: working.write(CLD); break; //CLD	case 0xfd: working.write(STD); break; //STD	case 0xfe:	    switch (modrm & 0x38) {	    case 0x00: //INC Eb		working.write(INC); break;	    case 0x08: //DEC Eb		working.write(DEC); break;	    default: throw new IllegalStateException("Invalid Gp 4 Instruction?");	    }	    break;	case 0xff:	    switch (modrm & 0x38) {	    case 0x00: //INC Ev		working.write(INC); break;	    case 0x08: //DEC Ev		working.write(DEC); break;	    case 0x10:		switch (prefices & (PREFICES_OPERAND | PREFICES_ADDRESS)) {		case 0:		    working.write(CALL_ABS_O16_A16); break;		case PREFICES_OPERAND:		    working.write(CALL_ABS_O32_A16); break;		case PREFICES_ADDRESS:		    working.write(CALL_ABS_O16_A32); break;		case PREFICES_ADDRESS | PREFICES_OPERAND:		    working.write(CALL_ABS_O32_A32); break;		}		break;	    case 0x18:		switch (prefices & (PREFICES_OPERAND | PREFICES_ADDRESS)) {		case 0:		    working.write(CALL_FAR_O16_A16); break;		case PREFICES_OPERAND:		    working.write(CALL_FAR_O32_A16); break;		case PREFICES_ADDRESS:		    working.write(CALL_FAR_O16_A32); break;		case PREFICES_ADDRESS | PREFICES_OPERAND:		    working.write(CALL_FAR_O32_A32); break;		}		break;	    case 0x20:		if ((prefices & PREFICES_OPERAND) != 0)		    working.write(JUMP_ABS_O32);		else		    working.write(JUMP_ABS_O16);		break;	    case 0x28:		if ((prefices & PREFICES_OPERAND) != 0)		    working.write(JUMP_FAR_O32);		else		    working.write(JUMP_FAR_O16);		break;	    case 0x30:		switch (prefices & (PREFICES_OPERAND | PREFICES_ADDRESS)) {		case 0:		    working.write(PUSH_O16_A16); break;		case PREFICES_OPERAND:		    working.write(PUSH_O32_A16); break;		case PREFICES_ADDRESS:		    working.write(PUSH_O16_A32); break;		case PREFICES_ADDRESS | PREFICES_OPERAND:		    working.write(PUSH_O32_A32); break;		}		break;	    default: throw new IllegalStateException("Invalid Gp 5 Instruction?");	    }	    break;	    //case 0x63: working.write(UNDEFINED); break; //ARPL	case 0x86: //XCHG Eb, Gb	case 0x87: //XCHG Ev, Gv	case 0x88: //MOV Eb, Gb	case 0x89: //MOV Ev, Gv	case 0x8a: //MOV Gb, Eb	case 0x8b: //MOV Gv, Ev	case 0x8c: //MOV Ew, Sw	case 0x8d: //LEA Gv, M	case 0x8e: //MOV Sw, Ew	case 0x90: //NOP	case 0x91: //XCHG eAX, eCX	case 0x92: //XCHG eAX, eCX	case 0x93: //XCHG eAX, eCX	case 0x94: //XCHG eAX, eCX	case 0x95: //XCHG eAX, eCX	case 0x96: //XCHG eAX, eCX	case 0x97: //XCHG eAX, eCX	case 0xa0: //MOV AL, Ob	case 0xa1: //MOV eAX, Ov	case 0xa2: //MOV Ob, AL	case 0xa3: //MOV Ov, eAX	case 0xb0: //MOV AL, Ib	case 0xb1: //MOV CL, Ib	case 0xb2: //MOV DL, Ib	case 0xb3: //MOV BL, Ib	case 0xb4: //MOV AH, Ib	case 0xb5: //MOV CH, Ib	case 0xb6: //MOV DH, Ib	case 0xb7: //MOV BH, Ib	case 0xb8: //MOV eAX, Iv	case 0xb9: //MOV eCX, Iv	case 0xba: //MOV eDX, Iv	case 0xbb: //MOV eBX, Iv	case 0xbc: //MOV eSP, Iv	case 0xbd: //MOV eBP, Iv	case 0xbe: //MOV eSI, Iv	case 0xbf: //MOV eDI, Iv	case 0xc4: //LES	case 0xc5: //LDS	case 0xc6: //MOV GP11 Eb, Gb	case 0xc7: //MOV GP11 Ev, Gv	case 0xd7: //XLAT	    break;	default:	    System.out.println("undecoded instruction 0x"+ Integer.toHexString(opcode));	    throw new IllegalStateException("Missing Operation: 0x" + Integer.toHexString(opcode));	    //2 Byte Operations	case 0xf00: // Group 6	    switch (modrm & 0x38) {	    case 0x00:		working.write(SLDT); break;	    case 0x08:		working.write(STR); break;	    case 0x10:		working.write(LLDT); break;	    case 0x18:		working.write(LTR); break;	    case 0x20:		working.write(VERR); break;	    case 0x28:		working.write(VERW); break;	    default: throw new IllegalStateException("Invalid Gp 6 Instruction?");	    } break;	    	case 0xf01:	    switch (modrm & 0x38) {	    case 0x00:		if ((prefices & PREFICES_OPERAND) != 0)		    working.write(SGDT_O32);		else		    working.write(SGDT_O16);		break;	    case 0x08:		if ((prefices & PREFICES_OPERAND) != 0)		    working.write(SIDT_O32);		else		    working.write(SIDT_O16);		break;	    case 0x10:		if ((prefices & PREFICES_OPERAND) != 0)		    working.write(LGDT_O32);		else		    working.write(LGDT_O16);		break;	    case 0x18:		if ((prefices & PREFICES_OPERAND) != 0)		    working.write(LIDT_O32);		else		    working.write(LIDT_O16);		break;	    case 0x20:		working.write(SMSW); break;	    case 0x30:		working.write(LMSW); break;	    case 0x38:		working.write(INVLPG); break;	    default: throw new IllegalStateException("Invalid Gp 7 Instruction?");	    } break;	case 0xf02: // not thoroughly tested yet Load access right byte	    if ((prefices & PREFICES_OPERAND) != 0)		working.write(LAR_O32); 	    else		working.write(LAR_O16); 	    break;	case 0xf03: // not thoroughly tested yet Load Segment size right byte	    if ((prefices & PREFICES_OPERAND) != 0)		working.write(LSL_O32); 	    else		working.write(LSL_O16); 	    break;	case 0xf06: working.write(CLTS); break; //CLTS	case 0xf30: working.write(WRMSR); break; //WRMSR	case 0xf31: working.write(RDTSC); break; //RDTSC	case 0xf32: working.write(RDMSR); break; //RDMSR	case 0xf34: working.write(SYSENTER); break; //SYSENTER	case 0xf35: working.write(SYSEXIT); break; //SYSEXIT	case 0xf40: working.write(CMOVO); break; //CMOVO	case 0xf41: working.write(CMOVNO); break; //CMOVNO	case 0xf42: working.write(CMOVC); break; //CMOVC	case 0xf43: working.write(CMOVNC); break; //CMOVNC	case 0xf44: working.write(CMOVZ); break; //CMOVZ	case 0xf45: working.write(CMOVNZ); break; //CMOVNZ	case 0xf46: working.write(CMOVNA); break; //CMOVNA	case 0xf47: working.write(CMOVA); break; //CMOVA	case 0xf48: working.write(CMOVS); break; //CMOVS	case 0xf49: working.write(CMOVNS); break; //CMOVNS	case 0xf4a: working.write(CMOVP); break; //CMOVP	case 0xf4b: working.write(CMOVNP); break; //CMOVNP	case 0xf4c: working.write(CMOVL); break; //CMOVL	case 0xf4d: working.write(CMOVNL); break; //CMOVNL	case 0xf4e: working.write(CMOVNG); break; //CMOVNG	case 0xf4f: working.write(CMOVG); break; //CMOVG	case 0xf80: if ((prefices & PREFICES_OPERAND) != 0)	    working.write(JO_O32);	else	    working.write(JO_O16);	    break; //JO Jb	case 0xf81: if ((prefices & PREFICES_OPERAND) != 0)	    working.write(JNO_O32);	else	    working.write(JNO_O16);	    break; //JNO Jb	case 0xf82: if ((prefices & PREFICES_OPERAND) != 0)	    working.write(JC_O32); 	else	    working.write(JC_O16);	    break;  //JC Jb	case 0xf83: if ((prefices & PREFICES_OPERAND) != 0)	    working.write(JNC_O32);	else	    working.write(JNC_O16);	    break; //JNC Jb	case 0xf84: if ((prefices & PREFICES_OPERAND) != 0)	    working.write(JZ_O32); 	else	    working.write(JZ_O16);	    break;  //JZ Jb	case 0xf85: if ((prefices & PREFICES_OPERAND) != 0)	    working.write(JNZ_O32);	else	    working.write(JNZ_O16);	    break; //JNZ Jb	case 0xf86: if ((prefices & PREFICES_OPERAND) != 0)	    working.write(JNA_O32);	else	    working.write(JNA_O16);	    break; //JNA Jb	case 0xf87: if ((prefices & PREFICES_OPERAND) != 0)	    working.write(JA_O32);	else	    working.write(JA_O16);	    break;  //JA Jb	case 0xf88: if ((prefices & PREFICES_OPERAND) != 0)	    working.write(JS_O32);	else	    working.write(JS_O16);	    break;  //JS Jb 	case 0xf89: if ((prefices & PREFICES_OPERAND) != 0)	    working.write(JNS_O32);	else	    working.write(JNS_O16);	    break; //JNS Jb	case 0xf8a: if ((prefices & PREFICES_OPERAND) != 0)	    working.write(JP_O32);	else	    working.write(JP_O16);	    break;  //JP Jb 	case 0xf8b: if ((prefices & PREFICES_OPERAND) != 0)	    working.write(JNP_O32);	else	    working.write(JNP_O16);	    break; //JNP Jb	case 0xf8c: if ((prefices & PREFICES_OPERAND) != 0)	    working.write(JL_O32);	else	    working.write(JL_O16);	    break;  //JL Jb 	case 0xf8d: if ((prefices & PREFICES_OPERAND) != 0)	    working.write(JNL_O32);	else	    working.write(JNL_O16);	    break; //JNL Jb	case 0xf8e: if ((prefices & PREFICES_OPERAND) != 0)	    working.write(JNG_O32);	else	    working.write(JNG_O16);	    break;  //JNG Jb 	case 0xf8f: if ((prefices & PREFICES_OPERAND) != 0)	    working.write(JG_O32);	else	    working.write(JG_O16);	    break; //JG Jb	case 0xf90: working.write(SETO); break; //SETO	case 0xf91: working.write(SETNO); break; //SETNO	case 0xf92: working.write(SETC); break; //SETC	case 0xf93: working.write(SETNC); break; //SETNC	case 0xf94: working.write(SETZ); break; //SETZ	case 0xf95: working.write(SETNZ); break; //SETNZ	case 0xf96: working.write(SETNA); break; //SETNA	case 0xf97: working.write(SETA); break; //SETA	case 0xf98: working.write(SETS); break; //SETS	case 0xf99: working.write(SETNS); break; //SETNS	case 0xf9a: working.write(SETP); break; //SETP	case 0xf9b: working.write(SETNP); break; //SETNP	case 0xf9c: working.write(SETL); break; //SETL	case 0xf9d: working.write(SETNL); break; //SETNL	case 0xf9e: working.write(SETNG); break; //SETNG	case 0xf9f: working.write(SETG); break; //SETG	case 0xfa2: working.write(CPUID); break; //CPUID	case 0xfa4: //SHLD Ev, Gv, Ib	case 0xfa5: //SHLD Ev, Gv, CL	    if ((prefices & PREFICES_OPERAND) != 0)		working.write(SHLD_O32);	    else		working.write(SHLD_O16);	    break;      	case 0xfac: //SHRD Ev, Gv, Ib	case 0xfad: //SHRD Ev, Gv, CL	    if ((prefices & PREFICES_OPERAND) != 0)		working.write(SHRD_O32);	    else		working.write(SHRD_O16);	    break;		  	case 0xfb0: //CMPXCHG Eb, Gb	case 0xfb1: //CMPXCHG Ev, Gv	    working.write(CMPXCHG); break;	case 0xfa3: //BT Ev, Gv	    switch (modrm & 0xc7) {	    default: working.write(BT_MEM); break;			    case 0xc0:	    case 0xc1:	    case 0xc2:	    case 0xc3:	    case 0xc4:	    case 0xc5:	    case 0xc6:	    case 0xc7:		if ((prefices & PREFICES_OPERAND) != 0)		    working.write(BT_O32);		else		    working.write(BT_O16);		break;	    } break;	   	case 0xfab: //BTS Ev, Gv	    switch (modrm & 0xc7) {	    default: working.write(BTS_MEM); break;			    case 0xc0:	    case 0xc1:	    case 0xc2:	    case 0xc3:	    case 0xc4:	    case 0xc5:	    case 0xc6:	    case 0xc7:		if ((prefices & PREFICES_OPERAND) != 0)		    working.write(BTS_O32);		else		    working.write(BTS_O16);		break;	    } break;	     	case 0xfb3: //BTR Ev, Gv	    switch (modrm & 0xc7) {	    default: working.write(BTR_MEM); break;		

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