protectedmodeublock.java

JPC: x86 PC Hardware Emulator. 牛津大学开发的一个纯JAVA的x86系统结构硬件模拟器。

		case LOAD1_ID: reg1 = microcodes[position++]; break;

		case LOAD2_EAX: reg2 = cpu.eax; break;
		case LOAD2_AX: reg2 = cpu.eax & 0xffff; break;
		case LOAD2_AL: reg2 = cpu.eax & 0xff; break;
		case LOAD2_CL: reg2 = cpu.ecx & 0xffff; break;
		case LOAD2_IB: reg2 = microcodes[position++] & 0xff; break;
		    
		case LOAD_SEG_ES: seg0 = cpu.es; break;
		case LOAD_SEG_CS: seg0 = cpu.cs; break;
		case LOAD_SEG_SS: seg0 = cpu.ss; break;
		case LOAD_SEG_DS: seg0 = cpu.ds; break;
		case LOAD_SEG_FS: seg0 = cpu.fs; break;
		case LOAD_SEG_GS: seg0 = cpu.gs; break;

		case ADDR_REG1:  addr0 += reg1; break;
		case ADDR_2REG1: addr0 += (reg1 << 1); break;
		case ADDR_4REG1: addr0 += (reg1 << 2); break;
		case ADDR_8REG1: addr0 += (reg1 << 3); break;

		case ADDR_EAX: addr0 += cpu.eax; break;
		case ADDR_ECX: addr0 += cpu.ecx; break;
		case ADDR_EDX: addr0 += cpu.edx; break;
		case ADDR_EBX: addr0 += cpu.ebx; break;
		case ADDR_ESP: addr0 += cpu.esp; break;
		case ADDR_EBP: addr0 += cpu.ebp; break;
		case ADDR_ESI: addr0 += cpu.esi; break;
		case ADDR_EDI: addr0 += cpu.edi; break;
	    
		case ADDR_AX: addr0 += ((short)cpu.eax); break;
		case ADDR_CX: addr0 += ((short)cpu.ecx); break;
		case ADDR_DX: addr0 += ((short)cpu.edx); break;
		case ADDR_BX: addr0 += ((short)cpu.ebx); break;
		case ADDR_SP: addr0 += ((short)cpu.esp); break;
		case ADDR_BP: addr0 += ((short)cpu.ebp); break;
		case ADDR_SI: addr0 += ((short)cpu.esi); break;
		case ADDR_DI: addr0 += ((short)cpu.edi); break;
	    
		case ADDR_2EAX: addr0 += (cpu.eax << 1); break;
		case ADDR_2ECX: addr0 += (cpu.ecx << 1); break;
		case ADDR_2EDX: addr0 += (cpu.edx << 1); break;
		case ADDR_2EBX: addr0 += (cpu.ebx << 1); break;
		case ADDR_2ESP: addr0 += (cpu.esp << 1); break;
		case ADDR_2EBP: addr0 += (cpu.ebp << 1); break;
		case ADDR_2ESI: addr0 += (cpu.esi << 1); break;
		case ADDR_2EDI: addr0 += (cpu.edi << 1); break;
	    
		case ADDR_4EAX: addr0 += (cpu.eax << 2); break;
		case ADDR_4ECX: addr0 += (cpu.ecx << 2); break;
		case ADDR_4EDX: addr0 += (cpu.edx << 2); break;
		case ADDR_4EBX: addr0 += (cpu.ebx << 2); break;
		case ADDR_4ESP: addr0 += (cpu.esp << 2); break;
		case ADDR_4EBP: addr0 += (cpu.ebp << 2); break;
		case ADDR_4ESI: addr0 += (cpu.esi << 2); break;
		case ADDR_4EDI: addr0 += (cpu.edi << 2); break;
	    
		case ADDR_8EAX: addr0 += (cpu.eax << 3); break;
		case ADDR_8ECX: addr0 += (cpu.ecx << 3); break;
		case ADDR_8EDX: addr0 += (cpu.edx << 3); break;
		case ADDR_8EBX: addr0 += (cpu.ebx << 3); break;
		case ADDR_8ESP: addr0 += (cpu.esp << 3); break;
		case ADDR_8EBP: addr0 += (cpu.ebp << 3); break;
		case ADDR_8ESI: addr0 += (cpu.esi << 3); break;
		case ADDR_8EDI: addr0 += (cpu.edi << 3); break;
	    
		case ADDR_IB: addr0 += ((byte)microcodes[position++]); break;
		case ADDR_IW: addr0 += ((short)microcodes[position++]); break;
		case ADDR_ID: addr0 += microcodes[position++]; break;
	    
		case ADDR_MASK16: addr0 &= 0xffff; break;
	    
		case ADDR_uAL: addr0 += 0xff & cpu.eax; break;

		case LOAD0_ADDR: reg0 = addr0; break;

		case LOAD0_MEM_BYTE:  reg0 = 0xff & seg0.getByte(addr0); break;
		case LOAD0_MEM_WORD:  reg0 = 0xffff & seg0.getWord(addr0); break; 
		case LOAD0_MEM_DWORD: reg0 = seg0.getDoubleWord(addr0); break;
                case LOAD0_MEM_QWORD: reg0l = seg0.getQuadWord(addr0); break;

		case LOAD1_MEM_BYTE:  reg1 = 0xff & seg0.getByte(addr0); break;
		case LOAD1_MEM_WORD:  reg1 = 0xffff & seg0.getWord(addr0); break; 
		case LOAD1_MEM_DWORD: reg1 = seg0.getDoubleWord(addr0); break;

		case STORE0_MEM_BYTE:  seg0.setByte(addr0, (byte)reg0); break;
		case STORE0_MEM_WORD:  seg0.setWord(addr0, (short)reg0); break; 
		case STORE0_MEM_DWORD: seg0.setDoubleWord(addr0, reg0); break;
		case STORE0_MEM_QWORD: seg0.setQuadWord(addr0, reg0l); break;

		case STORE1_MEM_BYTE:  seg0.setByte(addr0, (byte)reg1); break;
		case STORE1_MEM_WORD:  seg0.setWord(addr0, (short)reg1); break; 
		case STORE1_MEM_DWORD: seg0.setDoubleWord(addr0, reg1); break;

		case XOR: reg0 ^= reg1; break;
		case AND: reg0 &= reg1; break;
		case OR:  reg0 |= reg1; break;
		case NOT: reg0 = ~reg0; break;

		case SUB: reg2 = reg0; reg0 = reg2 - reg1; break;
		case SBB: reg2 = reg0; reg0 = reg2 - (reg1 + (cpu.getCarryFlag() ? 1 : 0)); break;
		case ADD: reg2 = reg0; reg0 = reg2 + reg1; break;
		case ADC: reg2 = reg0; reg0 = reg2 + reg1 + (cpu.getCarryFlag() ? 1 : 0); break;
		case NEG: reg0 = -reg0; break;

		case MUL_O8: mul_o8(reg0); break;
		case MUL_O16: mul_o16(reg0); break;
		case MUL_O32: mul_o32(reg0); break;

		case IMULA_O8: imula_o8((byte)reg0); break;
		case IMULA_O16: imula_o16((short)reg0); break;
		case IMULA_O32: imula_o32(reg0); break;

		case IMUL_O16: reg0 = imul_o16((short)reg0, (short)reg1); break;
		case IMUL_O32: reg0 = imul_o32(reg0, reg1); break;

		case DIV_O8: div_o8(reg0); break;
		case DIV_O16: div_o16(reg0); break;
		case DIV_O32: div_o32(reg0); break;

		case IDIV_O8: idiv_o8((byte)reg0); break;
		case IDIV_O16: idiv_o16((short)reg0); break;
		case IDIV_O32: idiv_o32(reg0); break;

		case BSF: reg0 = bsf(reg1, reg0); break;
		case BSR: reg0 = bsr(reg1, reg0); break;

		case BT_MEM: bt_mem(reg1, seg0, addr0); break;
		case BTS_MEM: bts_mem(reg1, seg0, addr0); break;
		case BTR_MEM: btr_mem(reg1, seg0, addr0); break;
		case BTC_MEM: btc_mem(reg1, seg0, addr0); break;

		case BT_O32:  reg1 &= 0x1f; cpu.setCarryFlag(reg0, reg1, Processor.CY_NTH_BIT_SET); break;
		case BT_O16:  reg1 &= 0xf;  cpu.setCarryFlag(reg0, reg1, Processor.CY_NTH_BIT_SET); break;
		case BTS_O32: reg1 &= 0x1f; cpu.setCarryFlag(reg0, reg1, Processor.CY_NTH_BIT_SET); reg0 |= (1 << reg1); break;
		case BTS_O16: reg1 &= 0xf;  cpu.setCarryFlag(reg0, reg1, Processor.CY_NTH_BIT_SET); reg0 |= (1 << reg1); break;
		case BTR_O32: reg1 &= 0x1f; cpu.setCarryFlag(reg0, reg1, Processor.CY_NTH_BIT_SET); reg0 &= ~(1 << reg1); break;
		case BTR_O16: reg1 &= 0xf;  cpu.setCarryFlag(reg0, reg1, Processor.CY_NTH_BIT_SET); reg0 &= ~(1 << reg1); break;
		case BTC_O32: reg1 &= 0x1f; cpu.setCarryFlag(reg0, reg1, Processor.CY_NTH_BIT_SET); reg0 ^= (1 << reg1); break;
		case BTC_O16: reg1 &= 0xf;  cpu.setCarryFlag(reg0, reg1, Processor.CY_NTH_BIT_SET); reg0 ^= (1 << reg1); break;

		case ROL_O8:  reg1 &= 0x7;  reg0 = (reg0 << reg1) | (reg0 >>> (8 - reg1));  break;
		case ROL_O16: reg1 &= 0xf;  reg0 = (reg0 << reg1) | (reg0 >>> (16 - reg1)); break;
		case ROL_O32: reg1 &= 0x1f; reg0 = (reg0 << reg1) | (reg0 >>> (32 - reg1)); break;

		case ROR_O8:  reg1 &= 0x7;  reg0 = (reg0 >>> reg1) | (reg0 << (8 - reg1));  break;
		case ROR_O16: reg1 &= 0xf;  reg0 = (reg0 >>> reg1) | (reg0 << (16 - reg1)); break;
		case ROR_O32: reg1 &= 0x1f; reg0 = (reg0 >>> reg1) | (reg0 << (32 - reg1)); break;

		case RCL_O8: reg1 &= 0x1f; reg1 %= 9; reg0 |= (cpu.getCarryFlag() ? 0x100 : 0);
		    reg0 = (reg0 << reg1) | (reg0 >>> (9 - reg1));  break;
		case RCL_O16: reg1 &= 0x1f; reg1 %= 17; reg0 |= (cpu.getCarryFlag() ? 0x10000 : 0);
		    reg0 = (reg0 << reg1) | (reg0 >>> (17 - reg1)); break;
		case RCL_O32: reg1 &= 0x1f; reg0l = (0xffffffffl & reg0) | (cpu.getCarryFlag() ? 0x100000000l : 0);
		    reg0 = (int)(reg0l = (reg0l << reg1) | (reg0l >>> (33 - reg1))); break;

		case RCR_O8: reg1 &= 0x1f; reg1 %= 9; reg0 |= (cpu.getCarryFlag() ? 0x100 : 0);
		    reg0 = (reg0 >>> reg1) | (reg0 << (9 - reg1));  break;
		case RCR_O16: reg1 &= 0x1f; reg1 %= 17; reg0 |= (cpu.getCarryFlag() ? 0x10000 : 0);
		    reg0 = (reg0 >>> reg1) | (reg0 << (17 - reg1)); break;
		case RCR_O32: reg1 &= 0x1f; reg0l = (0xffffffffl & reg0) | (cpu.getCarryFlag() ? 0x100000000l : 0);
		    reg0 = (int)(reg0l = (reg0l >>> reg1) | (reg0l << (33 - reg1))); break;

		case SHL: reg2 = reg0; reg0 <<= reg1; break;
		case SHR: reg2 = reg0; reg0 >>>= reg1; break;
		case SAR_O8: reg2 = reg0; reg0 = ((byte)reg0) >> reg1; break;
		case SAR_O16: reg2 = reg0; reg0 = ((short)reg0) >> reg1; break;
		case SAR_O32: reg2 = reg0; reg0 >>= reg1; break;

		case SHLD_O16: {
		    int i = reg0; reg2 &= 0x1f;
		    reg0 = (reg0 << reg2) | (reg1 >>> (16 - reg2));
		    reg1 = reg2; reg2 = i;
		} break;
		case SHLD_O32: {
		    int i = reg0; reg2 &= 0x1f;
		    if (reg2 != 0)
			reg0 = (reg0 << reg2) | (reg1 >>> (32 - reg2));
		    reg1 = reg2; reg2 = i;
		} break;

		case SHRD_O16: {
		    int i = reg0; reg2 &= 0x1f;
		    reg0 = (reg0 >>> reg2) | (reg1 << (16 - reg2));
		    reg1 = reg2; reg2 = i;
		} break;
		case SHRD_O32: {
		    int i = reg0; reg2 &= 0x1f;
		    if (reg2 != 0) 
			reg0 = (reg0 >>> reg2) | (reg1 << (32 - reg2));
		    reg1 = reg2; reg2 = i;
		} break;

		case CWD: if ((cpu.eax & 0x8000) == 0) cpu.edx &= 0xffff0000; else cpu.edx |= 0x0000ffff; break;
		case CDQ: if ((cpu.eax & 0x80000000) == 0) cpu.edx = 0; else cpu.edx = -1; break;

		case AAA: aaa(); break;
		case AAD: aad(reg0); break;
		case AAM: aam(reg0); break;
		case AAS: aas(); break;

		case DAA: daa(); break;
		case DAS: das(); break;

		case LAHF: lahf(); break;
		case SAHF: sahf(); break;

		case CLC: cpu.setCarryFlag(false); break;
		case STC: cpu.setCarryFlag(true); break;
		case CLI: cpu.eflagsInterruptEnable = cpu.eflagsInterruptEnableSoon = false; break;
		case STI: cpu.eflagsInterruptEnable = cpu.eflagsInterruptEnableSoon = true; break;
		case CLD: cpu.eflagsDirection = false; break;
		case STD: cpu.eflagsDirection = true; break;
		case CMC: cpu.setCarryFlag(cpu.getCarryFlag() ^ true); break;

		case SIGN_EXTEND_8_16: reg0 = 0xffff & ((byte)reg0); break;
		case SIGN_EXTEND_8_32: reg0 = (byte)reg0; break;
		case SIGN_EXTEND_16_32: reg0 = (short)reg0; break;

		case INC: reg0++; break;
		case DEC: reg0--; break;

                case FWAIT: fpu.checkExceptions(); break;
		case HALT: halt(); break;

		case JO_O8:  jo_o8((byte)reg0); break;
		case JNO_O8: jno_o8((byte)reg0); break;
		case JC_O8:  jc_o8((byte)reg0); break;
		case JNC_O8: jnc_o8((byte)reg0); break;
		case JZ_O8:  jz_o8((byte)reg0); break;
		case JNZ_O8: jnz_o8((byte)reg0); break;
		case JNA_O8: jna_o8((byte)reg0); break;
		case JA_O8:  ja_o8((byte)reg0); break;
		case JS_O8:  js_o8((byte)reg0); break;
		case JNS_O8: jns_o8((byte)reg0); break;
		case JP_O8:  jp_o8((byte)reg0); break;
		case JNP_O8: jnp_o8((byte)reg0); break;
		case JL_O8:  jl_o8((byte)reg0); break;
		case JNL_O8: jnl_o8((byte)reg0); break;
		case JNG_O8: jng_o8((byte)reg0); break;
		case JG_O8:  jg_o8((byte)reg0); break;

		case JO_O16:  jo_o16((short)reg0); break;
		case JNO_O16: jno_o16((short)reg0); break;
		case JC_O16:  jc_o16((short)reg0); break;
		case JNC_O16: jnc_o16((short)reg0); break;
		case JZ_O16:  jz_o16((short)reg0); break;
		case JNZ_O16: jnz_o16((short)reg0); break;
		case JNA_O16: jna_o16((short)reg0); break;
		case JA_O16:  ja_o16((short)reg0); break;
		case JS_O16:  js_o16((short)reg0); break;
		case JNS_O16: jns_o16((short)reg0); break;
		case JP_O16:  jp_o16((short)reg0); break;
		case JNP_O16: jnp_o16((short)reg0); break;
		case JL_O16:  jl_o16((short)reg0); break;
		case JNL_O16: jnl_o16((short)reg0); break;
		case JNG_O16: jng_o16((short)reg0); break;
		case JG_O16:  jg_o16((short)reg0); break;

		case JO_O32:  jo_o32(reg0); break;
		case JNO_O32: jno_o32(reg0); break;
		case JC_O32:  jc_o32(reg0); break;
		case JNC_O32: jnc_o32(reg0); break;
		case JZ_O32:  jz_o32(reg0); break;
		case JNZ_O32: jnz_o32(reg0); break;
		case JNA_O32: jna_o32(reg0); break;
		case JA_O32:  ja_o32(reg0); break;
		case JS_O32:  js_o32(reg0); break;
		case JNS_O32: jns_o32(reg0); break;
		case JP_O32:  jp_o32(reg0); break;
		case JNP_O32: jnp_o32(reg0); break;
		case JL_O32:  jl_o32(reg0); break;
		case JNL_O32: jnl_o32(reg0); break;
		case JNG_O32: jng_o32(reg0); break;
		case JG_O32:  jg_o32(reg0); break;

		case JCXZ: jcxz((byte)reg0); break;
		case JECXZ: jecxz((byte)reg0); break;
		
		case LOOP_CX: loop_cx((byte)reg0); break;
		case LOOP_ECX: loop_ecx((byte)reg0); break;
		case LOOPZ_ECX: loopz_ecx((byte)reg0); break;
		case LOOPNZ_CX: loopnz_cx((byte)reg0); break;
		case LOOPNZ_ECX: loopnz_ecx((byte)reg0); break;

		case JUMP_O8:  jump_o8((byte)reg0); break;
		case JUMP_O16: jump_o16((short)reg0); break;
		case JUMP_O32: jump_o32(reg0); break;

		case JUMP_ABS_O16: jump_abs(reg0); break;
		case JUMP_ABS_O32: jump_abs(reg0); break;

		case JUMP_FAR_O16: jump_far(reg0, reg1); break;
		case JUMP_FAR_O32: jump_far(reg0, reg1); break;


		case CALL_O16_A16:
		case CALL_O16_A32: 
		    if (cpu.ss.getDefaultSizeFlag())
			call_o16_a32(reg0);
		    else
			call_o16_a16(reg0);
		    break;

		case CALL_O32_A32:
		case CALL_O32_A16: 
		    if (cpu.ss.getDefaultSizeFlag())
			call_o32_a32(reg0);
		    else
			call_o32_a32(reg0);
		    break;
			
		case CALL_ABS_O16_A32:
		case CALL_ABS_O16_A16: {
		    if (cpu.ss.getDefaultSizeFlag())
			call_abs_o16_a32(reg0);
		    else
			call_abs_o16_a16(reg0);
		} break;

		case CALL_ABS_O32_A32:
		case CALL_ABS_O32_A16: {
		    if (cpu.ss.getDefaultSizeFlag())
			call_abs_o32_a32(reg0);
		    else
			call_abs_o32_a16(reg0);
		} break;

		case CALL_FAR_O16_A32:
		case CALL_FAR_O16_A16: {
		    if (cpu.ss.getDefaultSizeFlag())
			call_far_o16_a32(reg0, reg1);
		    else
			call_far_o16_a16(reg0, reg1);
		} break;

		case CALL_FAR_O32_A32:
		case CALL_FAR_O32_A16: {
		    if (cpu.ss.getDefaultSizeFlag())
			call_far_o32_a32(reg0, reg1);
		    else
			call_far_o32_a16(reg0, reg1);
		} break;