dsp6713.c.bak

c6713的源代码

/* PLL  SDRAM  FLASH测试部分代码 */
#include "IMU_GW.h"

////////////////////////////////////////////////////
//read_flash()
unsigned short read_flash(unsigned int addr)
{
    unsigned short data;
	data= *(unsigned short*)(FLASH_BASE+(addr<<1));
	return data;
}

////////////////////////////////////////////////////
//TestFlashID()
BOOL TestFlashID()
{
    unsigned short MfgId,DevId;
    unsigned short i;
    
    /* Configure to read manufacturer ID */
    *((volatile unsigned short * ) FLASH_CTL555)= 0xaa;
    *((volatile unsigned short * ) FLASH_CTL2AA)= 0x55;
    *((volatile unsigned short * ) FLASH_CTL555)= 0x90;
    
    for (i = 0; i < 10000; i++);
    
    /* Read IDs */
    MfgId = *((unsigned short *) FLASH_BASE);     
    DevId = *((unsigned short *)(FLASH_BASE + 2)); 

    /* Reset flash */
    *((unsigned short *)FLASH_BASE) = 0xf0;

    /* Check IDs */
	//S29AL016D Device ID,Bottom Boot Block=2249;Top Boot Block=22C4 
    if ((MfgId != 0x01) || (DevId != 0x2249))
	{   
    	return (0);
	}
    else
	{
        return (1);
	}
}

////////////////////////////////////////////////////
//chip_erase()  //erase the whole chip
BOOL chip_erase() 
{
	unsigned short data;
	//CE1 SPACE 16bit depth flash whole chip erase to 0xFFFF
	*((volatile unsigned short * ) FLASH_CTL555)= 0xaa;
    *((volatile unsigned short * ) FLASH_CTL2AA)= 0x55;
    *((volatile unsigned short * ) FLASH_CTL555)= 0x80;
    *((volatile unsigned short * ) FLASH_CTL555)= 0xaa;
    *((volatile unsigned short * ) FLASH_CTL2AA)= 0x55;
    *((volatile unsigned short * ) FLASH_CTL555)= 0x10;
    
	while(1)
	{
		data = *(unsigned short*)FLASH_BASE;
		if(data==0xffff)
		{
			return(1);
		}
		else 
		{
			data=data & 0x20;//与0x20的与操作？？？
			if(data == 0x20)
			{
				data = *(unsigned short*)FLASH_BASE;
				if(data==0xffff)
				{
					return(1);
				}
				else
				{
					return(0);
				}
			}
		}
	}
}

////////////////////////////////////////////////////
//normal_program()  //erase the whole chip
BOOL normal_program(unsigned short data,unsigned int addr)
{
	unsigned short datum;
    *((volatile unsigned short* ) FLASH_CTL555) = 0xaa;
    *((volatile unsigned short* ) FLASH_CTL2AA) = 0x55;
    *((volatile unsigned short* ) FLASH_CTL555) = 0xa0;
    *((volatile unsigned short* )(FLASH_BASE+(addr<<1))) = data;
          
	while(1)
	{
		datum = *(unsigned short*)(FLASH_BASE+(addr<<1));		
		if(datum==data)
		{
			return(1);
		}
		else 
		{
			datum=datum & 0x20;
			if(datum == 0x20)
			{
				datum = *(unsigned short*)FLASH_BASE;
				if(datum == data)
				{
					return(1);
				}
				else
				{
					return(0);
				}
			}
		}
	}
}

///////////////////////////////////////////////////
// flash_test()
void flash_test()
{
	unsigned short  data;
	unsigned int    i,j=0;
	
	if(TestFlashID()==1)
	{
		puts("TestFlashID OK!");
	}
	else	
	{
		puts("TestFlashID failed");
	}
	
	if(chip_erase()==1)
	{	
		puts("erased good!");
	}
	else	
	{
		puts("erased failed");
		return;
	}
	
	for(i=0;i<1000;i++)
	{
		if(normal_program(i,i)==1)
		{
			j++;
		}	
		else
		{	
			puts("program failed");
		}
	}  
	
	if(j>=999)
	{
		puts("program test OK!");
	}
	
	for(i=0;i<1000;i++)
	{
		data = read_flash(i);
		if(data!=i)
		{
			 puts("read failed!");
		}
	}
}

///////////////////////////////////////////////////
// PllDelay()
void plldelay( int Count )
{
    volatile int i = Count;
    while(i--);
}

///////////////////////////////////////////////////
// pll_set()
void pll_set( )
{
    *(volatile unsigned *)PLL_CSR  &= ~CSR_PLLEN;
    plldelay(20);

    // Reset the pll.  PLL takes 125ns to reset.    
    *(volatile unsigned *)PLL_CSR  |= CSR_PLLRST;
    plldelay(20);
    // 
    *(volatile unsigned *)PLL_DIV0  = DIV_ENABLE + 0;  // Div 1
    *(volatile unsigned *)PLL_MULT  = 9;               // x9=450

    *(volatile unsigned *)PLL_DIV3  = DIV_ENABLE + 4; // 90MHz EMIF (450/5)
    plldelay(20);

    *(volatile unsigned *)PLL_DIV2  = DIV_ENABLE + 4; // 90MHz Pheriherals ()
    plldelay(20);

    *(volatile unsigned *)PLL_DIV1  = DIV_ENABLE + 1; // 225 MHz CPU CLK (450/2)
    plldelay(20);
    
    *(volatile unsigned *)PLL_CSR  &= ~CSR_PLLRST;
    plldelay( 1500 );

    *(volatile unsigned *)PLL_CSR |= CSR_PLLEN;
    plldelay(20);
}


///////////////////////////////////////////////////
// sdram_test()
void sdram_test(void)
{
	unsigned int i=0;
	unsigned short backdata;
	for(i=0;i<1000000;i++)
	{
		*(unsigned short*)(SDRAM_ADDR+i*2)=0x1234+i;
		backdata=*(unsigned short*)(SDRAM_ADDR+i*2);
	}
	if(backdata==0){}
	puts("write to sdram successfully");
}