machine.def

一个很有名的硬件模拟器。可以模拟CPU

    SET_GPR(RC, GPR(RA) >> (GPR(RB) & 0x3f));				\
  }
DEFINST(SRL,			0x00,
	"srl",			"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define SRLI_IMPL							\
  {									\
    SET_GPR(RC, GPR(RA) >> (IMM & 0x3f));				\
  }
DEFINST(SRLI,			0x01,
	"srl",		"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(EXTQL_LINK)

#define EXTQL_IMPL							\
  {									\
    SET_GPR(RC, GPR(RA) >> ((GPR(RB) & 0x7) * 8));			\
  }
DEFINST(EXTQL,			0x00,
	"extql",		"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define EXTQLI_IMPL							\
  {									\
    SET_GPR(RC, GPR(RA) >> ((IMM & 0x7) * 8));				\
  }
DEFINST(EXTQLI,			0x01,
	"extql",		"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(SLL_LINK)

#define	SLL_IMPL							\
  {									\
    SET_GPR(RC, GPR(RA) << (GPR(RB) & 0x3f));				\
  }
DEFINST(SLL,			0x00,
	"sll",			"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define SLLI_IMPL							\
  {									\
    SET_GPR(RC, GPR(RA) << (IMM & 0x3f));				\
  }
DEFINST(SLLI,			0x01,
	"sll",			"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(INSQL_LINK)

#define INSQL_IMPL							\
  {									\
    SET_GPR(RC, ((GPR(RA) << ((GPR(RB) & 0x7) * 8))			\
		 & (ULL(0xffffffffffffffff) << ((GPR(RB) & 0x7) * 8))));\
  }
DEFINST(INSQL,			0x00,
	"insql",		"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define INSQLI_IMPL							\
  {									\
    SET_GPR(RC, ((GPR(RA) << ((IMM & 0x7) * 8))				\
		 & (ULL(0xffffffffffffffff) << ((IMM & 0x7) * 8))));	\
  }
DEFINST(INSQLI,			0x01,
	"insql",		"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)

CONNECT(SRA_LINK)

#define SRA_IMPL							\
  {									\
    SET_GPR(RC, (sqword_t)GPR(RA) >> (GPR(RB) & 0x3f));			\
  }
DEFINST(SRA,			0x00,
	"sra",			"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define SRAI_IMPL							\
  {									\
    SET_GPR(RC, (sqword_t)GPR(RA) >> (IMM & 0x3f));			\
  }
DEFINST(SRAI,			0x01,
	"sra",		"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(MSKWH_LINK)

#define MSKWH_IMPL							\
  {									\
    if ((GPR(RB) & 0x7) != 0)						\
      SET_GPR(RC, GPR(RA) & ~(ULL(0xffff) >> ((8 - (GPR(RB) & 0x7)) * 8)));\
    else								\
      SET_GPR(RC, GPR(RA));						\
  }
DEFINST(MSKWH,			0x00,
	"mskwh",		"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define MSKWHI_IMPL							\
  {									\
    if ((IMM & 0x7) != 0)						\
      SET_GPR(RC, GPR(RA) & ~(ULL(0xffff) >> ((8 - (IMM & 0x7)) * 8)));	\
    else								\
      SET_GPR(RC, GPR(RA));						\
  }
DEFINST(MSKWHI,			0x01,
	"mskwh",		"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(INSWH_LINK)

#define INSWH_IMPL							\
  {									\
    if ((GPR(RB) & 0x7) != 0)						\
      SET_GPR(RC, ((GPR(RA) >> (63 - (GPR(RB) & 0x7) * 8)) >> 1		\
		   & (ULL(0xffff) >> ((8 - (GPR(RB) & 0x7)) * 8))));	\
    else								\
      SET_GPR(RC, 0);							\
  }
DEFINST(INSWH,			0x00,
	"inswh",		"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define INSWHI_IMPL							\
  {									\
    if ((IMM & 0x7) != 0)						\
      SET_GPR(RC, ((GPR(RA) >> (63 - (IMM & 0x7) * 8)) >> 1		\
		   & (ULL(0xffff) >> ((8 - (IMM & 0x7)) * 8))));	\
    else								\
      SET_GPR(RC, 0);							\
  }
DEFINST(INSWHI,			0x01,
	"inswh",		"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(EXTWH_LINK)

#define EXTWH_IMPL							\
  {									\
    SET_GPR(RC, (GPR(RA) << ((64 - (GPR(RB)&0x7) * 8) & 0x3f)) & LL(0xffff));\
  }
DEFINST(EXTWH,			0x00,
	"extwh",		"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define EXTWHI_IMPL							\
  {									\
    SET_GPR(RC, (GPR(RA) << ((64 - (IMM & 0x7) * 8) & 0x3f)) & LL(0xffff));\
  }
DEFINST(EXTWHI,			0x01,
	"extwh",		"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(MSKLH_LINK)

#define MSKLH_IMPL							\
  {									\
    if ((GPR(RB) & 0x7) != 0)						\
      SET_GPR(RC, GPR(RA) & ~(ULL(0xffffffff) >>			\
			      ((8 - (GPR(RB) & 0x7)) * 8)));		\
    else								\
      SET_GPR(RC, GPR(RA));						\
  }
DEFINST(MSKLH,			0x00,
	"msklh",		"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define MSKLHI_IMPL							\
  {									\
    if ((IMM & 0x7) != 0)						\
      SET_GPR(RC, GPR(RA) & ~(ULL(0xffffffff) >>			\
			      ((8 - (IMM & 0x7)) * 8)));		\
    else								\
      SET_GPR(RC, GPR(RA));						\
  }
DEFINST(MSKLHI,			0x01,
	"msklh",		"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(INSLH_LINK)

#define INSLH_IMPL							\
  {									\
    if ((GPR(RB) & 0x7) != 0)						\
      SET_GPR(RC, ((GPR(RA) >> (63 - (GPR(RB) & 0x7) * 8)) >> 1		\
		   & (ULL(0xffffffff) >> ((8 - (GPR(RB) & 0x7)) * 8))));\
    else								\
      SET_GPR(RC, 0);							\
  }
DEFINST(INSLH,			0x00,
	"inslh",		"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define INSLHI_IMPL							\
  {									\
    if ((IMM & 0x7) != 0)						\
      SET_GPR(RC, ((GPR(RA) >> (63 - (IMM & 0x7) * 8)) >> 1		\
		   & (ULL(0xffffffff) >> ((8 - (IMM & 0x7)) * 8))));	\
    SET_GPR(RC, 0);							\
  }
DEFINST(INSLHI,			0x01,
	"inslh",		"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(EXTLH_LINK)

#define EXTLH_IMPL							\
  {									\
    SET_GPR(RC, (GPR(RA) <<						\
		 ((64 - (GPR(RB) & 0x7) * 8) & 0x3f)) & LL(0xffffffff));\
  }
DEFINST(EXTLH,			0x00,
	"extlh",		"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define EXTLHI_IMPL							\
  {									\
    SET_GPR(RC, (GPR(RA) << ((64 - (IMM&0x7) * 8) & 0x3f)) & LL(0xffffffff));\
  }
DEFINST(EXTLHI,			0x01,
	"extlh",		"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(MSKQH_LINK)

#define MSKQH_IMPL							\
  {									\
    if ((GPR(RB) & 0x7) != 0)						\
      SET_GPR(RC, (GPR(RA) & ~(ULL(0xffffffffffffffff)			\
			       >> ((8 - (GPR(RB) & 0x7)) * 8))));	\
    else								\
      SET_GPR(RC, GPR(RA));						\
  }
DEFINST(MSKQH,			0x00,
	"mskqh",		"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define MSKQHI_IMPL							\
  {									\
    if ((IMM & 0x7) != 0)						\
      SET_GPR(RC, (GPR(RA) & ~(ULL(0xffffffffffffffff)			\
			       >> ((8 - (IMM & 0x7)) * 8))));		\
    else								\
      SET_GPR(RC, GPR(RA));						\
  }
DEFINST(MSKQHI,			0x01,
	"mskqh",		"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(INSQH_LINK)

#define INSQH_IMPL							\
  {									\
    if ((GPR(RB) & 0x7) != 0)						\
      SET_GPR(RC, ((GPR(RA) >> (63 - (GPR(RB) & 0x7) * 8)) >> 1		\
		   & (ULL(0xffffffffffffffff)				\
		      >> ((8 - (GPR(RB) & 0x7)) * 8))));		\
    else								\
      SET_GPR(RC, 0);							\
  }
DEFINST(INSQH,			0x00,
	"insqh",		"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define INSQHI_IMPL							\
  {									\
    if ((IMM & 0x7) != 0)						\
      SET_GPR(RC, ((GPR(RA) >> (63 - (IMM & 0x7) * 8)) >> 1		\
		   & (ULL(0xffffffffffffffff)				\
		      >> ((8 - (IMM & 0x7)) * 8))));			\
    else								\
      SET_GPR(RC, 0);							\
  }
DEFINST(INSQHI,			0x01,
	"insqh",		"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(EXTQH_LINK)

#define EXTQH_IMPL							\
  {									\
    SET_GPR(RC, (GPR(RA) << ((64 - (GPR(RB) & 0x7) * 8) & 0x3f)));	\
  }
DEFINST(EXTQH,			0x00,
	"extqh",		"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define EXTQHI_IMPL							\
  {									\
    SET_GPR(RC, (GPR(RA) << ((64 - (IMM & 0x7) * 8) & 0x3f)));		\
  }
DEFINST(EXTQHI,			0x01,
	"extqh",		"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(INTM)

/* FIXME: changed mask in DEFLINK(INTM ... above so that MUL{Q,L}/V
   now map to MUL{Q,L}, i.e. no overflow checking (earlier they
   generated unimplemented-faults). I think this is more symmetrical
   because {ADD,SUB}{L,Q}/V also do not check for overflow.  */

DEFLINK(MULL_LINK, 0x00, "mull_link", 12, 1)

DEFLINK(MULQ_LINK, 0x20, "mulq_link", 12, 1)

DEFLINK(UMULH_LINK, 0x30, "umulh_link", 12, 1)


CONNECT(MULL_LINK)

#define MULL_IMPL							\
  {									\
    SET_GPR(RC, SEXT32((GPR(RA) * GPR(RB)) & ULL(0xffffffff)));		\
  }
DEFINST(MULL,			0x00,
	"mull",			"a,b,c",
	IntMULT,		F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define MULLI_IMPL							\
  {									\
    SET_GPR(RC, SEXT32((GPR(RA) * IMM) & ULL(0xffffffff)));		\
  }
DEFINST(MULLI,			0x01,
	"mull",			"a,i,c",
	IntMULT,		F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(MULQ_LINK)

#define MULQ_IMPL							\
  {									\
    SET_GPR(RC, GPR(RA) * GPR(RB));					\
  }
DEFINST(MULQ,			0x00,
	"mulq",			"a,b,c",
	IntMULT,		F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define MULQI_IMPL							\
  {									\
    SET_GPR(RC, GPR(RA) * IMM);						\
  }
DEFINST(MULQI,			0x01,
	"mulq",			"a,i,c",
	IntMULT,		F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(UMULH_LINK)

#define UMULH_IMPL							\
  {									\
    sqword_t _v1 = GPR(RA);						\
    sqword_t _v2 = GPR(RB);						\
    qword_t _result;							\
    qword_t _a, _b, _c, _d;						\
    qword_t _bd, _ad, _cb, _ac;						\
    qword_t _mid, _mid2, _carry_mid = 0;				\
									\
    _a = (_v1 >> 32) & LL(0xffffffff);					\
    _b = _v1 & LL(0xffffffff);						\
    _c = (_v2 >> 32) & LL(0xffffffff);					\
    _d = _v2 & LL(0xffffffff);						\
  /*myfprintf(stderr, "%n: %p %p %p %p\n", sim_num_insn, _a, _b, _c, _d);*/\
									\
    _bd = _b * _d;							\
    _ad = _a * _d;							\
    _cb = _c * _b;							\
    _ac = _a * _c;							\
  /*myfprintf(stderr, "    %p %p %p %p\n", _bd, _ad, _cb, _ac);*/	\
									\
    _mid = _ad + _cb;							\
    if (ARITH_OVFL(_mid, _ad, _cb))					\
      _carry_mid = 1;							\
									\
    _mid2 = _mid + ((_bd >> 32) & LL(0xffffffff));			\
    if (ARITH_OVFL(_mid2, _mid, ((_bd >> 32) & LL(0xffffffff))))	\
      _carry_mid += 1;							\
    _result =								\
      _ac + (_carry_mid << 32) + ((_mid2 >> 32) & LL(0xffffffff));	\
    /*myfprintf(stderr, "    %p %p %p %p\n", _mid,_mid2,_carry_mid,_result);*/\
									\
    SET_GPR(RC, _result);						\
  }
DEFINST(UMULH,			0x00,
	"umulh",		"a,b,c",
	IntMULT,		F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define UMULHI_IMPL							\
  {									\
    sqword_t _v1 = GPR(RA);						\
    sqword_t _v2 = IMM;							\
    qword_t _result;							\
    qword_t _a, _b, _c, _d;						\
    qword_t _bd, _ad, _cb, _ac;						\
    qword_t _mid, _mid2, _carry_mid = 0;				\
									\
    _a = (_v1 >> 32) & LL(0xffffffff);					\
    _b = _v1 & LL(0xffffffff);						\
    _c = (_v2 >> 32) & LL(0xffffffff);					\
    _d = _v2 & LL(0xffffffff);						\
									\
    _bd = _b * _d;							\
    _ad = _a * _d;							\
    _cb = _c * _b;							\
    _ac = _a * _c;							\
									\
    _mid = _ad + _cb;							\
    if (ARITH_OVFL(_mid, _ad, _cb))					\
      _carry_mid = 1;							\
									\
    _mid2 = _mid + ((_bd >> 32) & LL(0xffffffff));			\
    if (ARITH_OVFL(_mid2, _mid, ((_bd >> 32) & LL(0xffffffff))))	\
      _carry_mid += 1;							\
    _result =								\
      _ac + (_carry_mid << 32) + ((_mid2 >> 32) & LL(0xffffffff));	\
									\
    SET_GPR(RC, _result);						\
  }
DEFINST(UMULHI,			0x01,
	"umulh",		"a,i,c",
	IntMULT,		F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


/* added 02/27/99, plakal@cecil, from Alpha Arch Handbook (Rev.4, EV6) */
/* FIX extensions */
CONNECT(ITFP)

#define ITOFS_IMPL							\
  {									\
    sqword_t _longhold, _e1, _e2;					\
									\
    _longhold = GPR(RA) & ULL(0xffffffff);				\
									\
    _e1 = _longhold & 0x40000000;					\
    _e2 = (_longhold >> 23) & ULL(0x7f);				\
    if (_e1)								\
      {									\
	if (_e2 == ULL(0x3f800000))					\
	  _e2 = ULL(0x7ff);						\
	else								\
	  _e2 |= ULL(0x400);						\
      }									\
    else								\
      {									\
	if (_e2 == 0)							\
	  _e2 = 0;							\
	else								\
	  _e2 |= ULL(0x380);						\
      }									\
    SET_FPR_Q(RC, (((_longhold & ULL(0x80000000)) << 32)		\
		   | (_e2 << 52) | ((_longhold & ULL(0x7fffff)) << 29)));\
  }
DEFINST(ITOFS,			0x04,
	"itofs",	        "a,C",
	FloatCVT,	        F_FCOMP,  /* FIXME: are these flags correct? */
	DFPR(RC), DNA,		DGPR(RA), DNA, DNA)

#define SQRTF_IMPL							\
  {									\
    /* FIXME: unimplemented */						\
    DECLARE_FAULT(md_fault_unimpl);					\
  }
DEFINST(SQRTF,			0x0a,
	"sqrtf (unimpl)",	"B,C",
	NA,			NA,
	DNA, DNA,		DNA, DNA, DNA)


#define SQRTS_IMPL							\
  {									\
     if (FPR(RB) < 0.0)							\
       DECLARE_FAULT(md_f