machine.def

一个很有名的硬件模拟器。可以模拟CPU

  }
DEFINST(ADDQ,			0x00,
	"addq",			"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)
	
#define ADDQI_IMPL							\
  {									\
    SET_GPR(RC, GPR(RA) + IMM);						\
  }
DEFINST(ADDQI,			0x01,
	"addq",			"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(S4ADDQ_LINK)

#define S4ADDQ_IMPL							\
  {									\
    SET_GPR(RC, (GPR(RA) << 2) + GPR(RB));				\
  }
DEFINST(S4ADDQ,			0x00,
	"s4addq",		"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define S4ADDQI_IMPL							\
  {									\
    SET_GPR(RC, (GPR(RA) << 2) + IMM);					\
  }
DEFINST(S4ADDQI,		0x01,
	"s4addq",		"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(SUBQ_LINK)

#define SUBQ_IMPL							\
  {									\
    SET_GPR(RC, GPR(RA) - GPR(RB));					\
  }
DEFINST(SUBQ,			0x00,
	"subq",			"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define SUBQI_IMPL							\
  {									\
    SET_GPR(RC, GPR(RA) - IMM);						\
  }
DEFINST(SUBQI,			0x01,
	"subq",			"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(S4SUBQ_LINK)

#define S4SUBQ_IMPL							\
  {									\
    SET_GPR(RC, (GPR(RA) << 2) - GPR(RB));				\
  }
DEFINST(S4SUBQ,			0x00,
	"s4subq",		"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define S4SUBQI_IMPL							\
  {									\
    SET_GPR(RC, (GPR(RA) << 2) - IMM);					\
  }
DEFINST(S4SUBQI,		0x01,
	"s4subq",		"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(CMPEQ_LINK)

#define CMPEQ_IMPL							\
  {									\
    SET_GPR(RC, GPR(RA) == GPR(RB));					\
  }
DEFINST(CMPEQ,			0x00,
	"cmpeq",		"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define CMPEQI_IMPL							\
  {									\
    SET_GPR(RC, GPR(RA) == (qword_t)IMM);				\
  }
DEFINST(CMPEQI,			0x01,
	"cmpeq",		"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(S8ADDQ_LINK)

#define S8ADDQ_IMPL							\
  {									\
    SET_GPR(RC, (GPR(RA) << 3) + GPR(RB));				\
  }
DEFINST(S8ADDQ,			0x00,
	"s8addq",		"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define S8ADDQI_IMPL							\
  {									\
    SET_GPR(RC, (GPR(RA) << 3) + IMM);					\
  }
DEFINST(S8ADDQI,		0x01,
	"s8addq",		"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(S8SUBQ_LINK)

#define S8SUBQ_IMPL							\
  {									\
    SET_GPR(RC, (GPR(RA) << 3) - GPR(RB));				\
  }
DEFINST(S8SUBQ,			0x00,
	"s8subq",		"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define S8SUBQI_IMPL							\
  {									\
    SET_GPR(RC, (GPR(RA) << 3) - IMM);					\
  }
DEFINST(S8SUBQI,		0x01,
	"s8subq",		"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(CMPULE_LINK)

#define CMPULE_IMPL							\
  {									\
    SET_GPR(RC, (qword_t)GPR(RA) <= (qword_t)GPR(RB));			\
  }
DEFINST(CMPULE,			0x00,
	"cmpule",		"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define CMPULEI_IMPL							\
  {									\
    SET_GPR(RC, (qword_t)GPR(RA) <= (qword_t)IMM);			\
  }
DEFINST(CMPULEI,		0x01,
	"cmpule",		"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(ADDLV_LINK)

#define ADDLV_IMPL							\
  {									\
    /* FIXME: not checking for overflows... */				\
    SET_GPR(RC, SEXT32((GPR(RA) + GPR(RB)) & ULL(0xffffffff)));		\
  }
DEFINST(ADDLV,			0x00,
	"addl/v (unimpl)",	"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define ADDLVI_IMPL							\
  {									\
    /* FIXME: not checking for overflows... */				\
    SET_GPR(RC, SEXT32((GPR(RA) + IMM) & ULL(0xffffffff)));		\
  }
DEFINST(ADDLVI,			0x01,
	"addl/v (unimpl)",	"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(SUBLV_LINK)

#define SUBLV_IMPL							\
  {									\
    SET_GPR(RC, SEXT32((GPR(RA) - GPR(RB)) & ULL(0xffffffff)));		\
  }
DEFINST(SUBLV,			0x00,
	"subl/v (unimpl)",	"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define SUBLVI_IMPL							\
  {									\
    SET_GPR(RC, SEXT32((GPR(RA) - IMM) & ULL(0xffffffff)));		\
  }
DEFINST(SUBLVI,			0x01,
	"subl/v (unimpl)",	"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(CMPLT_LINK)

#define CMPLT_IMPL							\
  {									\
    SET_GPR(RC, (sqword_t)GPR(RA) < (sqword_t)GPR(RB));			\
  }
DEFINST(CMPLT,			0x00,
	"cmplt",		"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define CMPLTI_IMPL							\
  {									\
    SET_GPR(RC, (sqword_t)GPR(RA) < (sqword_t)IMM);			\
  }
DEFINST(CMPLTI,		0x01,
	"cmplt",		"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(ADDQV_LINK)

#define ADDQV_IMPL							\
  {									\
    /* FIXME: not checking for overflows... */				\
    SET_GPR(RC, GPR(RA) + GPR(RB));					\
  }
DEFINST(ADDQV,			0x00,
	"addq/v (unimpl)",	"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define ADDQVI_IMPL							\
  {									\
    /* FIXME: not checking for overflows... */				\
    SET_GPR(RC, GPR(RA) + IMM);						\
  }
DEFINST(ADDQVI,			0x01,
	"addq/v (unimpl)",	"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(SUBQV_LINK)

#define SUBQV_IMPL							\
  {									\
    /* FIXME: not checking for overflows... */				\
    SET_GPR(RC, GPR(RA) - GPR(RB));					\
  }
DEFINST(SUBQV,			0x00,
	"subq/v (unimpl)",	"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define SUBQVI_IMPL							\
  {									\
    /* FIXME: not checking for overflows... */				\
    SET_GPR(RC, GPR(RA) - IMM);						\
  }
DEFINST(SUBQVI,			0x01,
	"subq/v (unimpl)",	"a,b,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(CMPLE_LINK)

#define CMPLE_IMPL							\
  {									\
    SET_GPR(RC, (sqword_t)GPR(RA) <= (sqword_t)GPR(RB));		\
  }
DEFINST(CMPLE,			0x00,
	"cmple",		"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define CMPLEI_IMPL							\
  {									\
    SET_GPR(RC, (sqword_t)GPR(RA) <= (sqword_t)IMM);			\
  }
DEFINST(CMPLEI,		0x01,
	"cmple",		"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(INTL)

DEFLINK(AND_LINK, 0x00, "and_link", 12, 1)

DEFLINK(BIC_LINK, 0x08, "bic_link", 12, 1)  /* FIXME: PRM says 0x11.0x00 ?! */

DEFLINK(CMOVLBS_LINK, 0x14, "cmovlbs_link", 12, 1)

DEFLINK(CMOVLBC_LINK, 0x16, "cmovlbc_link", 12, 1)

/* FIXME: BetaDyn recodes some of these for SMT insts (NOP technology)... */
DEFLINK(BIS_LINK, 0x20, "bis_link", 12, 1)

DEFLINK(CMOVEQ_LINK, 0x24, "cmoveq_link", 12, 1)

DEFLINK(CMOVNE_LINK, 0x26, "cmovne_link", 12, 1)

DEFLINK(ORNOT_LINK, 0x28, "ornot_link", 12, 1)

DEFLINK(XOR_LINK, 0x40, "xor_link", 12, 1)

DEFLINK(CMOVLT_LINK, 0x44, "cmovlt_link", 12, 1)

DEFLINK(CMOVGE_LINK, 0x46, "cmovge_link", 12, 1)

DEFLINK(EQV_LINK, 0x48, "eqv_link", 12, 1)

/* added 02/27/99, plakal@cecil, from Alpha Arch Handbook (Rev.4, EV6) */
DEFLINK(AMASK_LINK, 0x61, "amask_link", 12, 1)

DEFLINK(CMOVLE_LINK, 0x64, "cmovle_link", 12, 1)

DEFLINK(CMOVGT_LINK, 0x66, "cmovgt_link", 12, 1)

/* added 02/27/99, plakal@cecil, from Alpha Arch Handbook (Rev.4, EV6) */
 
/* major implementation version of processor, used for code-scheduling
 decisions, rather than ISA decisions. Makes sense to return EV6 -- for
 sim-outorder */
#define IMPLVER_IMPL							\
  {									\
    SET_GPR(RC, ULL(2));					        \
  }
DEFINST(IMPLVER,		0x6c,
	"implver",		"c",
	NA,			NA,
	DGPR(RC), DNA,		DNA, DNA, DNA)


CONNECT(AND_LINK)

#define AND_IMPL							\
  {									\
    SET_GPR(RC, GPR(RA) & GPR(RB));					\
  }
DEFINST(AND,			0x00,
	"and",			"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define ANDI_IMPL							\
  {									\
    SET_GPR(RC, GPR(RA) & IMM);						\
  }
DEFINST(ANDI,			0x01,
	"and",			"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(BIC_LINK)

#define BIC_IMPL							\
  {									\
    SET_GPR(RC, GPR(RA) & ~GPR(RB));					\
  }
DEFINST(BIC,			0x00,
	"bic",			"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define BICI_IMPL							\
  {									\
    SET_GPR(RC, GPR(RA) & ~IMM);					\
  }
DEFINST(BICI,			0x01,
	"bic",			"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(CMOVLBS_LINK)

#define CMOVLBS_IMPL							\
  {									\
    if (GPR(RA) & 1)							\
      SET_GPR(RC, GPR(RB));						\
  }
DEFINST(CMOVLBS,		0x00,
	"cmovlbs",		"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define CMOVLBSI_IMPL							\
  {									\
    if (GPR(RA) & 1)							\
      SET_GPR(RC, IMM);							\
  }
DEFINST(CMOVLBSI,		0x01,
	"cmovlbs",		"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(CMOVLBC_LINK)

#define CMOVLBC_IMPL							\
  {									\
    if ((GPR(RA) & 1) == 0)						\
      SET_GPR(RC, GPR(RB));						\
  }
DEFINST(CMOVLBC,		0x00,
	"cmovlbc",		"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define CMOVLBCI_IMPL							\
  {									\
    if ((GPR(RA) & 1) == 0)						\
      SET_GPR(RC, IMM);							\
  }
DEFINST(CMOVLBCI,		0x01,
	"cmovlbc",		"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(BIS_LINK)

#define BIS_IMPL							\
  {									\
    SET_GPR(RC, GPR(RA) | GPR(RB));					\
  }
DEFINST(BIS,			0x00,
	"bis",			"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define BISI_IMPL							\
  {									\
    SET_GPR(RC, GPR(RA) | IMM);						\
  }
DEFINST(BISI,			0x01,
	"bis",			"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(CMOVEQ_LINK)

#define CMOVEQ_IMPL							\
  {									\
    if (GPR(RA) == 0)							\
      SET_GPR(RC, GPR(RB));						\
  }
DEFINST(CMOVEQ,			0x00,
	"cmoveq",		"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define CMOVEQI_IMPL							\
  {									\
    if (GPR(RA) == 0)							\
      SET_GPR(RC, IMM);							\
  }
DEFINST(CMOVEQI,		0x01,
	"cmoveq",		"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(CMOVNE_LINK)

#define CMOVNE_IMPL							\
  {									\
    if (GPR(RA) != 0)							\
      SET_GPR(RC, GPR(RB));						\
  }
DEFINST(CMOVNE,			0x00,
	"cmovne",		"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define CMOVNEI_IMPL							\
  {									\
    if (GPR(RA) != 0)							\
      SET_GPR(RC, IMM);							\
  }
DEFINST(CMOVNEI,		0x01,
	"cmovne",		"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(ORNOT_LINK)

#define ORNOT_IMPL							\
  {									\
    SET_GPR(RC, GPR(RA) | ~GPR(RB));					\
  }
DEFINST(ORNOT,			0x00,
	"ornot",		"a,b,c",
	IntALU,			F_ICOMP,
	DGPR(RC), DNA,		DGPR(RA), DGPR(RB), DNA)

#define ORNOTI_IMPL							\
  {									\
    SET_GPR(RC, GPR(RA) | ~IMM);					\
  }
DEFINST(ORNOTI,			0x01,
	"ornot",		"a,i,c",
	IntALU,			F_ICOMP|F_IMM,
	DGPR(RC), DNA,		DGPR(RA), DNA, DNA)


CONNECT(XOR_LINK)

#define XOR_IMPL							\