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📄 sim-bpred.c

📁 一个很有名的硬件模拟器。可以模拟CPU
💻 C
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/* sim-bpred.c - sample branch predictor simulator implementation *//* SimpleScalar(TM) Tool Suite * Copyright (C) 1994-2003 by Todd M. Austin, Ph.D. and SimpleScalar, LLC. * All Rights Reserved.  *  * THIS IS A LEGAL DOCUMENT, BY USING SIMPLESCALAR, * YOU ARE AGREEING TO THESE TERMS AND CONDITIONS. *  * No portion of this work may be used by any commercial entity, or for any * commercial purpose, without the prior, written permission of SimpleScalar, * LLC (info@simplescalar.com). Nonprofit and noncommercial use is permitted * as described below. *  * 1. SimpleScalar is provided AS IS, with no warranty of any kind, express * or implied. The user of the program accepts full responsibility for the * application of the program and the use of any results. *  * 2. Nonprofit and noncommercial use is encouraged. SimpleScalar may be * downloaded, compiled, executed, copied, and modified solely for nonprofit, * educational, noncommercial research, and noncommercial scholarship * purposes provided that this notice in its entirety accompanies all copies. * Copies of the modified software can be delivered to persons who use it * solely for nonprofit, educational, noncommercial research, and * noncommercial scholarship purposes provided that this notice in its * entirety accompanies all copies. *  * 3. ALL COMMERCIAL USE, AND ALL USE BY FOR PROFIT ENTITIES, IS EXPRESSLY * PROHIBITED WITHOUT A LICENSE FROM SIMPLESCALAR, LLC (info@simplescalar.com). *  * 4. No nonprofit user may place any restrictions on the use of this software, * including as modified by the user, by any other authorized user. *  * 5. Noncommercial and nonprofit users may distribute copies of SimpleScalar * in compiled or executable form as set forth in Section 2, provided that * either: (A) it is accompanied by the corresponding machine-readable source * code, or (B) it is accompanied by a written offer, with no time limit, to * give anyone a machine-readable copy of the corresponding source code in * return for reimbursement of the cost of distribution. This written offer * must permit verbatim duplication by anyone, or (C) it is distributed by * someone who received only the executable form, and is accompanied by a * copy of the written offer of source code. *  * 6. SimpleScalar was developed by Todd M. Austin, Ph.D. The tool suite is * currently maintained by SimpleScalar LLC (info@simplescalar.com). US Mail: * 2395 Timbercrest Court, Ann Arbor, MI 48105. *  * Copyright (C) 1994-2003 by Todd M. Austin, Ph.D. and SimpleScalar, LLC. */#include <stdio.h>#include <stdlib.h>#include <math.h>#include "host.h"#include "misc.h"#include "machine.h"#include "regs.h"#include "memory.h"#include "loader.h"#include "syscall.h"#include "dlite.h"#include "options.h"#include "stats.h"#include "bpred.h"#include "sim.h"/* * This file implements a branch predictor analyzer. *//* simulated registers */static struct regs_t regs;/* simulated memory */static struct mem_t *mem = NULL;/* maximum number of inst's to execute */static unsigned int max_insts;/* branch predictor type {nottaken|taken|perfect|bimod|2lev} */static char *pred_type;/* bimodal predictor config (<table_size>) */static int bimod_nelt = 1;static int bimod_config[1] =  { /* bimod tbl size */2048 };/* 2-level predictor config (<l1size> <l2size> <hist_size> <xor>) */static int twolev_nelt = 4;static int twolev_config[4] =  { /* l1size */1, /* l2size */1024, /* hist */8, /* xor */FALSE};/* combining predictor config (<meta_table_size> */static int comb_nelt = 1;static int comb_config[1] =  { /* meta_table_size */1024 };/* return address stack (RAS) size */static int ras_size = 8;/* BTB predictor config (<num_sets> <associativity>) */static int btb_nelt = 2;static int btb_config[2] =  { /* nsets */512, /* assoc */4 };/* branch predictor */static struct bpred_t *pred;/* track number of insn and refs */static counter_t sim_num_refs = 0;/* total number of branches executed */static counter_t sim_num_branches = 0;/* register simulator-specific options */voidsim_reg_options(struct opt_odb_t *odb){  opt_reg_header(odb, "sim-bpred: This simulator implements a branch predictor analyzer.\n"		 );  /* branch predictor options */  opt_reg_note(odb,"  Branch predictor configuration examples for 2-level predictor:\n""    Configurations:   N, M, W, X\n""      N   # entries in first level (# of shift register(s))\n""      W   width of shift register(s)\n""      M   # entries in 2nd level (# of counters, or other FSM)\n""      X   (yes-1/no-0) xor history and address for 2nd level index\n""    Sample predictors:\n""      GAg     : 1, W, 2^W, 0\n""      GAp     : 1, W, M (M > 2^W), 0\n""      PAg     : N, W, 2^W, 0\n""      PAp     : N, W, M (M == 2^(N+W)), 0\n""      gshare  : 1, W, 2^W, 1\n""  Predictor `comb' combines a bimodal and a 2-level predictor.\n"               );  /* instruction limit */  opt_reg_uint(odb, "-max:inst", "maximum number of inst's to execute",	       &max_insts, /* default */0,	       /* print */TRUE, /* format */NULL);  opt_reg_string(odb, "-bpred",		 "branch predictor type {nottaken|taken|bimod|2lev|comb}",                 &pred_type, /* default */"bimod",                 /* print */TRUE, /* format */NULL);  opt_reg_int_list(odb, "-bpred:bimod",		   "bimodal predictor config (<table size>)",		   bimod_config, bimod_nelt, &bimod_nelt,		   /* default */bimod_config,		   /* print */TRUE, /* format */NULL, /* !accrue */FALSE);  opt_reg_int_list(odb, "-bpred:2lev",                   "2-level predictor config "		   "(<l1size> <l2size> <hist_size> <xor>)",                   twolev_config, twolev_nelt, &twolev_nelt,		   /* default */twolev_config,                   /* print */TRUE, /* format */NULL, /* !accrue */FALSE);  opt_reg_int_list(odb, "-bpred:comb",		   "combining predictor config (<meta_table_size>)",		   comb_config, comb_nelt, &comb_nelt,		   /* default */comb_config,		   /* print */TRUE, /* format */NULL, /* !accrue */FALSE);  opt_reg_int(odb, "-bpred:ras",              "return address stack size (0 for no return stack)",              &ras_size, /* default */ras_size,              /* print */TRUE, /* format */NULL);  opt_reg_int_list(odb, "-bpred:btb",		   "BTB config (<num_sets> <associativity>)",		   btb_config, btb_nelt, &btb_nelt,		   /* default */btb_config,		   /* print */TRUE, /* format */NULL, /* !accrue */FALSE);}/* check simulator-specific option values */voidsim_check_options(struct opt_odb_t *odb, int argc, char **argv){  if (!mystricmp(pred_type, "taken"))    {      /* static predictor, not taken */      pred = bpred_create(BPredTaken, 0, 0, 0, 0, 0, 0, 0, 0, 0);    }  else if (!mystricmp(pred_type, "nottaken"))    {      /* static predictor, taken */      pred = bpred_create(BPredNotTaken, 0, 0, 0, 0, 0, 0, 0, 0, 0);    }  else if (!mystricmp(pred_type, "bimod"))    {      if (bimod_nelt != 1)	fatal("bad bimod predictor config (<table_size>)");      if (btb_nelt != 2)	fatal("bad btb config (<num_sets> <associativity>)");      /* bimodal predictor, bpred_create() checks BTB_SIZE */      pred = bpred_create(BPred2bit,			  /* bimod table size */bimod_config[0],			  /* 2lev l1 size */0,			  /* 2lev l2 size */0,			  /* meta table size */0,			  /* history reg size */0,			  /* history xor address */0,			  /* btb sets */btb_config[0],			  /* btb assoc */btb_config[1],			  /* ret-addr stack size */ras_size);    }  else if (!mystricmp(pred_type, "2lev"))    {      /* 2-level adaptive predictor, bpred_create() checks args */      if (twolev_nelt != 4)	fatal("bad 2-level pred config (<l1size> <l2size> <hist_size> <xor>)");      if (btb_nelt != 2)	fatal("bad btb config (<num_sets> <associativity>)");      pred = bpred_create(BPred2Level,			  /* bimod table size */0,			  /* 2lev l1 size */twolev_config[0],			  /* 2lev l2 size */twolev_config[1],			  /* meta table size */0,			  /* history reg size */twolev_config[2],			  /* history xor address */twolev_config[3],			  /* btb sets */btb_config[0],			  /* btb assoc */btb_config[1],			  /* ret-addr stack size */ras_size);    }  else if (!mystricmp(pred_type, "comb"))    {      /* combining predictor, bpred_create() checks args */      if (twolev_nelt != 4)	fatal("bad 2-level pred config (<l1size> <l2size> <hist_size> <xor>)");      if (bimod_nelt != 1)	fatal("bad bimod predictor config (<table_size>)");      if (comb_nelt != 1)	fatal("bad combining predictor config (<meta_table_size>)");      if (btb_nelt != 2)	fatal("bad btb config (<num_sets> <associativity>)");      pred = bpred_create(BPredComb,			  /* bimod table size */bimod_config[0],			  /* l1 size */twolev_config[0],			  /* l2 size */twolev_config[1],			  /* meta table size */comb_config[0],			  /* history reg size */twolev_config[2],			  /* history xor address */twolev_config[3],			  /* btb sets */btb_config[0],			  /* btb assoc */btb_config[1],			  /* ret-addr stack size */ras_size);    }  else    fatal("cannot parse predictor type `%s'", pred_type);}/* register simulator-specific statistics */voidsim_reg_stats(struct stat_sdb_t *sdb){  stat_reg_counter(sdb, "sim_num_insn",		   "total number of instructions executed",		   &sim_num_insn, sim_num_insn, NULL);  stat_reg_counter(sdb, "sim_num_refs",		   "total number of loads and stores executed",		   &sim_num_refs, 0, NULL);  stat_reg_int(sdb, "sim_elapsed_time",	       "total simulation time in seconds",	       &sim_elapsed_time, 0, NULL);  stat_reg_formula(sdb, "sim_inst_rate",		   "simulation speed (in insts/sec)",		   "sim_num_insn / sim_elapsed_time", NULL);  stat_reg_counter(sdb, "sim_num_branches",                   "total number of branches executed",                   &sim_num_branches, /* initial value */0, /* format */NULL);  stat_reg_formula(sdb, "sim_IPB",

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