announce-3.0

一个很有名的硬件模拟器。可以模拟CPU

      up an experiment into a single file.  Within the EIO trace file
      are the options, user environment, file accesses, network I/O,
      etc.  used to create the original experiment.  Moreover, EIO
      traces also capture the output of a program, e.g., writes, network
      output, etc.  The simulators check any output attempted against
      that recorded in the EIO trace file, making EIO trace files
      self-validating.  An EIO trace file may be compressed with GZIP or
      compress, the SimpleScalar simulators will automagically
      decompress them on the fly, as long as the simulator can locate
      your GZIP binary.

    * The simulators now compile "out of the box" on many more platforms
      (listed above); in addition, you should be able to get
      SimpleScalar up and running with minimal effort on any target with
      32- or 64-bit integers, IEEE FP, and POSIX-like system calls.  See
      README.port for details on how to port the SimpleScalar tool set
      to a new host environment.  In addition, SimpleScalar now builds
      on Windows NT with either MS VC++ or Cygnus/Win32 tools.  See
      README.winnt for caveats regarding the Windows NT ports.


And here's a list of other sundry enhancements we've made since the
SimpleScalar 2.0 release:

  Enhancements to the foundation modules:

    * the EXO persistent data structure library has been incorporated
      into SimpleScalar release 2.1; this library is used by the EIO
      trace module; it implements extensive collection of scalar and
      container data structures with run-time typing; once constructed
      EXO data structures can be automagically written to and read from
      file streams with a single function call, the EXO library handles
      all the gory details of interning and externing the data
      structures from/to ASCII form, generally useful code if you hate
      to use scanf() and printf() for saving and restoring arbitrary
      data structures; see "libexo/libexo.h" for details...

    * added explicit fault support to functional simulation component
      and memory module

    * memory module updated to support 64/32-bit address spaces on
      64/32-bit machines, now implemented with a dynamically optimized
      hashed page table

    * added support for multiple register and memory contexts

    * improved loader error messages, e.g., loading Alpha binaries on
      PISA-configured simulator (or vice versa) indicates specifically
      what happened

    * added portable myprintf() and myatoq() routines for printing and
      reading quadword's, respectively; works on machines without hardware
      quadword data types

    * added gzopen() and gzclose() routines for reading and writing
      compressed files, updated sysprobe to search for GZIP, if found
      support is enabled

    * F_IMM (immediate field used by instruction) flag to machine.def flags

    * "contrib/" directory contains various enhancements that (unfortunately)
      I did not get time to include into the mainline release - there's a
      lot of gold to mine in that directory, check it out!

    * BITMAP_COUNT_ONES() added to bitmap.h

    * added register pretty printing routines to machine.[hc]


  New simulator options/statistics:

    * added option "-max:inst" to limit number of instructions analyzed

    * added simulator and program output redirection (via "-redir:sim"
      and "redir:prog" options, respectively)

    * added "-nice" option that resets simulator scheduling priority to
      specified level

    * all simulators now emit command line used to invoke them

    * added fast forward option ("-fastfwd") to sim-outorder that skips a
      specified number of instructions (using functional simulation)
      before starting timing simulation

    * explicit BTB sizing option added to branch predictors, use "-btb"
      option to configure BTB

    * branch predictor updates in sim-outorder can now optionally occur
      in ID, WB, or CT, user selectable via the "-bpred:spec_update" option

    * return address stack (RAS) performance stats improved

    * added queue statistics for IFQ, RUU, and LSQ; all terms of
      Little's law are measured and reported; the fraction of cycles in
      which queue is full is also measured

    * added control registers display command "cregs" to DLite!

    * added "-t" option on sysprobe that probes sizes of various C data types

    * new smaller cleaner minimal functional simulator skeleton


  Performance enhancements:

    * added support for fast shifts if host machine can successfully
      implement them, sysprobe tests if fast shifts work and then sets
      -DFAST_SRA and -DFAST_SRL accordingly; this also fixes shifts when
      the high order bit is set for some machines; define -DSLOW_SHIFTS
      to disable this feature

    * branch predictor module's L2 index computation is more
      "compatible" to McFarling's version of it, i.e., if the PC xor
      address component is only part of the index, take the lower order
      address bits for the other part of the index, rather than the
      higher order ones

    * sim-fast now autodetects GNU GCC jump table support and enables
      USE_JUMP_TABLE

    * sim-outorder speculative loads no longer allocate memory pages,
      this significantly reduces memory requirements for programs with
      lots of mispeculation (e.g., cc1)

    * speculative fault handling simplified

    * instruction pre-decoding added to loader module for SimpleScalar/PISA,
      added to sim-fast for SimpleScalar/Alpha


  Portability enhancements:

    * reorganized instruction semantics definitions; now using
      name-mangled macros, this approach is very portable (it even works
      on MS VC++) and it allows C statements to portably implement
      instruction semantics

    * reorganized Makefile: it now works with MS VC++ NMAKE, and many
      host configurations are supplied in the header; added target
      configuration support; converted "sim-tests" target to use
      "-redir:sim" and "-redir:prog" options, this eliminates the need
      for the non-portable "redir" scripts

    * implemented a more portable random() interface

    * added support for MS VC++ compilation on Windows NT


And here's a list of fixes we've made since the SimpleScalar 2.0 release:

    * LWL/LWR/SWL/SWR semantics fixed in pisa.def, these instruction now
      work correctly on big- and little-endian machines, this fixes all
      previous problems with IJPEG failing during functional simulation

    * fixed a BFD/non-BFD loader problem where tail padding in the text
      segment was not correctly allocated in simulator memory; when
      padding region happened to cross a page boundary the final text
      page has a NULL pointer in mem_table, resulting in a SEGV when
      trying to access it in instruction pre-decoding

    * sim-outorder speculative memory access functions now return a
      deterministic value (0) when accessing bogus address/alignment;
      mis-speculation modeling should now be 100% deterministic with
      EIO traces

    * fixed speculative quadword store bug (missing most significant word)

    * disabled calls to sbrk() under malloc(), this breaks some
      malloc() implementation (e.g., newer Linux releases)

    * sim-outorder perfect branch predictor was reseting IFQ head
      incorrectly (improves sim performance)

    * sim-outorder now really does limit issue width (was always infinite)

    * sim-outorder and sim-cache gave broken error messages if invalid IL2
      params were specified

    * instruction address compression (64->32 bit) added to sim-cache

    * BITMAP_NOT() fixed

    * return address stack (RAS) update bug fixed (improves pred perf)

    * fixed a cache timing bug that caused some incorrect and *huge* miss
      latencies around 2 billion cycles; fixes occasional deadlock problems
      in vortex

    * fixed cache writeback stats for cache flushes

    * fixed DLite! "help" command for invalid commands

    * options package fixes: on/off supported for booleans, relative
      pathnames, negative integers are now parsed correctly

    * -max:inst is limited to 2147483647 for sim-cheetah due to integer
      overflow problems in libcheetah (to be fixed...)

    * sim-outorder now computes correct result when a non-speculative
      register operand is also defined speculative within the same inst

    * Perl scripts now work with Perl 5.0


Please send up your comments regarding this tool set, we are continually
trying to improve it and we appreciate your input.

Best Regards,

Todd Austin
SimpleScalar LLC, [e-mail]