announce-3.0

一个很有名的硬件模拟器。可以模拟CPU

SimpleScalar 3.0 release
------------------------

Greetings, SimpleScalar release 3.0 is now available.

We've completed implementation and internal regression testing, and now we
need current users to start testing this code.  In particular, we would
really appreciate:

	1) bug reports and/or bug fixes
	2) fixes and/or testing results on platforms not listed below
	3) comments/suggestions regarding this release in general

To assist in your testing, we've included SimpleScalar PISA and Alpha
OSF Unix test binaries in the simulator distribution.

To get the release, point your browser at the directory:

	http://www.simplescalar.com

and get the file:

	simplesim-3.0c.tar.gz

Then unpack this in a directory you've made and read the README in the
"simplesim-3.0/" directory for installation, usage, and testing
instructions.

We hope you find this release useful, please send comments/fixes/suggestions
to [e-mail].  Enjoy!

Regards, -Todd

p.s. the 3.0 release announcement is attached...


-- ANNOUNCE --

Greetings, we are pleased to announce the availability of the third major
release of the SimpleScalar Architectural Research Tool Set.  It is our
hope that computer architecture researchers and educators will find this
release of value.  We welcome your feedback, Enjoy!!


WHAT IS THE SIMPLESCALAR TOOL SET?

The SimpleScalar Tool Set consists of compiler, assembler, linker and
simulation tools for the SimpleScalar PISA and Alpha AXP architectures.
With this tool set, the user can simulate real programs on a range of
modern processors and systems, using fast execution-driven simulation.  The
tool set contains many simulators ranging from a fast functional simulator
to a detailed out-of-order issue processor with a multi-level memory
system.  The tool set provides researchers and educators with an easily
extensible, portable, high-performance test bed for systems design or
instruction.

The SimpleScalar PISA (Portable ISA) instruction set is an extension of
Hennessy and Patterson's DLX instruction set, including also a number of
instructions and addressing modes from the MIPS-IV and RS/6000
instruction set definitions.  SimpleScalar PISA instructions employ a
64-bit encoding to facilitate instruction set research, e.g., it's
possible to synthesize instructions or annotate existing instructions,
or vary the number of registers a program uses.  The Alpha AXP
architecture is a RISC instruction set developed by DEC.

The SimpleScalar simulator suite includes a wide range of simulation tools
ranging from simple functional (instruction only, no timing) simulators to
detailed performance (instruction plus timing) simulators.  The following
simulators are included in this release:

	sim-fast	-> a very fast functional (i.e., no timing) simulator
	sim-safe	-> the minimal functional SimpleScalar simulator
	sim-profile	-> a program profiling simulator
	sim-cache	-> a multi-level cache simulator
	sim-cheetah	-> a single-pass multi-configuration cache simulator
	sim-bpred	-> a branch predictor simulator
	sim-outorder	-> a detailed out-of-order issue performance (timing)
			   simulator with a multi-level memory system

All the simulators in the SimpleScalar tools set are execution-driven, as a
result, there is no need to generate, store, or read instruction trace files
since all instructions streams are generated on the fly.  In addition,
execution-driven simulation is an invaluable tool for modeling control and data
mis-speculation in the performance simulators.


WHY WOULD I WANT TO USE THE SIMPLESCALAR TOOL SET?

The SimpleScalar Tool Set has many powerful features, here's the short list:

	- it's free for academic non-commercial use, and all sources are included
	- it's extensible (because it includes all sources and extensive docs)
	- it's portable (it run on most any unix-like host including WinNT)
	- it's fast (on a P6-200, function simulation -> 4+ MIPS, and detailed
	  out-of-order performance simulation with a multi-level memory
	  system and mispeculation modeling cruises at 150+ KIPS)
	- it's detailed (a whole family of simulators are included)


WHY WOULD I NOT WANT TO USE THE SIMPLESCALAR TOOL SET?

	- it doesn't execute the instruction set I'm interested in: currently
	  SimpleScalar only supports the SimpleScalar PISA and Alpha AXP
	  instruction set architectures
	- it doesn't support parallel system simulation: currently
	  SimpleScalar is primarily a uniprocessor simulation environment;
	  and although work is ongoing to add MP support, other simulation
	  environments may be more appropriate for your work (e.g., RSIM
	  from Rice or SimOS from Stanford both support MP simulation)
	- it doesn't support system simulation: currently SimpleScalar
	  only supports simulation of the user-level instructions, any
	  execution within the operation system is not simulated, instead
	  the SimpleScalar simulators execute the system-level instruction
	  on behalf of the simulated program, other simulation environments
	  support system simulation, such as SimOS from Stanford


HOW DO I GET IT?

The tool set is available from the University of Wisconsin, to access
the SimpleScalar Home Page, point your browser at:

	http://www.simplescalar.com


WHO WROTE THE SIMPLESCALAR TOOL SET?

The SimpleScalar tool set simulators and GNU compiler ports were written by
Todd Austin.  The tool set is currently supported by Doug Burger (who wrote
much of the documentation as well) and Todd Austin.  The GNU compiler chain
was written by the Free Software Foundation.


ON WHICH PLATFORMS DOES IT RUN?

SimpleScalar should port easily to any 32- or 64-bit flavor of UNIX or
Windows NT, particularly those that support POSIX-compliant system
calls.  The list of tested platforms are:

		gcc/AIX413/RS6k
		xlc/AIX413/RS6k
		gcc/FreeBSD3.0/x86
		gcc/HPUX/PA-RISC
		c89/HPUX/PA-RISC
		gcc/SunOS413/SPARC
		gcc/Solaris2/SPARC
		gcc/Solaris2/x86
		gcc/Linux/x86
		gcc/Linux/Alpha
		gcc/DECOSFUnix/Alpha
		cc/DECOSFUnix/Alpha
		gcc/CygWin32-WinNT/x86
		VC++/WinNT/x86


HOW CAN I KEEP INFORMED AS TO NEW RELEASES AND ANNOUNCEMENTS?

We have set up a SimpleScalar mailing list. To subscribe, send e-mail to
[e-mail], with the message body (not the subject header)
containing "subscribe simplescalar".  Also, watch the SimpleScalar web
page at:

	http://www.cs.wisc.edu/~mscalar/simplescalar.html


WHAT'S NEW IN RELEASE 3.0:

Lots!  Here's a list of the major new features...

    * SimpleScalar now executes multiple instruction sets: SimpleScalar
      PISA (Portable ISA, the old "SimpleScalar ISA") and Alpha AXP.
      All simulators and options (e.g., DLite!) are supported for both
      instruction sets.  See README for details on compiling binaries
      and configuring the simulators.  See README.retarget for details
      on how to retarget the SimpleScalar tool set to another
      instruction set.  As always, the SimpleScalar/PISA tools will
      build on any supported platform.  The SimpleScalar/Alpha tools
      will build on any little-endian host with 64-bit integers (either
      in hardware or via the compiler), the SimpleScalar/Alpha tools are
      known to be stable on Alpha OSF Unix and Linux/x86 hosts.

    * All simulators now support external I/O traces (EIO traces).
      Generated with a new simulator (sim-eio), EIO traces capture
      initial program state and all subsequent external interactions a
      program has with the operating system.  Using this external I/O
      trace, any SimpleScalar simulator can re-execute the same
      execution using only the EIO file; no options, binaries, files,
      system calls, etc, are needed to re-create the same execution.
      All other aspects of the execution is identical, i.e., the same
      functional simulation is performed, either non-speculative or
      otherwise.  See the file README.eio for usage details.  EIO traces
      solve a number of perennial problems associated with functional
      simulation:

	- EIO trace executions are 100% reproducible, since the sources
	  of irreproducibility (i.e., external interactions such as
	  reading a date from the OS) are captured in the EIO trace
	  file; it is now possible to run simulations from EIO traces,
	  even with mis-speculation modeling, and get *exactly* the same
	  results ever time!

	- EIO trace files provide a convenient method to execute
	  interactive programs in batch mode; programs that read any
	  number of files, user input, or output including network I/O
	  will read this I/O from a single EIO trace file.

	- EIO trace files are extremely portable, any host that will
	  build SimpleScalar can execute any EIO trace even if the host
	  only has minimal minimal system call support, e.g., Windows
	  NT.  This is because system calls are not performed with EIO
	  traces, all external interactions are read from the EIO trace
	  file, which only requires that only simple file I/O be
	  performed by the simulator.

      In addition, EIO traces provide a convenient means for packaging