ad0809.hier_info

CPLD器件的4种实际应用列子。欢迎下载并评价。

|AD0809
SYSCLOCK => ADLL_ADS:U1.inclk0
OE <= reduce_or~2.DB_MAX_OUTPUT_PORT_TYPE
WR_n <= <VCC>
ADDR[0] <= <VCC>
ADDR[1] <= <VCC>
ADDR[2] <= <VCC>
D[0] => LATCH1~15.DATAIN
D[1] => LATCH1~14.DATAIN
D[2] => LATCH1~13.DATAIN
D[3] => LATCH1~12.DATAIN
D[4] => LATCH1~11.DATAIN
D[5] => LATCH1~10.DATAIN
D[6] => LATCH1~9.DATAIN
D[7] => LATCH1~8.DATAIN
D[8] => LATCH1~7.DATAIN
D[9] => LATCH1~6.DATAIN
D[10] => LATCH1~5.DATAIN
D[11] => LATCH1~4.DATAIN
D[12] => LATCH1~3.DATAIN
D[13] => LATCH1~2.DATAIN
D[14] => LATCH1~1.DATAIN
D[15] => LATCH1~0.DATAIN
Q[0] <= LATCH1~15.DB_MAX_OUTPUT_PORT_TYPE
Q[1] <= LATCH1~14.DB_MAX_OUTPUT_PORT_TYPE
Q[2] <= LATCH1~13.DB_MAX_OUTPUT_PORT_TYPE
Q[3] <= LATCH1~12.DB_MAX_OUTPUT_PORT_TYPE
Q[4] <= LATCH1~11.DB_MAX_OUTPUT_PORT_TYPE
Q[5] <= LATCH1~10.DB_MAX_OUTPUT_PORT_TYPE
Q[6] <= LATCH1~9.DB_MAX_OUTPUT_PORT_TYPE
Q[7] <= LATCH1~8.DB_MAX_OUTPUT_PORT_TYPE
Q[8] <= LATCH1~7.DB_MAX_OUTPUT_PORT_TYPE
Q[9] <= LATCH1~6.DB_MAX_OUTPUT_PORT_TYPE
Q[10] <= LATCH1~5.DB_MAX_OUTPUT_PORT_TYPE
Q[11] <= LATCH1~4.DB_MAX_OUTPUT_PORT_TYPE
Q[12] <= LATCH1~3.DB_MAX_OUTPUT_PORT_TYPE
Q[13] <= LATCH1~2.DB_MAX_OUTPUT_PORT_TYPE
Q[14] <= LATCH1~1.DB_MAX_OUTPUT_PORT_TYPE
Q[15] <= LATCH1~0.DB_MAX_OUTPUT_PORT_TYPE
EOC_0 => COM~1.CLK
EOC_0 => COM~0.CLK
EOC_0 => next_state~1.IN1
CLK_0 <= ADS8364_CLK.DB_MAX_OUTPUT_PORT_TYPE
RST_n_0 <= <VCC>
CS_0 <= reduce_or~0.DB_MAX_OUTPUT_PORT_TYPE
HOLD_A_0 <= current_state.st1.DB_MAX_OUTPUT_PORT_TYPE
HOLD_B_0 <= current_state.st1.DB_MAX_OUTPUT_PORT_TYPE
HOLD_C_0 <= current_state.st1.DB_MAX_OUTPUT_PORT_TYPE
BYTE_n_0 <= <GND>
ADD_0 <= <GND>
EOC_1 => ~NO_FANOUT~
CLK_1 <= ADS8364_CLK.DB_MAX_OUTPUT_PORT_TYPE
RST_n_1 <= <VCC>
CS_1 <= reduce_or~1.DB_MAX_OUTPUT_PORT_TYPE
HOLD_A_1 <= current_state.st1.DB_MAX_OUTPUT_PORT_TYPE
HOLD_B_1 <= current_state.st1.DB_MAX_OUTPUT_PORT_TYPE
HOLD_C_1 <= <GND>
BYTE_n_1 <= <GND>
ADD_1 <= <GND>


|AD0809|ADLL_ADS:U1
inclk0 => altpll:altpll_component.inclk[0]
c0 <= altpll:altpll_component.clk[0]


|AD0809|ADLL_ADS:U1|altpll:altpll_component
inclk[0] => pll.CLK
inclk[1] => pll.CLK1
fbin => ~NO_FANOUT~
pllena => ~NO_FANOUT~
clkswitch => ~NO_FANOUT~
areset => ~NO_FANOUT~
pfdena => ~NO_FANOUT~
clkena[0] => ~NO_FANOUT~
clkena[1] => ~NO_FANOUT~
clkena[2] => ~NO_FANOUT~
clkena[3] => ~NO_FANOUT~
clkena[4] => ~NO_FANOUT~
clkena[5] => ~NO_FANOUT~
extclkena[0] => ~NO_FANOUT~
extclkena[1] => ~NO_FANOUT~
extclkena[2] => ~NO_FANOUT~
extclkena[3] => ~NO_FANOUT~
scanclk => ~NO_FANOUT~
scanaclr => ~NO_FANOUT~
scanread => ~NO_FANOUT~
scanwrite => ~NO_FANOUT~
scandata => ~NO_FANOUT~
clk[0] <= pll.CLK
clk[1] <= <GND>
clk[2] <= <GND>
clk[3] <= <GND>
clk[4] <= <GND>
clk[5] <= <GND>
extclk[0] <= <GND>
extclk[1] <= <GND>
extclk[2] <= <GND>
extclk[3] <= <GND>
clkbad[0] <= <GND>
clkbad[1] <= <GND>
enable1 <= <GND>
enable0 <= <GND>
activeclock <= <GND>
clkloss <= <GND>
locked <= <GND>
scandataout <= <GND>
scandone <= <GND>
sclkout0 <= <GND>
sclkout1 <= <GND>