atapi.h

bootloader源代码

/*****************************************
 Copyright (c) 2001-2002 
 Sigma Designs, Inc. All Rights Reserved
 Proprietary and Confidential
 *****************************************/

/* This is file is part of the Jasper DVD boot loader */

#ifndef _RAW_ATAPI_H //_ATAPI_H conflicts with atapi.h in dvdplayer/atapi/
#define _RAW_ATAPI_H


#include "specific.h"

#define	DVD_BASE		0x00500C00
#define	DVD_AV_CTRL		0x00			// (16 BIT) AUDIO/VIDEO PART FROM HOST
//------------------------------------------------------
// IDE_REGISTERs 0x0050_0B00
//------------------------------------------------------
#define	IDE_BASE		((unsigned int)0x00500B00)

#define	IDE_TIM			0x40			// (16 BIT) IDE TIMING Reg
#define	IDE_SIDETIM		0x48			// ( 8 BIT) SLAVE IDE TIMING Reg
#define	IDE_SRC			0x4C			// (16 BIT) SLEW RATE CTRL Reg (45h-46h)
#define	IDE_STATUS		0x50			// ( 8 BIT) IDESTATUS
#define	IDE_UDMACTL		0x54			// ( 8 BIT) ULTRA DMA CONTORL Reg
#define IDE_UDMATIM		0x58			// (16 BIT) ULTRA DMA TIMING Reg (4A - 4B)

#define	IDE_PRI_DEVICE_CONTROL	0xE6			// (16 BIT) Device 0: 
#define	IDE_PRI_DATA		0xF0			// (16 BIT) Device 0: 
#define	IDE_PRI_SECTOR_COUNT	0xF2			// (16 BIT) Device 0: 
#define	IDE_PRI_DEVICE_HEAD	0xF6			// (16 BIT) Device 0: 
#define	IDE_PRI_CMD		0xF7			// (16 BIT) Device 0: 


// port offsets for ide ata registers
#define ATA_FEATURE	0x1
#define ATA_COUNT	0x2
#define ATA_SECTOR      0x3
#define ATA_CYL_LSB	0x4
#define ATA_CYL_MSB	0x5
#define ATA_DRIVE	0x6
#define ATA_COMMAND	0x7

// port offsets for ide atapi registers
#define AR_DATA         0x0             // RW - data register (16 bits)
#define AR_ERROR        0x1             //  R - error register
#define AR_FEATURES     0x1             //  W - features
#define AR_IREASON      0x2             // RW - interrupt reason
#define AR_TAG          0x3             //    - reserved for SAM TAG byte
#define AR_CNTLO        0x4             // RW - byte count, low byte
#define AR_CNTHI        0x5             // RW - byte count, high byte
#define AR_DRIVE        0x6             // RW - drive select
#define AR_COMMAND      0x7             //  W - command register
#define AR_STATUS       0x7             //  R - immediate status

// Interrupt reason register bits
#define ARI_CMD         0x01            // command(1) or data(0)
#define ARI_IN          0x02            // transfer to(1) or from(0) the host
#define ARI_RELEASE     0x04            // bus released until completion

// Status register bits
#define ARS_CHECK       0x01            // error occured, see sense key/code
													 // bit 0x02 reserved
#define ARS_CORR        0x04            // correctable error occured
#define ARS_DRQ         0x08            // data request / ireason valid
#define ARS_DSC         0x10            // immediate operation completed
#define ARS_DF          0x20            // drive fault
#define ARS_DRDY        0x40            // ready to get command
#define ARS_BSY         0x80            // registers busy
// for overlap mode only:
#define ARS_SERVICE     0x10            // service is requested
#define ARS_DMARDY      0x20            // ready to start a DMA transfer

// command phases
#define PHASE_CMDOUT    (ARS_DRQ | ARI_CMD)
#define PHASE_DATAIN    (ARS_DRQ | ARI_IN)
#define PHASE_DATAOUT   ARS_DRQ
#define PHASE_COMPLETED (ARI_IN | ARI_CMD)
#define PHASE_ABORTED   0

// Drive register values
#define ARD_DRIVE0      0xa0            // drive 0 selected (master)
#define ARD_DRIVE1      0xb0            // drive 1 selected (slave)

// ATA commands
#define ATAPIC_IDENTIFY		        0xec	// get drive parameters
#define ATAPIC_PIDENTIFY		0xa1	// get drive parameters
#define ATAPIC_PACKET			0xa0	// execute packet command
#define ATAPIC_SOFTRESET		0x08	// soft reset
#define ATAPIC_SETFEATURES		0xef	// set features

// atapi error codes
#define RES_OK          0               // i/o done
#define RES_ERR         1               // i/o finished with error
#define RES_NOTRDY      2               // controller not ready
#define RES_NODRQ       3               // no data request
#define RES_INVDIR      4               // invalid bus phase direction
#define RES_OVERRUN     5               // data overrun
#define RES_UNDERRUN    6               // data underrun
#define RES_BM_ERROR1	7				// interrupt came but status indicated error
#define RES_BM_ERROR2	8				// interrupt came but io is not completed

typedef struct tag_packet_command
{
	char *buffer;							// data buffer (used by specific atapi commands to read data from atapi device)
	int	buflen;							// length of buffer
	int	stat;					// result of command (0 = success, !0 = error) see atapires enumeration
	unsigned char c[12];					// 12 byte atapi packet command
	void *pEvent;							// not used
	int data_direction;					//  0 = unspecified
												//  1 = read from atapi device
												// -1 = write to device
	// reserved for driver use
	int error;
	char *addr;
	int count;
	IOPORT Port;							// base io port
	int Drive;								// master or slave
} packet_command;

// Drive parameter information
typedef struct tag_atapi_params
{
	unsigned short        cmdsz : 2;      	// packet command size
#define AT_PSIZE_12     0               	// 12 bytes
#define AT_PSIZE_16     1               	// 16 bytes
	unsigned short : 3;
	unsigned short       drqtype : 2;    	// DRQ type
#define AT_DRQT_MPROC   0               	// microprocessor DRQ - 3 msec delay
#define AT_DRQT_INTR    1               	// interrupt DRQ - 10 msec delay
#define AT_DRQT_ACCEL   2               	// accelerated DRQ - 50 usec delay
	unsigned short       removable : 1;  	// device is removable
	unsigned short       devtype : 5;    	// device type
#define AT_TYPE_DIRECT  0               	// direct-access (magnetic disk)
#define AT_TYPE_TAPE    1               	// streaming tape (QIC-121 model)
#define AT_TYPE_CDROM   5               	// CD-ROM device
#define AT_TYPE_OPTICAL 7               	// optical disk
	unsigned short : 1;
	unsigned short       proto : 2;      	// command protocol
#define AT_PROTO_ATAPI  2
	short reserved1[9];
	char  serial[20];     						// serial number - optional
	short reserved2[3];
	char  revision[8];    						// firmware revision
	char  model[40];      						// model name
	short reserved3[2];
	unsigned char           vendor_cap;    	// vendor unique capabilities
	unsigned char       	dmaflag : 1;   	// DMA supported
	unsigned char           lbaflag : 1;   	// LBA supported - always 1
	unsigned char           iordydis : 1;  	// IORDY can be disabled
	unsigned char           iordyflag : 1; 	// IORDY supported
	unsigned char : 1;
	unsigned char           ovlapflag : 1; 	// overlap operation supported
	unsigned char : 1;
	unsigned char           idmaflag : 1;  	// interleaved DMA supported
	short reserved4;
	unsigned short          pio_timing;    	// PIO cycle timing
	unsigned short          dma_timing;    	// DMA cycle timing
	unsigned short          flags;
#define AT_FLAG_54_58   1               	// words 54-58 valid
#define AT_FLAG_64_70   2               	// words 64-70 valid
	short                   reserved5[8];
	unsigned char           swdma_flag;     // singleword DMA mode supported
	unsigned char           swdma_active;   // singleword DMA mode active
	unsigned char           mwdma_flag;     // multiword DMA mode supported
	unsigned char           mwdma_active;   // multiword DMA mode active
	unsigned char           apio_flag;      // advanced PIO mode supported
	unsigned char           reserved6;
	unsigned short          mwdma_min;      // min. M/W DMA time per word (ns)
	unsigned short          mwdma_dflt;     // recommended M/W DMA time (ns) - optional
	unsigned short          pio_nfctl_min;  // min. PIO cycle time w/o flow ctl - optional
	unsigned short          pio_iordy_min;  // min. PIO c/t with IORDY flow ctl - optional
	short                   reserved7[2];
	unsigned short          rls_ovlap;      // release time (us) for overlap cmd - optional
	unsigned short          rls_service;    // release time (us) for service cmd - optional
	unsigned short  	major_revision;	// major revision number
	unsigned short		minor_revision;	// minor revision number
	// stop at byte 75 -> sizeof (atapi_params) == 150
} atapi_params;


#ifdef __cplusplus
extern "C" {
#endif

int Ata_Command (IOPORT Port, int Drive, int cmd, unsigned char *pBuffer, int Length);
int Atapi_Command (packet_command *pc);
void IdeInit(void);
int IdeTray(int open);
int IdeReadSectors(char *buffer, unsigned long  first, unsigned short nsectors);
int IdeWaitReady(unsigned int timeout);

#ifdef __cplusplus
}
#endif

#endif