pcifpga.c

bootloader源代码

#define PCIFPGA_READ_RAW_X(x, type, name)   \
    int pcifpga_read_raw_##name(unsigned int addr, unsigned int (*convaddr)(unsigned int), unsigned type *data) \
    { \
        unsigned int isr, addr32; \
        if (!g_pcifpga_inited) { \
            if (PCIFPGA_VERBOSE) \
                uart_puts("PCI FPGA is not initialized\n"); \
            *data = 0; \
            return 0; \
        } \
        addr32 = addr & ~0x03; \
        addr32 = convaddr(addr32); \
        if (PCIFPGA_VERBOSE) \
            uart_printf("Read " #name " %08x (%08x) = ", addr, PCIFPGA_ADDR(addr32)); \
        /* setup byte enable bits */ \
        if (sizeof(type) != 4) { \
            int byteenable = 0x0f; \
            int bit = addr & ((sizeof(type) == 1) ? 0x03 : 0x02); \
            byteenable &= ~(((sizeof(type) == 1) ? 1 : 3) << bit); \
            pcifpga_writew(byteenable, PCIFPGA_BYTEENABLE); \
        } \
        /* issue PCI configuration read transaction. it always returns 0 */ \
        em86xx_mask_fiq(IRQ_PCIFPGA); \
        pcifpga_readw(addr32); \
        /* wait for interrupt */ \
        isr = pcifpga_wait_isr(PCIFPGA_ISR_RDRESP | PCIFPGA_ISR_MASTERABORT); \
        if (isr & PCIFPGA_ISR_RDRESP) { \
            if (sizeof(type) == 1) { \
                unsigned short data16; \
                data16 = pcifpga_readw(PCIFPGA_IDEREADDATA + (addr & 0x02)); \
                if (addr & 0x01) \
                    *data = (data16 >> 8) & 0xff; \
                else \
                    *data = (data16 & 0xff); \
            } else if (sizeof(type) == 2) { \
                if (addr & 0x01) \
                    if (PCIFPGA_VERBOSE) \
                        uart_puts("Align fault (2) "); \
                *data = pcifpga_readw(PCIFPGA_IDEREADDATA + (addr & 0x02)); \
            } else { \
                if (addr & 0x03) \
                    if (PCIFPGA_VERBOSE) \
                        uart_puts("Align fault (4)\n"); \
                *data = pcifpga_readl(PCIFPGA_IDEREADDATA); \
            } \
            if (PCIFPGA_VERBOSE) \
                uart_printf("%0*x\n", (int) sizeof(type) * 2, *data); \
        } else if (isr & PCIFPGA_ISR_MASTERABORT) { \
            if (PCIFPGA_VERBOSE) \
                uart_puts("Master abort\n"); \
            *data = 0; \
        } \
        em86xx_unmask_fiq(IRQ_PCIFPGA); \
        return 0; \
    }

#define PCIFPGA_WRITE_RAW_X(x, type, name)  \
    int pcifpga_write_raw_##name(unsigned int addr, unsigned int (*convaddr)(unsigned int), unsigned int data) \
    { \
        unsigned int addr16; \
        if (!g_pcifpga_inited) { \
            if (PCIFPGA_VERBOSE) \
                uart_puts("PCI FPGA is not initialized\n"); \
            return 0; \
        } \
        addr16 = addr & ~0x01; \
        addr16 = convaddr(addr16); \
        if (PCIFPGA_VERBOSE) \
            uart_printf("Write " #name " %08x (%08x) = %0*x ", \
                addr, PCIFPGA_ADDR(addr16), (int) sizeof(type) * 2, data); \
        if (sizeof(type) == 1) { \
            unsigned int align = addr & 0x01; \
            unsigned short data16; \
            /* setup byte enable bits */ \
            int byteenable = 0x0f; \
            int bit = addr & 0x03; \
            byteenable &= ~(1 << bit); \
            pcifpga_writew(byteenable, PCIFPGA_BYTEENABLE); \
            /* write data */ \
            data16 = (data << (align * 8)); \
            pcifpga_writew(data16, addr16); \
        } else if (sizeof(type) == 2) { \
            if (addr & 0x01) \
                if (PCIFPGA_VERBOSE) \
                    uart_puts("Align fault (2)"); \
            pcifpga_writew(data, addr16); \
        } else { \
            unsigned int addr32; \
            if (addr & 0x03) \
                if (PCIFPGA_VERBOSE) \
                    uart_puts("Align fault (4)"); \
            addr32 = addr & ~0x03; \
            addr32 = convaddr(addr32); \
            if (addr < PCIFPGA_CONFIG_END) \
                pcifpga_writel(data, addr32); \
            else \
                pcifpga_writel_cmd(data, addr32); \
        } \
        if (PCIFPGA_VERBOSE) \
            uart_puts("\n"); \
        return 0; \
    }

PCIFPGA_READ_RAW_X(b, char, byte)
PCIFPGA_READ_RAW_X(w, short, word)
PCIFPGA_READ_RAW_X(l, int, dword)

PCIFPGA_WRITE_RAW_X(b, char, byte)
PCIFPGA_WRITE_RAW_X(w, short, word)
PCIFPGA_WRITE_RAW_X(l, int, dword)

//
// primitive Configuration I/O
//

#define PCIFPGA_READ_CONFIG_X(x, type, name)    \
    int pcifpga_read_config_##name(unsigned int addr, unsigned type *data) \
    { \
        if (g_pcifpga_idsel >= 0) { \
            if (PCIFPGA_VERBOSE) \
                uart_puts("CONFIG "); \
            return pcifpga_read_raw_##name(addr, pcifpga_addr_config, data); \
        } else { \
            *data = (unsigned type) -1; \
            return 1; \
        } \
    }

#define PCIFPGA_WRITE_CONFIG_X(x, type, name)   \
    int pcifpga_write_config_##name(unsigned int addr, unsigned int data) \
    { \
        if (g_pcifpga_idsel >= 0) { \
            if (PCIFPGA_VERBOSE) \
                uart_puts("CONFIG "); \
            if (sizeof(type) == 4) \
                pcifpga_writel_setcmd(PCI_CMD_CONFIGWRITE); \
            return pcifpga_write_raw_##name(addr, pcifpga_addr_config, data); \
        } else { \
            return 1; \
        } \
    }

PCIFPGA_READ_CONFIG_X(b, char, byte)
PCIFPGA_READ_CONFIG_X(w, short, word)
PCIFPGA_READ_CONFIG_X(l, int, dword)

PCIFPGA_WRITE_CONFIG_X(b, char, byte)
PCIFPGA_WRITE_CONFIG_X(w, short, word)
PCIFPGA_WRITE_CONFIG_X(l, int, dword)

//
// primitive PCI I/O Access
//

#define PCIFPGA_IN_X(x, type, name) \
    unsigned type pcifpga_in_##name(unsigned int addr) \
    { \
        unsigned type data; \
        if (PCIFPGA_VERBOSE) \
            uart_puts("IO "); \
        pcifpga_read_raw_##name(addr, pcifpga_addr_io, &data); \
        return data; \
    } 

#define PCIFPGA_OUT_X(x, type, name) \
    void pcifpga_out_##name(unsigned int data, unsigned int addr) \
    { \
        if (PCIFPGA_VERBOSE) \
            uart_puts("IO "); \
            if (sizeof(type) == 4) \
                pcifpga_writel_setcmd(PCI_CMD_IOWRITE); \
        pcifpga_write_raw_##name(addr, pcifpga_addr_io, data); \
    } 

PCIFPGA_IN_X(b, char, byte)
PCIFPGA_IN_X(w, short, word)
PCIFPGA_IN_X(l, int, dword)

PCIFPGA_OUT_X(b, char, byte)
PCIFPGA_OUT_X(w, short, word)
PCIFPGA_OUT_X(l, int, dword)

//
// primitive PCI Memory Access
//

#define PCIFPGA_READ_X(x, type, name) \
    unsigned type pcifpga_read_##name(unsigned int addr) \
    { \
        unsigned type data; \
        if (PCIFPGA_VERBOSE) \
            uart_puts("MEMORY "); \
        pcifpga_read_raw_##name(addr, pcifpga_addr_mem, &data); \
        return data; \
    } 

#define PCIFPGA_WRITE_X(x, type, name) \
    void pcifpga_write_##name(unsigned int data, unsigned int addr) \
    { \
        if (PCIFPGA_VERBOSE) \
            uart_puts("MEMORY "); \
            if (sizeof(type) == 4) \
                pcifpga_writel_setcmd(PCI_CMD_MEMORYWRITE); \
        pcifpga_write_raw_##name(addr, pcifpga_addr_mem, data); \
    } 

PCIFPGA_READ_X(b, char, byte)
PCIFPGA_READ_X(w, short, word)
PCIFPGA_READ_X(l, int, dword)

PCIFPGA_WRITE_X(b, char, byte)
PCIFPGA_WRITE_X(w, short, word)
PCIFPGA_WRITE_X(l, int, dword)

//
// PCI bus test
//

int pcifpga_test(int argc, char *argv[])
{
    unsigned int data32, data32_new, data32_16, data32_8;
    int i, j;

    if (pcifpga_select(0) == 0)
        return 0;

    if (argv[0]) {
        if (strcmp(argv[0], "config") == 0) {
            uart_puts("Configuration Read Test\n");
            for (i = 0; i < 0x40; i += 4) {
                pcifpga_read_config_dword(i, &data32);
                for (j = 0; j < 4; j += 2)
                    pcifpga_read_config_word(i + j, (unsigned short *) ((unsigned int) &data32_16 + j));
                for (j = 0; j < 4; ++j)
                    pcifpga_read_config_byte(i + j, (unsigned char *) ((unsigned int) &data32_8 + j));
                uart_printf("Configuration 0x%02x : %08x, %08x, %08x ", i, data32, data32_16, data32_8);
                if (data32 != data32_16) 
                    uart_puts("WORD_FAIL ");
                if (data32 != data32_8) 
                    uart_puts("BYTE_FAIL ");
                uart_puts("\n");
            }
        
            PAUSE
        
            uart_puts("Configuration Write Test\n");
            for (i = PCI_BASE_ADDRESS_0; i < PCI_BASE_ADDRESS_1; i += 4) {
                pcifpga_read_config_dword(i, &data32);
                uart_printf("Configuration 0x%02x : %08x\n", i , data32);
                data32_new = 0x89abcdef;
                pcifpga_write_config_dword(i, data32_new);
                pcifpga_read_config_dword(i, &data32);
                uart_printf("  DWORD : (%08x) %08x\n", data32_new, data32);
        
                data32_new = 0x11223344;
                uart_printf("  WORD : (%08x) ", data32_new);
                for (j = 0; j < 4; j += 2) {
                    pcifpga_write_config_word(i + j, *(unsigned short *) ((unsigned int) &data32_new + j));
                    pcifpga_read_config_dword(i, &data32);
                    uart_printf("%08x ", data32);
                }
                uart_puts("\n");
        
                data32_new = 0xaabbccdd;
                uart_printf("  BYTE : (%08x) ", data32_new);
                for (j = 0; j < 4; ++j) {
                    pcifpga_write_config_byte(i + j, *(unsigned char *) ((unsigned int) &data32_new + j));
                    pcifpga_read_config_dword(i, &data32);
                    uart_printf("%08x ", data32);
                }
                uart_puts("\n");
            }
        }
    }

    return 0;
}