📄 dsp280x_adc.c
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// TI File $Revision: /main/1 $
// Checkin $Date: December 1, 2004 11:11:30 $
//###########################################################################
//
// FILE: DSP280x_Adc.c
//
// TITLE: DSP280x ADC Initialization & Support Functions.
//
//###########################################################################
// $TI Release: DSP280x, DSP2801x Header Files V1.41 $
// $Release Date: August 7th, 2006 $
//###########################################################################
#include "DSP280x_Device.h" // DSP280x Headerfile Include File
#include "DSP280x_Examples.h" // DSP280x Examples Include File
#define ADC_usDELAY 5000L
//---------------------------------------------------------------------------
// InitAdc:
//---------------------------------------------------------------------------
// This function initializes ADC to a known state.
//
// PLEASE NOTE, ADC INIT IS DIFFERENT ON 281x vs 280x DEVICES!!!
//
void InitAdc(void)
{
extern void DSP28x_usDelay(Uint32 Count);
// To powerup the ADC the ADCENCLK bit should be set first to enable
// clocks, followed by powering up the bandgap, reference circuitry, and ADC core.
// Before the first conversion is performed a 5ms delay must be observed
// after power up to give all analog circuits time to power up and settle
// Please note that for the delay function below to operate correctly the
// CPU_CLOCK_SPEED define statement in the DSP280x_Examples.h file must
// contain the correct CPU clock period in nanoseconds.
AdcRegs.ADCTRL3.all = 0x00E0; // Power up bandgap/reference/ADC circuits
DELAY_US(ADC_usDELAY); // Delay before converting ADC channels
// Configure ADC
AdcRegs.ADCMAXCONV.all = 0x0003; // Setup 2 conv's on SEQ1
AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x0; // Setup ADCINA3 as 1st SEQ1 conv.
AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x1; // Setup ADCINA2 as 2nd SEQ1 conv.
AdcRegs.ADCCHSELSEQ1.bit.CONV02 = 0x2; // Setup ADCINA2 as 2nd SEQ1 conv.
AdcRegs.ADCCHSELSEQ1.bit.CONV03 = 0x3; // Setup ADCINA2 as 2nd SEQ1 conv.
AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 = 1;// Enable SOCA from ePWM to start SEQ1
AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1; // Enable SEQ1 interrupt (every EOS)
// Assumes ePWM1 clock is already enabled in InitSysCtrl();
EPwm1Regs.ETSEL.bit.SOCAEN = 1; // Enable SOC on A group
EPwm1Regs.ETSEL.bit.SOCASEL = 4; // Select SOC from from CPMA on upcount
EPwm1Regs.ETPS.bit.SOCAPRD = 1; // Generate pulse on 1st event
// EPwm1Regs.CMPA.half.CMPA = 0x0080; // Set compare A value
// EPwm1Regs.TBPRD = 0xFFFF; // Set period for ePWM1
// EPwm1Regs.TBCTL.bit.CTRMODE = 0; // count up and start
// Wait for ADC interrupt
}
//2007-6-6--
/*
void InitAdc(void)
{
extern void DSP28x_usDelay(Uint32 Count);
// To powerup the ADC the ADCENCLK bit should be set first to enable
// clocks, followed by powering up the bandgap, reference circuitry, and ADC core.
// Before the first conversion is performed a 5ms delay must be observed
// after power up to give all analog circuits time to power up and settle
// Please note that for the delay function below to operate correctly the
// CPU_CLOCK_SPEED define statement in the DSP280x_Examples.h file must
// contain the correct CPU clock period in nanoseconds.
AdcRegs.ADCTRL3.all = 0x00E0; // Power up bandgap/reference/ADC circuits
DELAY_US(ADC_usDELAY); // Delay before converting ADC channels
// Configure ADC
//同步采样级联序列发生器模式
//初始化:
AdcRegs.ADCTRL3.bit.SMODE_SEL = 0x1; // 设置同步采样模式
AdcRegs.ADCTRL1.bit.SEQ_CASC = 0x1; // 设置级联采样模式
AdcRegs.ADCMAXCONV.all = 0x0007; // 8 个双转换(共16 个)
AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x0; // 设置从ADCINA0 & ADCINB0 转换
AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x1; // 设置从ADCINA1 & ADCINB1 的转换
AdcRegs.ADCCHSELSEQ1.bit.CONV02 = 0x2; // 设置从ADCINA2 & ADCINB2 的转换
AdcRegs.ADCCHSELSEQ1.bit.CONV03 = 0x3; // 设置从ADCINA3 & ADCINB3 的转换
AdcRegs.ADCCHSELSEQ2.bit.CONV04 = 0x4; // 设置从ADCINA4 & ADCINB4 的转换
AdcRegs.ADCCHSELSEQ2.bit.CONV05 = 0x5; // 设置从ADCINA5 & ADCINB5 的转换
AdcRegs.ADCCHSELSEQ2.bit.CONV06 = 0x6; // 设置从ADCINA6 & ADCINB6 的转换
AdcRegs.ADCCHSELSEQ2.bit.CONV07 = 0x7; // 设置从ADCINA7 & ADCINB7 的转换
AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 = 1;// Enable SOCA from ePWM to start SEQ1
AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1; // Enable SEQ1 interrupt (every EOS)
//-------------------------------------------------------------
// Assumes ePWM1 clock is already enabled in InitSysCtrl();
EPwm2Regs.ETSEL.bit.SOCAEN = 1; // Enable SOC on A group
EPwm2Regs.ETSEL.bit.SOCASEL = 4; // Select SOC from from CPMA on upcount
EPwm2Regs.ETPS.bit.SOCAPRD = 1; // Generate pulse on 1st event
EPwm2Regs.CMPA.half.CMPA = 0x0080; // Set compare A value
//U32TBPRD=4960;
EPwm2Regs.TBPRD =4960;//6200;//25010; 16000000*8/4/12800=5000;// Set period for ePWM1
EPwm2Regs.TBCTL.bit.CTRMODE = 0; // count up and start
}
*/
//===========================================================================
// End of file.
//===========================================================================
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