main.vhd

数码管扫描显示控制器,同时显示0、1、2、3、4、5这6个不同的数字图形到6个数码管上。复位时所有数码管全灭。

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;

entity main is 
port (clk:in std_logic;
cat:out std_logic_vector(5 downto 0);
lcd:out std_logic_vector(6 downto 0);
btn2:in std_logic
);
end;

architecture arch_main of main is


  component seg7_1a
    port(h:in std_logic_vector(3 downto 0);
     i:out std_logic_vector(6 downto 0));
     end component;
signal count:integer range 0 to 6;
signal count1:integer range 0 to 5;
signal n0:integer range 0 to 5;
signal n1:integer range 0 to 5;
signal n2:integer range 0 to 5;
signal n3:integer range 0 to 5;
signal n4:integer range 0 to 5;
signal n5:integer range 0 to 5;
signal u:std_logic_vector(3 downto 0);
signal num:integer range 0 to 5;
begin
process(btn2,clk)

 begin
 
 
 if(btn2='1')then count<=6;n0<=0;n1<=1;n2<=2;n3<=3;n4<=4;n5<=5;
    else if(clk'event and clk='1')then
     if(count=5) then count<=0;
     else count<=count+1;
	end if;
     if(count1=5) then count1<=0;  n0<=n1;n1<=n2;n2<=n3;n3<=n4;n4<=n5;n5<=n0;

     else count1<=count1+1;
          end if;

       
     case count is
     when 0=>cat<="011111";num<=n0;
     when 1=>cat<="101111";num<=n1;
     when 2=>cat<="110111";num<=n2;
     when 3=>cat<="111011";num<=n3;
     when 4=>cat<="111101";num<=n4;
     when 5=>cat<="111110";num<=n5;
     when others=>cat<="111111";num<=0;
     end case;
    end if;
  end if;  
 
end process;
 u<=conv_std_logic_vector(num,4);
  u1:seg7_1a port map(h=>u,i=>lcd);

end;